static int __set_one_port(qm_pwm_t id, uint32_t pwm, uint32_t on, uint32_t off)
{
qm_pwm_config_t cfg;
/* Disable timer to prevent any output */
qm_pwm_stop(id, pwm);
if ((off == 0) || (on == 0)) {
/* stop PWM if so specified */
return 0;
}
/* PWM mode, user-defined count mode, timer disabled */
cfg.mode = QM_PWM_MODE_PWM;
/* No interrupts */
cfg.mask_interrupt = true;
cfg.callback = NULL;
/* Data for the timer to stay high and low */
cfg.hi_count = on;
cfg.lo_count = off;
if (qm_pwm_set_config(id, pwm, &cfg) != QM_RC_OK) {
return -EIO;
}
/* Enable timer so it starts running and counting */
qm_pwm_start(id, pwm);
return 0;
}
/* QMSI timer app example */
int main(void)
{
/* Variables */
qm_pwm_config_t wr_cfg, rd_cfg;
uint32_t lo_cnt, hi_cnt;
/* Initialise timer configuration */
wr_cfg.lo_count = 0x100000;
wr_cfg.hi_count = 0;
wr_cfg.mode = QM_PWM_MODE_TIMER_COUNT;
wr_cfg.mask_interrupt = false;
wr_cfg.callback = timer_example_callback;
/* Enable clocking for the PWM block */
clk_periph_enable(CLK_PERIPH_PWM_REGISTER | CLK_PERIPH_CLK);
/* Set the configuration of the Timer */
qm_pwm_set_config(QM_PWM_0, QM_PWM_ID_1, &wr_cfg);
/* Register the ISR with the SoC */
qm_irq_request(QM_IRQ_PWM_0, qm_pwm_isr_0);
/* Optionally, get config back to see the settings */
qm_pwm_get_config(QM_PWM_0, QM_PWM_ID_1, &rd_cfg);
/* Start Timer 2 */
qm_pwm_start(QM_PWM_0, QM_PWM_ID_1);
/* Optionally, get the current count values */
qm_pwm_get(QM_PWM_0, QM_PWM_ID_1, &lo_cnt, &hi_cnt);
clk_sys_udelay(UDELAY);
/* Optionally, reload new values into the Timer */
lo_cnt = 0x40000;
hi_cnt = 0;
qm_pwm_set(QM_PWM_0, QM_PWM_ID_1, lo_cnt, hi_cnt);
clk_sys_udelay(UDELAY);
/* Stop the Timer from running */
qm_pwm_stop(QM_PWM_0, QM_PWM_ID_1);
/* Disable clocking for the PWM block */
clk_periph_disable(CLK_PERIPH_PWM_REGISTER);
return 0;
}
