static void
process_rtx (rtx desc, int lineno)
{
switch (GET_CODE (desc))
{
case DEFINE_INSN:
queue_pattern (desc, &define_insn_tail, read_rtx_filename, lineno);
break;
case DEFINE_COND_EXEC:
queue_pattern (desc, &define_cond_exec_tail, read_rtx_filename, lineno);
break;
case DEFINE_ATTR:
queue_pattern (desc, &define_attr_tail, read_rtx_filename, lineno);
break;
case DEFINE_PREDICATE:
case DEFINE_SPECIAL_PREDICATE:
case DEFINE_CONSTRAINT:
case DEFINE_REGISTER_CONSTRAINT:
case DEFINE_MEMORY_CONSTRAINT:
case DEFINE_ADDRESS_CONSTRAINT:
queue_pattern (desc, &define_pred_tail, read_rtx_filename, lineno);
break;
case INCLUDE:
process_include (desc, lineno);
break;
case DEFINE_INSN_AND_SPLIT:
{
const char *split_cond;
rtx split;
rtvec attr;
int i;
struct queue_elem *insn_elem;
struct queue_elem *split_elem;
/* Create a split with values from the insn_and_split. */
split = rtx_alloc (DEFINE_SPLIT);
i = XVECLEN (desc, 1);
XVEC (split, 0) = rtvec_alloc (i);
while (--i >= 0)
{
XVECEXP (split, 0, i) = copy_rtx (XVECEXP (desc, 1, i));
remove_constraints (XVECEXP (split, 0, i));
}
/* If the split condition starts with "&&", append it to the
insn condition to create the new split condition. */
split_cond = XSTR (desc, 4);
if (split_cond[0] == '&' && split_cond[1] == '&')
{
copy_rtx_ptr_loc (split_cond + 2, split_cond);
split_cond = join_c_conditions (XSTR (desc, 2), split_cond + 2);
}
XSTR (split, 1) = split_cond;
XVEC (split, 2) = XVEC (desc, 5);
XSTR (split, 3) = XSTR (desc, 6);
/* Fix up the DEFINE_INSN. */
attr = XVEC (desc, 7);
PUT_CODE (desc, DEFINE_INSN);
XVEC (desc, 4) = attr;
/* Queue them. */
insn_elem
= queue_pattern (desc, &define_insn_tail, read_rtx_filename,
lineno);
split_elem
= queue_pattern (split, &other_tail, read_rtx_filename, lineno);
insn_elem->split = split_elem;
break;
}
default:
queue_pattern (desc, &other_tail, read_rtx_filename, lineno);
break;
}
}
static void
process_rtx (rtx desc, int lineno)
{
switch (GET_CODE (desc))
{
case DEFINE_INSN:
queue_pattern (desc, &define_insn_tail, read_rtx_filename, lineno);
break;
case DEFINE_COND_EXEC:
queue_pattern (desc, &define_cond_exec_tail, read_rtx_filename, lineno);
break;
case DEFINE_ATTR:
queue_pattern (desc, &define_attr_tail, read_rtx_filename, lineno);
break;
case INCLUDE:
process_include (desc, lineno);
break;
case DEFINE_INSN_AND_SPLIT:
{
const char *split_cond;
rtx split;
rtvec attr;
int i;
/* Create a split with values from the insn_and_split. */
split = rtx_alloc (DEFINE_SPLIT);
i = XVECLEN (desc, 1);
XVEC (split, 0) = rtvec_alloc (i);
while (--i >= 0)
{
XVECEXP (split, 0, i) = copy_rtx (XVECEXP (desc, 1, i));
remove_constraints (XVECEXP (split, 0, i));
}
/* If the split condition starts with "&&", append it to the
insn condition to create the new split condition. */
split_cond = XSTR (desc, 4);
if (split_cond[0] == '&' && split_cond[1] == '&')
split_cond = concat (XSTR (desc, 2), split_cond, NULL);
XSTR (split, 1) = split_cond;
XVEC (split, 2) = XVEC (desc, 5);
XSTR (split, 3) = XSTR (desc, 6);
/* Fix up the DEFINE_INSN. */
attr = XVEC (desc, 7);
PUT_CODE (desc, DEFINE_INSN);
XVEC (desc, 4) = attr;
/* Queue them. */
queue_pattern (desc, &define_insn_tail, read_rtx_filename, lineno);
queue_pattern (split, &other_tail, read_rtx_filename, lineno);
break;
}
default:
queue_pattern (desc, &other_tail, read_rtx_filename, lineno);
break;
}
}
