static int ramips_eth_hw_init(struct net_device *dev) { struct raeth_priv *re = netdev_priv(dev); int err; err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED, dev->name, dev); if (err) return err; err = ramips_ring_alloc(re); if (err) goto err_free_irq; ramips_ring_setup(re); ramips_hw_set_macaddr(dev->dev_addr); ramips_setup_dma(re); ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) & ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) | ((re->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT), RAMIPS_FE_GLO_CFG); tasklet_init(&re->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping, (unsigned long)dev); tasklet_init(&re->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev); ramips_fe_twr(RAMIPS_DELAY_INIT, RAETH_REG_DLY_INT_CFG); ramips_fe_twr(TX_DLY_INT | RX_DLY_INT, RAETH_REG_FE_INT_ENABLE); if (soc_is_rt5350()) { ramips_fe_wr(ramips_fe_rr(RT5350_SDM_CFG) & ~(RT5350_SDM_ICS_EN | RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN | 0xffff), RT5350_SDM_CFG); } else { ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) & ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff), RAMIPS_GDMA1_FWD_CFG); ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) & ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN), RAMIPS_CDMA_CSG_CFG); ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG); } ramips_fe_wr(1, RAMIPS_FE_RST_GL); ramips_fe_wr(0, RAMIPS_FE_RST_GL); return 0; err_free_irq: free_irq(dev->irq, dev); return err; }
static int ramips_eth_open(struct net_device *dev) { struct raeth_priv *priv = netdev_priv(dev); int err; err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED, dev->name, dev); if (err) return err; err = ramips_alloc_dma(priv); if (err) goto err_free_irq; ramips_hw_set_macaddr(dev->dev_addr); ramips_setup_dma(priv); ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) | (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS), RAMIPS_PDMA_GLO_CFG); ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) & ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) | ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT), RAMIPS_FE_GLO_CFG); tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping, (unsigned long)dev); tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev); ramips_phy_start(priv); ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG); ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE); ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) & ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff), RAMIPS_GDMA1_FWD_CFG); ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) & ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN), RAMIPS_CDMA_CSG_CFG); ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG); ramips_fe_wr(1, RAMIPS_FE_RST_GL); ramips_fe_wr(0, RAMIPS_FE_RST_GL); netif_start_queue(dev); return 0; err_free_irq: free_irq(dev->irq, dev); return err; }