/* * Common platform init routine for all SPI NOR devices. */ static __init const struct rb_info *rbspi_platform_setup(void) { const struct rb_info *info; char buf[RBSPI_MACH_BUFLEN] = "MikroTik "; char *str; int len = RBSPI_MACH_BUFLEN - strlen(buf) - 1; info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x20000); if (!info) return NULL; if (info->board_name) { str = "RouterBOARD "; if (strncmp(info->board_name, str, strlen(str))) { strncat(buf, str, len); len -= strlen(str); } strncat(buf, info->board_name, len); } else strncat(buf, "UNKNOWN", len); mips_set_machine_name(buf); /* fix partitions based on flash parsing */ rbspi_init_partitions(info); return info; }
static int __init rb2011_setup(u32 flags) { const struct rb_info *info; char buf[64]; info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); if (!info) return -ENODEV; scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", (info->board_name) ? info->board_name : ""); mips_set_machine_name(buf); rb2011_init_partitions(info); ath79_register_m25p80(&rb2011_spi_flash_data); rb2011_nand_init(); ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE); ath79_register_mdio(1, 0x0); ath79_register_mdio(0, 0x0); mdiobus_register_board_info(rb2011_mdio0_info, ARRAY_SIZE(rb2011_mdio0_info)); /* GMAC0 is connected to an ar8327 switch */ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.phy_mask = BIT(0); ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ath79_eth0_pll_data.pll_1000 = 0x06000000; ath79_register_eth(0); /* GMAC1 is connected to the internal switch */ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5); ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ath79_eth1_data.speed = SPEED_1000; ath79_eth1_data.duplex = DUPLEX_FULL; ath79_register_eth(1); if (flags & RB2011_FLAG_SFP) rb2011_sfp_init(); if (flags & RB2011_FLAG_WLAN) rb2011_wlan_init(); if (flags & RB2011_FLAG_USB) ath79_register_usb(); return 0; }
static int __init rb95x_setup(void) { const struct rb_info *info; info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); if (!info) return -EINVAL; rb95x_nand_init(); return 0; }
static void __init rb922gs_setup(void) { const struct rb_info *info; char buf[64]; info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); if (!info) return; scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", (info->board_name) ? info->board_name : ""); mips_set_machine_name(buf); rb922gs_init_partitions(info); ath79_register_m25p80(&rb922gs_spi_flash_data); rb922gs_nand_init(); ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_register_mdio(0, 0x0); mdiobus_register_board_info(rb922gs_mdio0_info, ARRAY_SIZE(rb922gs_mdio0_info)); ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR); ath79_eth0_pll_data.pll_10 = 0x81001313; ath79_eth0_pll_data.pll_100 = 0x81000101; ath79_eth0_pll_data.pll_1000 = 0x8f000000; ath79_register_eth(0); ath79_register_pci(); ath79_register_leds_gpio(-1, ARRAY_SIZE(rb922gs_leds), rb922gs_leds); ath79_register_gpio_keys_polled(-1, RB922_KEYS_POLL_INTERVAL, ARRAY_SIZE(rb922gs_gpio_keys), rb922gs_gpio_keys); /* NOTE: * This only supports the RB911G-5HPacD board for now. For other boards * more devices must be registered based on the hardware options which * can be found in the hardware configuration of RouterBOOT. */ }
/* * Common platform init routine for all SPI NOR devices. */ static int __init rbspi_platform_setup(void) { const struct rb_info *info; char buf[64]; info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x20000); if (!info) return -ENODEV; scnprintf(buf, sizeof(buf), "MikroTik %s", (info->board_name) ? info->board_name : ""); mips_set_machine_name(buf); /* fix partitions based on flash parsing */ rbspi_init_partitions(info); return 0; }