/*
* The hAP, hAP ac lite, hEX lite and hEX PoE lite share the same platform
*/
static void __init rbspi_952_750r2_setup(u32 flags)
{
if (flags & RBSPI_HAS_SSR)
rbspi_spi_cs_gpios[1] = RB952_GPIO_SSR_CS;
rbspi_peripherals_setup(flags);
/*
* GMAC1 is HW MAC + 1, WLAN0 MAC IS HW MAC + 5 (hAP),
* WLAN1 MAC IS HW MAC + 6 (hAP ac lite)
*/
rbspi_network_setup(flags, 1, 5, 6);
if (flags & RBSPI_HAS_USB)
gpio_request_one(RB952_GPIO_USB_PWROFF, GPIOF_ACTIVE_LOW |
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power off");
if (flags & RBSPI_HAS_POE)
gpio_request_one(RB952_GPIO_POE_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"POE power");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds), rb952_leds);
/* These devices have a single reset button as gpio 16 */
rbspi_register_reset_button(RB952_GPIO_BTN_RESET);
}
/*
* Init the mAP hardware.
* The mAP 2nD has two ethernet ports, PoE output, SSR for LED
* multiplexing and USB port.
*/
static void __init rbmap_setup(void)
{
u32 flags = RBSPI_HAS_USB | RBSPI_HAS_WLAN0 |
RBSPI_HAS_SSR | RBSPI_HAS_POE;
if (!rbspi_platform_setup())
return;
rbspi_spi_cs_gpios[1] = RBMAP_GPIO_SSR_CS;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 2 */
rbspi_network_setup(flags, 0, 2, 0);
if (flags & RBSPI_HAS_POE)
gpio_request_one(RBMAP_GPIO_POE_POWER,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"POE power");
if (flags & RBSPI_HAS_USB)
gpio_request_one(RBMAP_GPIO_USB_PWROFF,
GPIOF_OUT_INIT_HIGH | GPIOF_ACTIVE_LOW |
GPIOF_EXPORT_DIR_FIXED,
"USB power off");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds);
/* mAP 2nD has a single reset button as gpio 16 */
rbspi_register_reset_button(RBMAP_GPIO_BTN_RESET);
}
/*
* The hAP, hEX lite and hEX PoE lite share the same platform
*/
static void __init rbspi_952_750r2_setup(u32 flags)
{
if (flags & RBSPI_HAS_SSR)
rbspi_spi_cs_gpios[1] = RB952_GPIO_SSR_CS;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC + 1, WLAN MAC IS HW MAC + 5 */
rbspi_network_setup(flags, 1, 5);
if (flags & RBSPI_HAS_USB)
gpio_request_one(RB952_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
if (flags & RBSPI_HAS_POE)
gpio_request_one(RB952_GPIO_POE_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"POE power");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds), rb952_leds);
/* These devices have a single reset button as gpio 16 */
ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(rbspi_gpio_keys_reset16),
rbspi_gpio_keys_reset16);
}
/*
* Init the wAPGSC (RB wAPG-5HacT2HnD // wAP AC) hardware.
* The wAPGSC has one Ethernet port via AR8033 with PoE input, dual radio (SoC
* 2.4 GHz and external QCA9880) and a ZT2046Q temperature and voltage sensor
* (currently not supported).
*/
static void __init rbwapgsc_setup(void)
{
u32 flags = RBSPI_HAS_PCI;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
platform_device_register(&rbwapgsc_phy_device);
ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
ath79_eth1_data.mii_bus_dev = &rbwapgsc_phy_device.dev;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.phy_mask = BIT(RBWAPGSC_MDIO_PHYADDR);
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_eth1_pll_data.pll_100 = 0x80000101;
ath79_eth1_pll_data.pll_10 = 0x80001313;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
rbspi_wlan_init(1, 2);
rbspi_register_reset_button(RBWAPGSC_GPIO_BTN_RESET);
ath79_gpio_function_enable(QCA955X_GPIO_FUNC_JTAG_DISABLE|
QCA955X_GPIO_REG_OUT_FUNC4|
QCA955X_GPIO_REG_OUT_FUNC3);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapgsc_leds),
rbwapgsc_leds);
}
/*
* Init the wAP hardware (EXPERIMENTAL).
* The wAP 2nD has a single ethernet port.
*/
static void __init rbwap_setup(void)
{
u32 flags = RBSPI_HAS_WLAN;
if (rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
rbspi_network_setup(flags, 0, 1);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds), rbwap_leds);
}
/*
* Init the LHG hardware (AR9344).
* The LHG 5nD has a single ethernet port connected to PHY0.
* Wireless is provided via 5GHz WLAN1.
*/
static void __init rblhg_setup(void)
{
u32 flags = RBSPI_HAS_WLAN1 | RBSPI_HAS_MDIO1;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN1 MAC is HW MAC + 1 */
rbspi_network_setup(flags, 0, 0, 1);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rblhg_leds), rblhg_leds);
rbspi_register_reset_button(RBLHG_GPIO_BTN_RESET);
}
/*
* Init the hAP ac / 962UiGS-5HacT2HnT hardware (QCA9558).
* The hAP ac has 5 ethernet ports provided by an AR8337 switch. Port 1 is
* assigned to WAN, ports 2-5 are assigned to LAN. Port 0 is connected to the
* SoC, ports 1-5 of the switch are connected to physical ports 1-5 in order.
* The SFP cage is not assigned by default on RouterOS. Extra work is required
* to support this interface as it is directly connected to the SoC (eth1).
* Wireless is provided by a 2.4GHz radio on the SoC (WLAN1) and a 5GHz radio
* attached via PCI (QCA9880). Red and green WLAN LEDs are populated however
* they are not attached to GPIOs, extra work is required to support these.
* PoE and USB output power control is supported.
*/
static void __init rb962_setup(void)
{
u32 flags = RBSPI_HAS_USB | RBSPI_HAS_POE | RBSPI_HAS_PCI;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* Do not call rbspi_network_setup as we have a discrete switch chip */
ath79_eth0_pll_data.pll_1000 = 0xae000000;
ath79_eth0_pll_data.pll_100 = 0xa0000101;
ath79_eth0_pll_data.pll_10 = 0xa0001313;
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(rb962_mdio0_info,
ARRAY_SIZE(rb962_mdio0_info));
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
/* WLAN1 MAC is HW MAC + 7 */
rbspi_wlan_init(1, 7);
if (flags & RBSPI_HAS_USB)
gpio_request_one(RB962_GPIO_USB_PWROFF, GPIOF_ACTIVE_LOW |
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power off");
/* PoE output GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */
if (flags & RBSPI_HAS_POE)
gpio_request_one(RB962_GPIO_POE_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_ACTIVE_LOW |
GPIOF_EXPORT_DIR_FIXED,
"POE power");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rb962_leds_gpio),
rb962_leds_gpio);
/* This device has a single reset button as gpio 20 */
rbspi_register_reset_button(RB962_GPIO_BTN_RESET);
}
/*
* Init the hAP lite hardware (QCA953x).
* The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
* being assigned to LAN on the casing, and port 1 being assigned
* to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
* Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
*/
static void __init rbhapl_setup(void)
{
u32 flags = RBSPI_HAS_WLAN0;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 4 */
rbspi_network_setup(flags, 0, 4, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds), rbhapl_leds);
/* hAP lite has a single reset button as gpio 16 */
rbspi_register_reset_button(RBHAPL_GPIO_BTN_RESET);
}
/*
* Init the wAP hardware.
* The wAP 2nD has a single ethernet port.
*/
static void __init rbwap_setup(void)
{
u32 flags = RBSPI_HAS_WLAN0;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
rbspi_network_setup(flags, 0, 1, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds), rbwap_leds);
/* wAP has a single reset button as GPIO 16 */
rbspi_register_reset_button(RBWAP_GPIO_BTN_RESET);
}
/*
* Init the cAP hardware (EXPERIMENTAL).
* The cAP 2nD has a single ethernet port, and a global LED switch.
*/
static void __init rbcap_setup(void)
{
u32 flags = RBSPI_HAS_WLAN0;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
rbspi_network_setup(flags, 0, 1, 0);
gpio_request_one(RBCAP_GPIO_LED_ALL,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"LEDs enable");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds), rbcap_leds);
}
/*
* Init the hAP mini hardware (QCA953x).
* The 931-2nD (hAP mini) has 3 ethernet ports, with port 2-3
* being assigned to LAN on the casing, and port 1 being assigned
* to "internet" (WAN) on the casing. Port 1 is connected to PHY2.
* Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
*/
static void __init rb931_setup(void)
{
u32 flags = RBSPI_HAS_WLAN0;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 3 */
rbspi_network_setup(flags, 0, 3, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rb931_leds), rb931_leds);
/* hAP mini has two buttons */
ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(rb931_gpio_keys),
rb931_gpio_keys);
}
/*
* Init the hAP lite hardware.
* The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
* being assigned to LAN on the casing, and port 1 being assigned
* to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
* Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
*/
static void __init rbhapl_setup(void)
{
u32 flags = RBSPI_HAS_WLAN;
if (rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN MAC is HW MAC + 4 */
rbspi_network_setup(flags, 0, 4);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds), rbhapl_leds);
/* hAP lite has a single reset button as gpio 16 */
ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(rbspi_gpio_keys_reset16),
rbspi_gpio_keys_reset16);
}
/*
* Init the mAP hardware (EXPERIMENTAL).
* The mAP 2nD has two ethernet ports, PoE output and an SSR for LED
* multiplexing.
*/
static void __init rbmap_setup(void)
{
u32 flags = RBSPI_HAS_WLAN | RBSPI_HAS_SSR | RBSPI_HAS_POE;
if (rbspi_platform_setup())
return;
rbspi_spi_cs_gpios[1] = RBMAP_GPIO_SSR_CS;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN MAC is HW MAC + 2 */
rbspi_network_setup(flags, 0, 2);
if (flags & RBSPI_HAS_POE)
gpio_request_one(RBMAP_GPIO_POE_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"POE power");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds);
}
/*
* Init the mAP lite hardware (QCA953x).
* The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
* Trying to use GMAC0 in direct mode was unsucessful, so we're
* using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
* switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
*/
static void __init rbmapl_setup(void)
{
u32 flags = RBSPI_HAS_WLAN0;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
rbspi_network_setup(flags, 0, 1, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds), rbmapl_leds);
/* mAP lite has a single reset button as gpio 16 */
rbspi_register_reset_button(RBMAPL_GPIO_BTN_RESET);
/* clear internal multiplexing */
ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO);
}
/*
* Setup the 911L hardware (AR9344).
*/
static void __init rb911l_setup(void)
{
const struct rb_info *info;
info = rbspi_platform_setup();
if (!info)
return;
if (!rb_has_hw_option(info, RB_HW_OPT_NO_NAND)) {
/*
* Old hardware revisions might be equipped with a NAND flash
* chip instead of the 16MiB SPI NOR device. Those boards are
* not supported at the moment, so throw a warning and skip
* the peripheral setup to avoid messing up the data in the
* flash chip.
*/
WARN(1, "The NAND flash on this board is not supported.\n");
} else {
rbspi_peripherals_setup(0);
}
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
rbspi_wlan_init(0, 1);
rbspi_register_reset_button(RB911L_GPIO_BTN_RESET);
/* Make the eth LED controllable by software. */
ath79_gpio_output_select(RB911L_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rb911l_leds), rb911l_leds);
}
/*
* Init the mAP lite hardware.
* The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
* Trying to use GMAC0 in direct mode was unsucessful, so we're
* using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
* switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
*/
static void __init rbmapl_setup(void)
{
u32 flags = RBSPI_HAS_WLAN;
if (rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
rbspi_network_setup(flags, 0, 1);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds), rbmapl_leds);
/* mAP lite has a single reset button as gpio 16 */
ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(rbspi_gpio_keys_reset16),
rbspi_gpio_keys_reset16);
/* clear internal multiplexing */
ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO);
}
/*
* Init the wAP R hardware.
* The wAP R-2nD has a single ethernet port and a mini PCIe slot.
* The OEM source shows it has usb (used over PCIe for LTE devices),
* and the 'control' GPIO is assumed to be an output pin not tied to an LED.
*/
static void __init rbwapr_setup(void)
{
u32 flags = RBSPI_HAS_WLAN0 | RBSPI_HAS_USB | RBSPI_HAS_PCI;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
rbspi_network_setup(flags, 0, 1, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapr_leds), rbwapr_leds);
gpio_request_one(RBWAPR_GPIO_PCIE_PWROFF, GPIOF_OUT_INIT_HIGH |
GPIOF_ACTIVE_LOW | GPIOF_EXPORT_DIR_FIXED,
"PCIE power off");
gpio_request_one(RBWAPR_GPIO_CONTROL, GPIOF_OUT_INIT_LOW |
GPIOF_ACTIVE_LOW | GPIOF_EXPORT_DIR_FIXED,
"control");
rbspi_register_reset_button(RBWAPR_GPIO_BTN_RESET);
}