void default_exept_handle(unsigned int *sp, unsigned int arg) { // printf("Exception %d\n", arg); // printf("CAUSE=%08x EPC=%08x\n", read_c0_cause(), read_c0_epc()); // printf("SP= %08x\n", sp); // printf("AT= %08x ra= %08x fp= %08x gp= %08x\n",sp[27],sp[0],sp[1],sp[2]); // printf("t9= %08x t8= %08x s7= %08x S6= %08x\n",sp[3],sp[4],sp[5],sp[6]); // printf("s5= %08x s4= %08x s3= %08x s2= %08x\n",sp[7],sp[8],sp[9],sp[10]); // printf("s1= %08x s0= %08x t7= %08x t6= %08x\n",sp[11],sp[12],sp[13],sp[14]); // printf("t5= %08x t4= %08x t3= %08x t2= %08x\n",sp[15],sp[16],sp[17],sp[18]); // printf("t1= %08x t0= %08x a3= %08x a2= %08x\n",sp[19],sp[20],sp[21],sp[22]); // printf("a1= %08x a0= %08x v1= %08x v0= %08x\n",sp[23],sp[24],sp[25], sp[26]); // printf("\n"); // printf("c_except_handler: while(1)"); // printf("\n"); // while(1); __except_sp = sp; __except_arg = arg; __except_cause = read_c0_cause(); __except_epc = read_c0_epc(); write_32bit_cp0_register(CP0_EPC, _except_idle); __asm__ __volatile__("eret\n\t"); }
void rsv_ins_except(unsigned int arg) { unsigned int cause; unsigned int epc; unsigned int *ins; unsigned int i; cause = read_c0_cause(); epc = read_c0_epc(); printf("Reserved Instruction Exception\n"); printf("CAUSE=%08x EPC=%08x\n", cause, epc); ins = (unsigned int*)epc -5; for(i= 0; i < 10; i++) { printf("%08x: %08x\n", ins, *ins++); } printf("\n"); printf("c_except_handler: while(1)"); printf("\n"); while(1); }
int ath_be_handler(struct pt_regs *regs, int is_fixup) { #ifdef CONFIG_MACH_AR934x printk("ath data bus error: cause 0x%x epc 0x%x\nrebooting...", read_c0_cause(), read_c0_epc()); ath_restart(NULL); #else printk("ath data bus error: cause %#x\n", read_c0_cause()); #endif return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); }
void exception_handler(unsigned int *sp) { int i; printf("CAUSE = %08x EPC = %08x\n", read_c0_cause(), read_c0_epc()); for (i = 0; i < 32; i++) { if ((i % 4) == 0) { printf("\n"); } printf("%4s %08x ", regstr[i], sp[i]); } printf("\n"); while(1); }
PUBLIC void Jdb_kern_info_cpu::dump_cp0_regs() { Mword val; DUMP_CP0("EBase", read_c0_ebase(), val); DUMP_INT("Ebase.CPUNum", (val & 0x3ff)); DUMP_CP0("EntryHi", read_c0_entryhi(), val); DUMP_HEX("EntryHi.ASID", (val & 0xff)); DUMP_CP0("EPC", read_c0_epc(), val); DUMP_CP0("Status", read_c0_status(), val); DUMP_CP0("Cause", read_c0_cause(), val); DUMP_CP0("PRId", read_c0_prid(), val); DUMP_CP0("HWREna", read_c0_hwrena(), val); DUMP_CP0("Config", read_c0_config(), val); if (val & MIPS_CONF_M) { DUMP_CP0("Config1", read_c0_config1(), val); if (val & MIPS_CONF_M) { DUMP_CP0("Config2", read_c0_config2(), val); if (val & MIPS_CONF_M) { DUMP_CP0("Config3", read_c0_config3(), val); if (val & MIPS_CONF3_ULRI) DUMP_CP0("UserLocal", read_c0_userlocal(), val); } } } if (cpu_has_vz) DUMP_CP0("GuestCtl0", read_c0_guestctl0(), val); if (cpu_has_guestctl0ext) DUMP_CP0("GuestCtl0Ext", read_c0_guestctl0ext(), val); if (cpu_has_vz) DUMP_CP0("GTOffset", read_c0_gtoffset(), val); if (cpu_has_guestctl1) { DUMP_CP0("GuestCtl1", read_c0_guestctl1(), val); DUMP_HEX("GuestCtl1.ID", (val & GUESTCTL1_ID)); } if (cpu_has_guestctl2) { DUMP_CP0("GuestCtl2", read_c0_guestctl2(), val); DUMP_HEX("GuestCtl2.VIP", (val & GUESTCTL2_VIP)); } }
void watch_except(unsigned int arg) { unsigned int *sp; sp = (unsigned int*)arg; printf("Watch Exception\n"); printf("CAUSE=%08x EPC=%08x\n", read_c0_cause(), read_c0_epc()); printf("SP= %08x\n", sp); printf("AT= %08x ra= %08x fp= %08x gp= %08x\n",sp[27],sp[0],sp[1],sp[2]); printf("t9= %08x t8= %08x s7= %08x S6= %08x\n",sp[3],sp[4],sp[5],sp[6]); printf("s5= %08x s4= %08x s3= %08x s2= %08x\n",sp[7],sp[8],sp[9],sp[10]); printf("s1= %08x s0= %08x t7= %08x t6= %08x\n",sp[11],sp[12],sp[13],sp[14]); printf("t5= %08x t4= %08x t3= %08x t2= %08x\n",sp[15],sp[16],sp[17],sp[18]); printf("t1= %08x t0= %08x a3= %08x a2= %08x\n",sp[19],sp[20],sp[21],sp[22]); printf("a1= %08x a0= %08x v1= %08x v0= %08x\n",sp[23],sp[24],sp[25], sp[26]); printf("\n"); printf("c_except_handler: while(1)"); printf("\n"); while(1); }
void cache_error_handler(void) { rt_kprintf("cache exception happens, epc: 0x%08x\n", read_c0_epc()); rt_hw_cpu_shutdown(); }
void tlb_refill_handler(void) { rt_kprintf("tlb-miss happens, epc: 0x%08x\n", read_c0_epc()); rt_hw_cpu_shutdown(); }