static int strcmp_call(void *opaque)
{
int read_err = 0;
int i = 0;
strcmp_value *scv=malloc(sizeof (strcmp_value));
if(tracepid == 0)
{
return 0;
}
read_reg(esp_reg, &esp);
read_reg(eip_reg, &eip);
read_err = read_mem(esp, 4, (unsigned char*)buf);
if (read_err)
return 0;
scv->string1=buf[1];
scv->string2=buf[2];
char string_cmd[20];
char string_list[20];
bool read_cmd =read_mem(scv->string1, 20, (unsigned char*)string_cmd);
bool read_list=read_mem(scv->string2, 20, (unsigned char*)string_list);
scv->hook_handle=hookapi_hook_return(buf[0], strcmp_ret, scv, sizeof(scv));
return 0;
}
SCOPE int
replay_tty_ioctl(int fd, uint32_t cmd, uint32_t arg,
const struct syscall_regs * regs)
{
/* write eax is done in ioctl.c */
int32_t eax = read_int32();
switch (cmd) {
case TCGETS:
if (arg != 0)
read_mem(arg, sizeof(struct termios));
return eax;
case TIOCGWINSZ:
if (arg != 0)
read_mem(arg, sizeof(struct winsize));
return eax;
case FIONREAD:
if (arg != 0)
read_mem(arg, sizeof(int));
return eax;
case FIONBIO:
return eax;
case TCGETA:
if (arg != 0)
read_mem(arg, sizeof(struct termio));
return eax;
case TCSETA:
return eax;
default:
INJ_WARNING("doesn't know such tty ioctl: 0x%x\n", cmd);
__exit(-1);
}
return eax;
}
void __interrupt() {
irq_received = 1;
/* check if vga requested interrupt */
uint32_t vga_irq = read_mem(VGA_BASEADDR + VGA_INT_OFFSET);
if (vga_irq) {
/* call the service routine */
vga_isr();
/* clear interrupt */
write_mem(VGA_BASEADDR + VGA_INT_OFFSET, vga_irq);
}
/* check if timer 0 requested interrupt */
uint32_t timer_0_csr = read_mem(TIMER_BASEADDR + TIMER_0_CSR_OFFSET);
if (timer_0_csr & TIMER_INTERRUPT) {
/* call the service routine */
timer_0_isr();
/* clear the timer interrupt */
write_mem(TIMER_BASEADDR + TIMER_0_CSR_OFFSET, timer_0_csr);
}
uint32_t timer_1_csr = read_mem(TIMER_BASEADDR + TIMER_1_CSR_OFFSET);
if (timer_1_csr & TIMER_INTERRUPT) {
/* call the service routine */
timer_1_isr();
/* clear the timer interrupt */
write_mem(TIMER_BASEADDR + TIMER_1_CSR_OFFSET, timer_1_csr);
}
/* check if uart requested interrupt */
/* FIXME: no uart in TLM platform */
}
int SCOPE
replay__newselect(const struct syscall_regs * regs)
{
int32_t eax = read_int32();
int n;
uint32_t inp;
uint32_t outp;
uint32_t exp;
read_obj(n);
read_obj(inp);
read_obj(outp);
read_obj(exp);
ASSERT(n == regs->ebx, regs, "");
ASSERT(inp == regs->ecx, regs, "");
ASSERT(outp == regs->edx, regs, "");
ASSERT(exp == regs->esi, regs, "");
int fd_bytes = FDS_BYTES(n);
if (inp != 0)
read_mem(inp, fd_bytes);
if (outp != 0)
read_mem(outp, fd_bytes);
if (exp != 0)
read_mem(exp, fd_bytes);
return eax;
}
/* Return hook (executed after the return instruction) */
static int getsockname_ret(void *opaque)
{
static int offset = 0;
int read_err = 0;
uint32_t bufRealLen = 0;
getsockname_t *s = (getsockname_t *)opaque;
struct sockaddr_in addrData;
char addrStr[INET_ADDRSTRLEN];
/* Remove return hook */
hookapi_remove_hook(s->hook_handle);
/* Check return value -> status */
uint32_t eax = 0;
read_reg(eax_reg, &eax);
if (eax != 0) return 0;
/* Read size of address structure */
read_err = read_mem(s->bufLenPtr, 4, (unsigned char*)&bufRealLen);
if (!read_err) {
WRITE ("tracenetlog","\tNumBytesWritten: %u\n",bufRealLen);
}
else {
WRITE ("tracenetlog","\tCould not get number of bytes written\n");
return 0;
}
/* Read the address structure */
read_err = read_mem(s->bufStart, 16, (unsigned char*)&addrData);
if (read_err) return 0;
/* Print the address structure */
inet_ntop(AF_INET, &addrData.sin_addr, addrStr, sizeof(addrStr));
WRITE ("tracenetlog","\tFamily: %d Port: %u Address: %s\n",
addrData.sin_family,ntohs(addrData.sin_port),addrStr);
/* Taint address structure */
if (bufRealLen > 0) {
hook_taint_record_t tr;
tr.source = TAINT_SOURCE_API_SOCK_INFO_IN;
tr.origin = GETSOCKNAME_ORIGIN;
tr.offset = offset;
taint_mem(s->bufStart+2, 6, (void *)&tr);
}
/* Increment the taint offset */
offset += 6;
/* Free structure used to pass info between call and return hooks */
if (s) free(s);
return 0;
}
int SCOPE
replay_wait4(const struct syscall_regs * regs)
{
int32_t eax = read_int32();
uintptr_t stat_addr = read_uint32();
ASSERT(stat_addr == regs->ecx, regs, "stat_addr inconsistent\n");
if (stat_addr != 0)
read_mem(stat_addr, sizeof(int));
uintptr_t ru = read_uint32();
ASSERT(ru == regs->esi, regs, "ru inconsistent\n");
if (ru != 0)
read_mem(ru, sizeof(struct rusage));
return eax;
}
void dump_memory_contents(const char cmd, char * data){
char buf[64];
bool printed_ellipsis = false;
Serial.println("Memory:");
for (uint16_t i = targetDeviceRomOffset; i < targetDeviceRomOffset+targetDeviceRomSize; i += 8) {
uint8_t mem[] = {
read_mem(i+0), read_mem(i+1), read_mem(i+2), read_mem(i+3),
read_mem(i+4), read_mem(i+5), read_mem(i+6), read_mem(i+7),
};
bool all_zero = true;
for (int i = 0; i < 8; i++)
all_zero = all_zero && mem[i] == 0;
if (!all_zero || i == targetDeviceRomOffset || i == targetDeviceRomOffset+targetDeviceRomSize-8) {
sprintf(
buf,
"%04x: %02x %02x %02x %02x %02x %02x %02x %02x",
i,
mem[0], mem[1], mem[2], mem[3],
mem[4], mem[5], mem[6], mem[7]
);
printed_ellipsis = false;
Serial.println(buf);
} else {
if (!printed_ellipsis) {
Serial.println("...");
printed_ellipsis = true;
}
}
}
}
void ldm1_inst(int inst, ARMProc *proc) {
int i;
LSMAddrResult *result;
LSMAddrResult *(*func)(int, ARMProc *);
int register_list;
int address;
int start_address;
int end_address;
int value;
int **reg;
if(!check_condition(proc, inst))
return;
register_list = getbits(inst, 0, 16);
lsm_addr_modes = lsm_addressing_dict();
reg = &proc->r0;
for(i = 0; i < LSM_ADDRESSING_NUMBER; i++) {
if(test_inst(lsm_addr_modes[i], inst)) {
func = lsm_addr_modes[i]->execute;
result = (*func)(inst, proc);
break;
}
}
start_address = result->start_address;
end_address = result->end_address;
address = start_address;
for(i = 0; i < 15; i++) {
if(getbit(register_list, i)) {
**(reg + i) = read_mem(proc, address, 4);
address += 4;
}
}
if(getbit(register_list, 15)) {
value = read_mem(proc, address, 4);
*proc->pc = value & 0xFFFFFFFE;
address += 4;
}
if(end_address != address - 4) {
fprintf(stderr, "Load memory error");
}
}
/*
* Handle ioctl() calls from userspace:
* Note extensive error checking of arguments
*/
static long equalizer_driver_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
{
u16 *dataArray = kmalloc(SAMPLEBYTES, GFP_KERNEL); //allocating space for data array
switch (cmd) {
case FFT_DRIVER_WRITE_DIGIT:
if (copy_from_user(dataArray, (u16 *) arg,
sizeof(u16)))
return -EACCES;
write_mem(dataArray); //write dataArray
break;
case FFT_DRIVER_READ_DIGIT:
if (copy_from_user(dataArray, (u16*) arg,
sizeof(u16)))
return -EACCES;
read_mem(dataArray); //read from dataArray
if (copy_to_user((u16 *) arg, dataArray,
sizeof(u16)))
return -EACCES;
break;
default:
return -EINVAL;
}
return 0;
}
uint8_t ds2431_read(void)
{
uint8_t i, rt = 0;
for (i = 0; i < 10; i ++)
{
ow_rst();
udelay(9000);
rt = read_rom();
if (rt == 1)
{
//ROM读取成功，则读取MEM
rt = read_mem();
if (rt == 1)
{
//都读取成功，则退出
return 1;
}
}
}
//读取失败
return 0;
}
void
vionet_notify_rx(struct vionet_dev *dev)
{
uint64_t q_gpa;
uint32_t vr_sz;
char *vr;
struct vring_avail *avail;
vr_sz = vring_size(VIONET_QUEUE_SIZE);
q_gpa = dev->vq[dev->cfg.queue_notify].qa;
q_gpa = q_gpa * VIRTIO_PAGE_SIZE;
vr = malloc(vr_sz);
if (vr == NULL) {
log_warn("malloc error getting vionet ring");
return;
}
if (read_mem(q_gpa, vr, vr_sz)) {
log_warnx("error reading gpa 0x%llx", q_gpa);
free(vr);
return;
}
/* Compute offset into avail ring */
avail = (struct vring_avail *)(vr +
dev->vq[dev->cfg.queue_notify].vq_availoffset);
dev->rx_added = 1;
dev->vq[0].notified_avail = avail->idx;
free(vr);
}
cl_int Dgemm_internal(
cl_env *env, double *a, double *b, double *c, double alpha, double beta,
clblasTranspose transA, clblasTranspose transB,
int ar, int ac, int br, int bc, int cr, int cc, int size_a, int size_b, int size_c)
{
CHECK(clblasSetup());
cl_event events[NEVENTS];
int nevent = 0;
cl_mem mem_a = create_mem(env, a, size_a, CL_MEM_READ_ONLY, &(events[nevent++]));
cl_mem mem_b = create_mem(env, b, size_b, CL_MEM_READ_ONLY, &(events[nevent++]));
cl_mem mem_c;
if (beta != 0) mem_c = create_mem(env, c, size_c, CL_MEM_READ_WRITE, &(events[nevent++]));
else mem_c = create_mem(env, NULL, size_c, CL_MEM_READ_WRITE, NULL);
cl_int err = clblasDgemm(clblasColumnMajor, transA, transB,
ar, bc, ac, alpha, mem_a, 0, ar, mem_b, 0, br, beta, mem_c, 0, cr,
1, &(env->queues[0]), nevent, events, &(events[nevent]));
CHECK(err);
events[nevent+1] = *read_mem(env, mem_c, c, size_c, 1, &(events[nevent]));
CHECK(clWaitForEvents(1, &(events[nevent+1])));
CHECK(clReleaseMemObject(mem_a));
CHECK(clReleaseMemObject(mem_b));
CHECK(clReleaseMemObject(mem_c));
clblasTeardown();
return CL_SUCCESS;
}
void ldrb_inst(int inst, ARMProc *proc) {
int i;
int address;
int (*func)(int, ARMProc *);
int rd;
int data;
int **rd_ptr;
if(!check_condition(proc, inst))
return;
ls_addr_modes = ls_addressing_dict();
rd = getbits(inst, 12, 4);
rd_ptr = &proc->r0;
rd_ptr += rd;
for(i = 0; i < LS_ADDRESSING_NUMBER; i++) {
if(test_inst(ls_addr_modes[i], inst)) {
func = ls_addr_modes[i]->execute;
address = (*func)(inst, proc);
break;
}
}
data = read_mem(proc, address, 1);
**rd_ptr = data;
}
void ldr_inst(int inst, ARMProc *proc) {
int i;
int address;
int rd;
int **rd_ptr;
int (*func)(int, ARMProc *);
int data;
if(!check_condition(proc, inst))
return;
ls_addr_modes = ls_addressing_dict();
for(i = 0; i < LS_ADDRESSING_NUMBER; i++) {
if(test_inst(ls_addr_modes[i], inst)) {
printf("Addressing mode: %d\n", i);
func = ls_addr_modes[i]->execute;
address = (*func)(inst, proc);
break;
}
}
rd = getbits(inst, 12, 4);
rd_ptr = &proc->r0;
rd_ptr += rd;
data = read_mem(proc, address, 4);
if(rd == 15) {
**rd_ptr = data & 0xfffffffe;
} else {
**rd_ptr = data;
}
}
void breakpoint(mach_vm_address_t addr) {
// Set the breakpoint to the given address
//addr = (mach_vm_address_t)0x0000000100000ea0;
//addr = vm_map_trunc_page(0x0000000100000ea0UL);// / 8;
//addr = vm_map_trunc_page(0x00000001);// / 8;
addr = vm_map_trunc_page(0x7fff5e8a6c08);// / 8;
//(mach_vm_address_t)0; //0x00000ea0;
//00 00 00 01 00 00 0e a0
//a0 0e 00 00 01 00 00 00
std::cerr << "Breaking at " << std::hex << (intptr_t)addr << std::dec << std::endl;
//char* trap = new char[PAGE_SIZE];
// trap[0] = char(0xcd);
// trap[1] = char(0x80);
// trap[2] = char(0xcc);
// trap[3] = 0x00;
// char* backup = new char[PAGE_SIZE];
mach_vm_address_t trap = 0;
mach_vm_address_t backup = 0;
error(mach_vm_allocate(mach_task_self(), &trap, PAGE_SIZE, VM_FLAGS_ANYWHERE));
error(mach_vm_allocate(mach_task_self(), &backup, PAGE_SIZE, VM_FLAGS_ANYWHERE));
read_mem(addr, backup, PAGE_SIZE);
write_mem(addr, trap, PAGE_SIZE);
// Set up the breakpoint by replacing it with an INT instruction
}
int SCOPE
replay_rt_sigaction(const struct syscall_regs * regs)
{
int32_t eax = read_int32();
if (eax == 0) {
int sigsetsize = read_int32();
ASSERT(sigsetsize == regs->esi, regs, "");
ASSERT(sigsetsize == sizeof(k_sigset_t), regs, "!@@#1\n");
uintptr_t oact = read_uint32();
ASSERT(oact == regs->edx, regs, "oact inconsistent: 0x%x != 0x%x\n",
regs->edx, oact);
uintptr_t act = read_uint32();
ASSERT(act == regs->ecx, regs, "act inconsistent: 0x%x != 0x%x\n",
regs->ecx, act);
if (oact != 0)
read_mem(oact, sizeof(struct k_sigaction));
/* we need trace sighandler even in replay */
if (act != 0)
__dup_mem(&state_vector.sigactions[regs->ebx], act,
sizeof(struct k_sigaction));
}
return eax;
}
int get_next_line(int const fd, char **line)
{
static t_list *lst = NULL;
t_mem *mem;
int ret;
char *buf;
if (!line || !(BUFF_SIZE > 0) || !(mem = get_mem(fd, &lst)))
return (-1);
if (!(ret = read_mem(mem, line)))
{
if (!(buf = ft_strnew(BUFF_SIZE)))
return (-1);
while ((ret = read(fd, buf, BUFF_SIZE)))
{
if (ret < 0)
return (free_str_return(buf, -1));
buf[ret] = '\0';
if ((ret = read_buf(buf, mem, line)))
return (free_str_return(buf, ret));
}
if (**line)
return (free_str_return(buf, 1));
return (free_str_return(buf, 0));
}
return (ret);
}
static int
remote_access_raw_mem (unw_addr_space_t as, unw_word_t addr,
void* buf, size_t size, int write, void *arg)
{
Debug (3, "called, addr 0x%lx, size %lu\n", (long) addr, (long) size);
unw_fuchsia_info_t* cxt = arg;
zx_handle_t process = cxt->process;
if (write)
{
Debug (3, "writing to mem\n");
return -UNW_EINVAL;
}
zx_status_t status = read_mem (process, addr, buf, size);
if (status < 0)
{
Debug (3, "read failed: %d\n", status);
return -UNW_EINVAL;
}
char dump[3 * 8 + 1];
size_t to_dump = 8;
if (size < 8)
to_dump = size;
fill_hex (dump, sizeof(dump), buf, to_dump);
Debug (3, "returning 0, val %s%s\n", dump, to_dump < size ? " ..." : "");
return 0;
}
/* Initialize the module - Register the character device */
int init_module(void) {
int ret_val;
char buffer[256];
/* Register the character device */
ret_val = register_chrdev(MAJOR_NUM, DEVICE_NAME, &Fops);
if (ret_val < 0) {
printk(KERN_ALERT "%s failed with %d\n",
"Sorry, registering the character device ", ret_val);
return ret_val;
}
printk(KERN_INFO "%s The major device number is %d.\n",
"Registration is a success", MAJOR_NUM);
buddy_allocator = start_balloc(MEM_SIZE);
if(!buddy_allocator) printk("ERROR: bud allocator was not allocated\n");
// custom print fcn that prints all leaf nodes (mem blocks) in the allocator
printb(buddy_allocator);
// FROM LAB DESCRIPTION (init test)
ref = get_mem(buddy_allocator, 100);
sprintf(buffer, "Hello buddy\n");
write_mem(&buddy_allocator, ref, buffer);
read_mem(buddy_allocator, ref+3, buffer, 10);
printk("init module (allocator) test buffer: %s\n", buffer); // buffer: lo buddy
readDone = false;
//free_mem(&buddy_allocator, ref);
return 0;
}
static int prep_injection(void)
{
/* enabled(=madvise) in /sys/kernel/mm/transparent_hugepage/. */
if (request_thp_with_madvise((unsigned long)mem_addr) < 0) {
print_err("Failed to request THP for [madvise] in enabled.\n");
return THP_FAILURE;
}
write_mem(mem_addr, REQ_MEM_SIZE);
if (read_mem(mem_addr, REQ_MEM_SIZE, 0) < 0) {
print_err("Data is Mismatched(prep_injection).\n");
return THP_FAILURE;
}
/* find the address of THP. */
thp_addr = find_thp_addr((unsigned long)mem_addr, REQ_MEM_SIZE);
if (!thp_addr) {
print_err("No THP mapped.\n");
return THP_FAILURE;
}
/* Calculate the address of the page which will be poisoned */
if (corrupt_page < 0)
corrupt_page = 0;
corrupt_page_addr = (char *)(thp_addr + corrupt_page * DEFAULT_PS);
/* Process will be killed here by kernel(SIGBUS AO). */
prctl(PR_MCE_KILL, PR_MCE_KILL_SET,
early_kill ? PR_MCE_KILL_EARLY : PR_MCE_KILL_LATE,
NULL, NULL);
return THP_SUCCESS;
}
// with this macro, it means there are another implement for client. so, we
// shouldn't compile main function
int main()
{
MemInfo mem;
if(s_g_init())
return 0;
#if 0
/*
* 使用sysconf获取内存信息的方法，因为数据少而放弃
*/
ulong pagesize = sysconf(_SC_PAGESIZE)/1024;//kb
while(1){
ulong tot = sysconf(_SC_PHYS_PAGES)*pagesize;
ulong free = sysconf(_SC_AVPHYS_PAGES)*pagesize;
mem.tot_mem = tot;
mem.free_mem = free;
printf("tot:%lu,free:%lu\n",tot,free);
s_g_write_mem(mem);
sleep(1);
}
#endif
while(1){
read_mem(&mem);
printf("tot:%lld,free:%lld\n",mem.tot_mem,mem.free_mem);
s_g_write_mem(mem);
sleep(1);
}
s_g_close();
}
int main(int argc, char* argv[])
{
signal(SIGINT, Exit);
signal(SIGTERM, Exit);
uint32_t i,j, err_flag;
err_flag = 0;
init_cache();
for(i = 0; i < 2048; i++)
{
write_mem(i,i);
}
for(i = 0; i < 2048; i++)
{
j = read_mem(i);
if(j != i)
{
fprintf(stderr,"Error: expected %d, read %d\n", i,j);
err_flag = 1;
}
}
fprintf(stderr,"Test finished, %s\n", (err_flag ? "with errors" : "successfully"));
return(0);
}
int SCOPE
replay_socketpair(int family, int type, int protocol, uintptr_t usockvec,
int retval, const struct syscall_regs * regs)
{
if (retval >= 0)
read_mem(usockvec, 2 * sizeof(int));
return retval;
}
static void test_ivshmem_pair(void)
{
IVState state1, state2, *s1, *s2;
char *data;
int i;
setup_vm(&state1);
s1 = &state1;
setup_vm(&state2);
s2 = &state2;
data = g_malloc0(TMPSHMSIZE);
/* host write, guest 1 & 2 read */
memset(tmpshmem, 0x42, TMPSHMSIZE);
read_mem(s1, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x42);
}
read_mem(s2, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x42);
}
/* guest 1 write, guest 2 read */
memset(data, 0x43, TMPSHMSIZE);
write_mem(s1, 0, data, TMPSHMSIZE);
memset(data, 0, TMPSHMSIZE);
read_mem(s2, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x43);
}
/* guest 2 write, guest 1 read */
memset(data, 0x44, TMPSHMSIZE);
write_mem(s2, 0, data, TMPSHMSIZE);
memset(data, 0, TMPSHMSIZE);
read_mem(s1, 0, data, TMPSHMSIZE);
for (i = 0; i < TMPSHMSIZE; i++) {
g_assert_cmpuint(data[i], ==, 0x44);
}
cleanup_vm(s1);
cleanup_vm(s2);
g_free(data);
}
int SCOPE
replay_pread64(const struct syscall_regs * regs)
{
int32_t eax = read_int32();
if (eax > 0)
read_mem(regs->ecx, eax);
return eax;
}
int get_pixel(uint32_t base_addr, int x, int y) {
uint32_t addr = base_addr +
ALIGN( (x / CHAR_BIT) + (y * (VGA_LINE / CHAR_BIT)) );
int bit = 31 - x % (sizeof(uint32_t) * CHAR_BIT);
uint32_t data = read_mem(addr);
return (TEST_BIT(data, bit) != 0);
}
int SCOPE
replay_lstat64(const struct syscall_regs * regs)
{
int32_t eax = read_int32();
if (eax >= 0) {
read_mem(regs->ecx, sizeof(struct stat64));
}
return eax;
}
/*
void CMainDlg::OnBnClickedFlRead()
{
CBusy busy;
BOARD_MEM imageOut;
if(!m_BootConnected)
return;
EnableControlBtn(false);
reset_S19image(&imageOut);
if(read_mem(&imageOut) >= 0)
{
// save image!!
CString fileName,pathName;
CFileDialog dlg(TRUE,NULL,NULL,(OFN_HIDEREADONLY | OFN_OVERWRITEPROMPT),_T("S19 files (*.s19;*.sx;*.srec)|*.s19; *.sx; *.srec|MOT files (*.mot)|*.mot|All files (*.*)|*.*||"));
if(dlg.DoModal() == IDOK)
{
pathName = dlg.GetPathName();
fileName=dlg.GetFileName();
if(write_s19(pathName.GetBuffer(), &imageOut)<0)
{
MessageBox("Write output file operation failed.", "Read image Error", MB_ICONERROR | MB_OK);
}
}else
MessageBox("Open output file operation failed.", "Read image Error", MB_ICONERROR | MB_OK);
}else
{
MessageBox("Read image operation failed.", "Read image Error", MB_ICONERROR | MB_OK);
}
LogResetReplaceLine();
ProgressChanged(100);
LogResetReplaceLine();
EnableControlBtn(true);
}
*/
void CMainDlg::OnBnClickedFlRead()
{
CBusy busy;
BOARD_MEM* pImageOut;
myprintf("/n Experimental feature!!!");
if(!m_BootConnected)
return;
pImageOut = (BOARD_MEM*)malloc(sizeof(BOARD_MEM));
EnableControlBtn(false);
reset_S19image(pImageOut);
if(read_mem(pImageOut, 1) >= 0)
{
// save image!!
CString fileName,pathName;
CFileDialog dlg(TRUE,NULL,NULL,(OFN_HIDEREADONLY | OFN_OVERWRITEPROMPT),_T("S19 files (*.s19;*.sx;*.srec)|*.s19; *.sx; *.srec|MOT files (*.mot)|*.mot|All files (*.*)|*.*||"));
if(dlg.DoModal() == IDOK)
{
pathName = dlg.GetPathName();
fileName=dlg.GetFileName();
if(write_s19(pathName.GetBuffer(), pImageOut)<0)
{
MessageBox("Write output file operation failed.", "Read image Error", MB_ICONERROR | MB_OK);
}
}else
MessageBox("Open output file operation failed.", "Read image Error", MB_ICONERROR | MB_OK);
}else
{
MessageBox("Read image operation failed.", "Read image Error", MB_ICONERROR | MB_OK);
}
free(pImageOut);
LogResetReplaceLine();
ProgressChanged(100);
LogResetReplaceLine();
EnableControlBtn(true);
}
int SCOPE
replay_time(const struct syscall_regs * regs)
{
int32_t eax = read_int32();
int32_t ebx = read_int32();
ASSERT(ebx == regs->ebx, regs, "");
if (ebx != 0)
read_mem(ebx, sizeof(time_t));
return eax;
}
int SCOPE
replay_gettimeofday(const struct syscall_regs * regs)
{
int32_t eax = read_int32();
if (eax >= 0) {
uintptr_t TP, TZP;
read_obj(TP);
read_obj(TZP);
ASSERT(TP == regs->ebx, regs, "TP inconsistent\n");
ASSERT(TZP == regs->ecx, regs, "TZP inconsistent\n");
if (TP != 0)
read_mem(TP, sizeof(struct k_timeval));
if (TZP != 0)
read_mem(TZP, sizeof(struct k_timezone));
}
return eax;
}
