/**
* int reset_and_enable_port(const u8 port)
*
* @brief Reset port and make enable status the specific port
*
* @param [IN] port : port number
*
* @return USB_ERR_SUCCESS : If success \n
* USB_ERR_FAIL : If call fail \n
*
* @remark
*
*/
int reset_and_enable_port(const u8 port)
{
hprt_t hprt;
u32 count = 0;
u32 max_error_count = 1000;
mdelay(50);
hprt.d32 = read_reg_32(HPRT);
if(!hprt.b.prtena)
{
hprt.b.prtrst = 1; // drive reset
write_reg_32(HPRT, hprt.d32);
mdelay(80);
hprt.b.prtrst = 0;
write_reg_32(HPRT, hprt.d32);
mdelay(60);
do
{
hprt.d32 = read_reg_32(HPRT);
udelay(10);
if(count > max_error_count)
{
otg_dbg(OTG_DBG_ROOTHUB,"Port Reset Fail : HPRT : 0x%x\n",(u16)read_reg_32(HPRT));
return USB_ERR_FAIL;
}
count++;
}while(!hprt.b.prtena);
}
return USB_ERR_SUCCESS;
}
/*Internal function of isr */
static void process_port_intr(struct usb_hcd *hcd)
{
hprt_t hprt; /* by ss1, clear_hprt; */
struct sec_otghost *otghost = hcd_to_sec_otghost(hcd);
hprt.d32 = read_reg_32(HPRT);
otg_dbg(OTG_DBG_ISR, "Port Interrupt() : HPRT = 0x%x\n", hprt.d32);
if (hprt.b.prtconndet) {
otg_dbg(true, "detect connection");
otghost->port_flag.b.port_connect_status_change = 1;
if (hprt.b.prtconnsts)
otghost->port_flag.b.port_connect_status = 1;
/* wake_lock(&otghost->wake_lock); */
}
if (hprt.b.prtenchng) {
otg_dbg(true, "port enable/disable changed\n");
otghost->port_flag.b.port_enable_change = 1;
// kevinh - it seems the hw implicitly disables the interface on unplug, so mark that we are unplugged
if(!hprt.b.prtconnsts) {
otghost->port_flag.b.port_connect_status_change = 1;
otghost->port_flag.b.port_connect_status = 0;
}
}
if (hprt.b.prtovrcurrchng) {
otg_dbg(true, "over current condition is changed\n");
if (hprt.b.prtovrcurract) {
otg_dbg(true, "port_over_current_change = 1\n");
otghost->port_flag.b.port_over_current_change = 1;
} else {
otghost->port_flag.b.port_over_current_change = 0;
}
/* defer otg power control into a kernel thread */
queue_work(otghost->wq, &otghost->work);
}
hprt.b.prtena = 0; /* prtena를 writeclear시키면 안됨. */
/* hprt.b.prtpwr = 0; */
hprt.b.prtrst = 0;
hprt.b.prtconnsts = 0;
write_reg_32(HPRT, hprt.d32);
}
static int s3c6410_otg_drv_probe (struct platform_device *pdev)
{
int ret_val = 0;
u32 reg_val = 0;
otg_dbg(OTG_DBG_OTGHCDI_DRIVER, "s3c_otg_drv_probe \n");
otg_clock = clk_get(&pdev->dev, "otg");
if (otg_clock == NULL) {
printk(KERN_INFO "failed to find otg clock source\n");
return -ENOENT;
}
clk_enable(otg_clock);
///init for host mode
/**
Allocate memory for the base HCD & Initialize the base HCD.
*/
g_pUsbHcd = usb_create_hcd(&s3c6410_otg_hc_driver, &pdev->dev, dev_name(&pdev->dev));
if (g_pUsbHcd == NULL)
{
ret_val = -ENOMEM;
otg_err(OTG_DBG_OTGHCDI_DRIVER, "failed to usb_create_hcd\n");
goto err_out_clk;
}
// mapping hcd resource & device resource
g_pUsbHcd->rsrc_start = pdev->resource[0].start;
g_pUsbHcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
if (!request_mem_region(g_pUsbHcd->rsrc_start, g_pUsbHcd->rsrc_len, gHcdName))
{
otg_err(OTG_DBG_OTGHCDI_DRIVER, "failed to request_mem_region\n");
reg_val = -EBUSY;
goto err_out_create_hcd;
}
//Physical address => Virtual address
g_pUsbHcd->regs = S3C_VA_OTG;
g_pUsbHcd->self.otg_port = 1;
g_pUDCBase = (u8 *)g_pUsbHcd->regs;
/// call others' init()
reg_val = otg_hcd_init_modules();
if( reg_val != USB_ERR_SUCCESS)
{
otg_err(OTG_DBG_OTGHCDI_DRIVER, "failed to otg_hcd_init_modules\n");
reg_val = USB_ERR_FAIL;
goto err_out_create_hcd;
}
/**
* Attempt to ensure this device is really a s3c6410 USB-OTG Controller.
* Read and verify the SNPSID register contents. The value should be
* 0x45F42XXX, which corresponds to "OT2", as in "OTG version 2.XX".
*/
//reg_val = read_reg_32((unsigned int *)((u8 *)g_pUsbHcd->regs + 0x40));
reg_val = read_reg_32(0x40);
if ((reg_val & 0xFFFFF000) != 0x4F542000)
{
otg_err(OTG_DBG_OTGHCDI_DRIVER, "Bad value for SNPSID: 0x%x\n", reg_val);
ret_val = -EINVAL;
goto err_out_create_hcd_init;
}
/*
* Finish generic HCD initialization and start the HCD. This function
* allocates the DMA buffer pool, registers the USB bus, requests the
* IRQ line, and calls s3c6410_otghcd_start method.
*/
ret_val = usb_add_hcd(g_pUsbHcd, pdev->resource[1].start, IRQF_DISABLED);
if (ret_val < 0)
{
goto err_out_create_hcd_init;
}
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,"OTG HCD Initialized HCD, bus=%s, usbbus=%d\n",
"EMSP OTG Controller", g_pUsbHcd->self.busnum);
return USB_ERR_SUCCESS;
err_out_create_hcd_init:
otg_hcd_deinit_modules();
release_mem_region(g_pUsbHcd->rsrc_start, g_pUsbHcd->rsrc_len);
err_out_create_hcd:
usb_put_hcd(g_pUsbHcd);
err_out_clk:
return ret_val;
}
// for debug
void otg_print_registers(void)
{
// USB PHY Control Registers
// otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
// "USB_CONTROL = 0x%x.\n", readl(0xfb10e80c));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"UPHYPWR = 0x%x.\n", readl(S3C_USBOTG_PHYPWR));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"UPHYCLK = 0x%x.\n", readl(S3C_USBOTG_PHYCLK));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"URSTCON = 0x%x.\n", readl(S3C_USBOTG_RSTCON));
//OTG LINK Core registers (Core Global Registers)
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GOTGCTL = 0x%x.\n", read_reg_32(GOTGCTL));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GOTGINT = 0x%x.\n", read_reg_32(GOTGINT));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GAHBCFG = 0x%x.\n", read_reg_32(GAHBCFG));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GUSBCFG = 0x%x.\n", read_reg_32(GUSBCFG));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GINTSTS = 0x%x.\n", read_reg_32(GINTSTS));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GINTMSK = 0x%x.\n", read_reg_32(GINTMSK));
// Host Mode Registers
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"HCFG = 0x%x.\n", read_reg_32(HCFG));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"HPRT = 0x%x.\n", read_reg_32(HPRT));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"HFIR = 0x%x.\n", read_reg_32(HFIR));
// Synopsys ID
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GSNPSID = 0x%x.\n", read_reg_32(GSNPSID));
// HWCFG
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GHWCFG1 = 0x%x.\n", read_reg_32(GHWCFG1));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GHWCFG2 = 0x%x.\n", read_reg_32(GHWCFG2));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GHWCFG3 = 0x%x.\n", read_reg_32(GHWCFG3));
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"GHWCFG4 = 0x%x.\n", read_reg_32(GHWCFG4));
// PCGCCTL
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"PCGCCTL = 0x%x.\n", read_reg_32(PCGCCTL));
}
/**
* int root_hub_feature(const u8 port,
* const u16 type_req,
* const u16 feature,
* void* buf)
*
* @brief Get port change bitmap information
*
* @param [IN] port : port number
* [IN] type_req : request type of hub feature as usb 2.0 spec
* [IN] feature : hub feature as usb 2.0 spec
* [OUT] status : buffer to store results
*
* @return USB_ERR_SUCCESS : If success \n
* USB_ERR_FAIL : If call fail \n
*
* @remark
*
*/
__inline__ int root_hub_feature(const u8 port,
const u16 type_req,
const u16 feature,
void *buf)
{
int retval = USB_ERR_SUCCESS;
usb_hub_descriptor_t *desc = NULL;
u32 port_status = 0;
hprt_t hprt = {.d32 = 0};
switch (type_req)
{
case ClearHubFeature:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearHubFeature\n");
switch (feature)
{
case C_HUB_LOCAL_POWER:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearHubFeature -C_HUB_LOCAL_POWER \n");
break;
case C_HUB_OVER_CURRENT:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearHubFeature -C_HUB_OVER_CURRENT \n");
/* Nothing required here */
break;
default:
retval = USB_ERR_FAIL;
}
break;
case ClearPortFeature:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature\n");
switch (feature)
{
case USB_PORT_FEAT_ENABLE:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_ENABLE \n");
hprt.b.prtena = 1;
update_reg_32(HPRT, hprt.d32);
break;
case USB_PORT_FEAT_SUSPEND:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_SUSPEND \n");
bus_resume();
break;
case USB_PORT_FEAT_POWER:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_POWER \n");
hprt.b.prtpwr = 1;
clear_reg_32(HPRT, hprt.d32);
break;
case USB_PORT_FEAT_INDICATOR:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_INDICATOR \n");
/* Port inidicator not supported */
break;
case USB_PORT_FEAT_C_CONNECTION:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_C_CONNECTION \n");
/* Clears drivers internal connect status change
* flag */
port_flag.b.port_connect_status_change = 0;
break;
case USB_PORT_FEAT_C_RESET:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_C_RESET \n");
/* Clears the driver's internal Port Reset Change
* flag */
port_flag.b.port_reset_change = 0;
break;
case USB_PORT_FEAT_C_ENABLE:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_C_ENABLE \n");
/* Clears the driver's internal Port
* Enable/Disable Change flag */
port_flag.b.port_enable_change = 0;
break;
case USB_PORT_FEAT_C_SUSPEND:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_C_SUSPEND \n");
/* Clears the driver's internal Port Suspend
* Change flag, which is set when resume signaling on
* the host port is complete */
port_flag.b.port_suspend_change = 0;
break;
case USB_PORT_FEAT_C_OVER_CURRENT:
otg_dbg(OTG_DBG_ROOTHUB,"case ClearPortFeature -USB_PORT_FEAT_C_OVER_CURRENT \n");
port_flag.b.port_over_current_change = 0;
break;
default:
retval = USB_ERR_FAIL;
}
break;
case GetHubDescriptor:
otg_dbg(OTG_DBG_ROOTHUB,"case GetHubDescriptor\n");
desc = (usb_hub_descriptor_t *)buf;
desc->desc_length = 9;
desc->desc_type = 0x29;
desc->port_number = 1;
desc->hub_characteristics = 0x08;
desc->power_on_to_power_good = 1;
desc->hub_control_current = 0;
desc->bitmap[0] = 0;
desc->bitmap[1] = 0xff;
break;
case GetHubStatus:
otg_dbg(OTG_DBG_ROOTHUB,"case GetHubStatus\n");
otg_mem_set(buf, 0, 4);
break;
case GetPortStatus:
//otg_dbg(OTG_DBG_ROOTHUB_KH,"case GetPortStatus\n");
if (port_flag.b.port_connect_status_change)
port_status |= (1 << USB_PORT_FEAT_C_CONNECTION);
if (port_flag.b.port_enable_change)
port_status |= (1 << USB_PORT_FEAT_C_ENABLE);
if (port_flag.b.port_suspend_change)
port_status |= (1 << USB_PORT_FEAT_C_SUSPEND);
if (port_flag.b.port_reset_change)
port_status|= (1 << USB_PORT_FEAT_C_RESET);
if (port_flag.b.port_over_current_change)
port_status |= (1 << USB_PORT_FEAT_C_OVER_CURRENT);
if (!port_flag.b.port_connect_status)
{
//
// The port is disconnected, which means the core is
// either in device mode or it soon will be. Just
// return 0's for the remainder of the port status
// since the port register can't be read if the core
// is in device mode.
*((__le32*)buf) = cpu_to_le32(port_status);
break;
}
hprt.d32 = read_reg_32(HPRT);
if (hprt.b.prtconnsts)
port_status|= (1 << USB_PORT_FEAT_CONNECTION);
if (hprt.b.prtena)
port_status |= (1 << USB_PORT_FEAT_ENABLE);
if (hprt.b.prtsusp)
port_status |= (1 << USB_PORT_FEAT_SUSPEND);
if (hprt.b.prtovrcurract)
port_status |= (1 << USB_PORT_FEAT_OVER_CURRENT);
if (hprt.b.prtrst)
port_status |= (1 << USB_PORT_FEAT_RESET);
if (hprt.b.prtpwr)
port_status |= (1 << USB_PORT_FEAT_POWER);
if (hprt.b.prtspd == 0)
port_status |= (1 << USB_PORT_FEAT_HIGHSPEED);
else if (hprt.b.prtspd == 2)
port_status |= (1 << USB_PORT_FEAT_LOWSPEED);
if (hprt.b.prttstctl)
port_status |= (1 << USB_PORT_FEAT_TEST);
*((__le32*)buf) = cpu_to_le32(port_status);
break;
case SetHubFeature:
otg_dbg(OTG_DBG_ROOTHUB,"case SetHubFeature\n");
/* No HUB features supported */
break;
case SetPortFeature:
otg_dbg(OTG_DBG_ROOTHUB,"case SetPortFeature\n");
if (!port_flag.b.port_connect_status) {
/*
* The port is disconnected, which means the core is
* either in device mode or it soon will be. Just
* return without doing anything since the port
* register can't be written if the core is in device
* mode.
*/
break;
}
switch (feature)
{
case USB_PORT_FEAT_SUSPEND:
otg_dbg(OTG_DBG_ROOTHUB,"case SetPortFeature -USB_PORT_FEAT_SUSPEND \n");
bus_suspend();
break;
case USB_PORT_FEAT_POWER:
otg_dbg(OTG_DBG_ROOTHUB,"case SetPortFeature -USB_PORT_FEAT_POWER \n");
hprt.d32 = read_reg_32(HPRT);
if(!hprt.b.prtpwr)
{
//hprt.d32 = 0;
hprt.b.prtpwr = 1;
write_reg_32(HPRT, hprt.d32);
}
break;
case USB_PORT_FEAT_RESET:
otg_dbg(OTG_DBG_ROOTHUB,"case SetPortFeature -USB_PORT_FEAT_RESET \n");
retval = reset_and_enable_port(port);
break;
case USB_PORT_FEAT_INDICATOR:
otg_dbg(OTG_DBG_ROOTHUB,"case USB_PORT_FEAT_INDICATOR\n");
break;
default :
retval = USB_ERR_FAIL;
break;
}
break;
default:
retval = USB_ERR_FAIL;
otg_dbg(OTG_DBG_ROOTHUB,"root_hub_feature() Function Error\n");
break;
}
if(retval != USB_ERR_SUCCESS)
retval = USB_ERR_FAIL;
return retval;
}
/**
* void bus_suspend(void)
*
* @brief Make suspend status when this platform support PM Mode
*
* @param None
*
* @return None
*
* @remark
*
*/
void bus_suspend(void)
{
hprt_t hprt;
pcgcctl_t pcgcctl;
hprt.d32 = 0;
pcgcctl.d32 = 0;
hprt.b.prtsusp = 1;
update_reg_32(HPRT, hprt.d32);
pcgcctl.b.pwrclmp = 1;
update_reg_32(PCGCCTL,pcgcctl.d32);
udelay(1);
pcgcctl.b.rstpdwnmodule = 1;
update_reg_32(PCGCCTL,pcgcctl.d32);
udelay(1);
pcgcctl.b.stoppclk = 1;
update_reg_32(PCGCCTL,pcgcctl.d32);
udelay(1);
}
*
* @return None
*
* @remark
*
*/
extern port_flags_t port_flag;
extern bool ch_halt;
__inline__ void otg_handle_interrupt(void)
{
gintsts_t clearIntr = {.d32 = 0};
gintsts_t gintsts = {.d32 = 0};
gintsts.d32 = read_reg_32(GINTSTS) & read_reg_32(GINTMSK);
if (gintsts.b.wkupintr)
{
otg_dbg(OTG_DBG_ISR, "Wakeup Interrupt\n");
clearIntr.b.wkupintr = 1;
}
if (gintsts.b.disconnect)
{
otg_dbg(OTG_DBG_ISR, "Disconnect Interrupt\n");
port_flag.b.port_connect_status_change = 1;
port_flag.b.port_connect_status = 0;
clearIntr.b.disconnect = 1;
}
static int s5pc110_start_otg(u32 regs)
{
int ret_val = 0;
u32 reg_val = 0;
struct platform_device *pdev = g_pdev;
struct sec_otghost *otghost = NULL;
struct sec_otghost_data *otg_data = dev_get_platdata(&pdev->dev);
otg_dbg(OTG_DBG_OTGHCDI_DRIVER, "s3c_otg_drv_probe\n");
pr_info("otg probe start : 0x%x\n", regs);
/*init for host mode*/
/**
Allocate memory for the base HCD & Initialize the base HCD.
*/
g_pUsbHcd = usb_create_hcd(&s5pc110_otg_hc_driver, &pdev->dev,
"s3cotg");/*pdev->dev.bus_id*/
if (g_pUsbHcd == NULL) {
ret_val = -ENOMEM;
otg_err(OTG_DBG_OTGHCDI_DRIVER,
"failed to usb_create_hcd\n");
goto err_out_clk;
}
#if 1
pr_info("otg probe regs : 0x%p\n", otg_data->regs);
if (!regs) {
pr_info("otg mapping hcd resource\n");
/* mapping hcd resource & device resource*/
g_pUsbHcd->rsrc_start = pdev->resource[0].start;
g_pUsbHcd->rsrc_len = pdev->resource[0].end -
pdev->resource[0].start + 1;
if (!request_mem_region(g_pUsbHcd->rsrc_start,
g_pUsbHcd->rsrc_len, gHcdName)) {
otg_err(OTG_DBG_OTGHCDI_DRIVER,
"failed to request_mem_region\n");
ret_val = -EBUSY;
goto err_out_create_hcd;
}
pr_info("otg rsrc_start %llu, ren %llu\n",
g_pUsbHcd->rsrc_start,
g_pUsbHcd->rsrc_len);
pr_info("otg regs : %p\n", S3C_VA_HSOTG);
/* Physical address => Virtual address */
g_pUsbHcd->regs = S3C_VA_HSOTG;
g_pUDCBase = (u8 *)g_pUsbHcd->regs;
} else
g_pUDCBase = (u8 *)regs;
#endif
pr_info("otg g_pUDCBase 0x%p\n", g_pUDCBase);
g_pUsbHcd->self.otg_port = 1;
otghost = hcd_to_sec_otghost(g_pUsbHcd);
if (otghost == NULL) {
otg_err(true, "failed to get otghost hcd\n");
ret_val = USB_ERR_FAIL;
goto err_out_create_hcd;
}
otghost->otg_data = otg_data;
INIT_WORK(&otghost->work, otg_power_work);
otghost->wq = create_singlethread_workqueue("sec_otghostd");
/* call others' init() */
ret_val = otg_hcd_init_modules(otghost);
if (ret_val != USB_ERR_SUCCESS) {
otg_err(OTG_DBG_OTGHCDI_DRIVER,
"failed to otg_hcd_init_modules\n");
ret_val = USB_ERR_FAIL;
goto err_out_create_hcd;
}
/**
* Attempt to ensure this device is really a s5pc110 USB-OTG Controller.
* Read and verify the SNPSID register contents. The value should be
* 0x45F42XXX, which corresponds to "OT2", as in "OTG version 2.XX".
*/
reg_val = read_reg_32(0x40);
pr_info("otg reg 0x40 = %x\n", reg_val);
if ((reg_val & 0xFFFFF000) != 0x4F542000) {
otg_err(OTG_DBG_OTGHCDI_DRIVER,
"Bad value for SNPSID: 0x%x\n", reg_val);
ret_val = -EINVAL;
goto err_out_create_hcd_init;
}
#ifdef CONFIG_USB_HOST_NOTIFY
if (otg_data->host_notify) {
g_pUsbHcd->host_notify = otg_data->host_notify;
g_pUsbHcd->ndev.name = dev_name(&pdev->dev);
ret_val = host_notify_dev_register(&g_pUsbHcd->ndev);
if (ret_val) {
otg_err(OTG_DBG_OTGHCDI_DRIVER,
"Failed to host_notify_dev_register\n");
goto err_out_create_hcd_init;
}
}
#endif
#ifdef CONFIG_USB_SEC_WHITELIST
if (otg_data->sec_whlist_table_num)
g_pUsbHcd->sec_whlist_table_num =
otg_data->sec_whlist_table_num;
#endif
/*
* Finish generic HCD initialization and start the HCD. This function
* allocates the DMA buffer pool, registers the USB bus, requests the
* IRQ line, and calls s5pc110_otghcd_start method.
*/
ret_val = usb_add_hcd(g_pUsbHcd,
pdev->resource[1].start, IRQF_DISABLED);
if (ret_val < 0) {
otg_err(OTG_DBG_OTGHCDI_DRIVER,
"Failed to add hcd driver\n");
goto err_out_host_notify_register;
}
otg_dbg(OTG_DBG_OTGHCDI_DRIVER,
"OTG HCD Initialized HCD, bus=%s, usbbus=%d\n",
"C110 OTG Controller", g_pUsbHcd->self.busnum);
/* otg_print_registers(); */
wake_lock_init(&otghost->wake_lock, WAKE_LOCK_SUSPEND, "usb_otg");
wake_lock(&otghost->wake_lock);
return USB_ERR_SUCCESS;
err_out_host_notify_register:
#ifdef CONFIG_USB_HOST_NOTIFY
host_notify_dev_unregister(&g_pUsbHcd->ndev);
#endif
err_out_create_hcd_init:
otg_hcd_deinit_modules(otghost);
if (!regs)
release_mem_region(g_pUsbHcd->rsrc_start, g_pUsbHcd->rsrc_len);
err_out_create_hcd:
usb_put_hcd(g_pUsbHcd);
err_out_clk:
return ret_val;
}
/* for debug */
void otg_print_registers(void)
{
/* USB PHY Control Registers */
pr_info("otg clock = %s\n",
(readl(OTG_CLOCK) & (1<<13)) ? "ON" : "OFF");
pr_info("otg USB_CONTROL = 0x%x.\n", readl(OTG_PHY_CONTROL));
pr_info("otg UPHYPWR = 0x%x.\n", readl(OTG_PHYPWR));
pr_info("otg UPHYCLK = 0x%x.\n", readl(OTG_PHYCLK));
pr_info("otg URSTCON = 0x%x.\n", readl(OTG_RSTCON));
/* OTG LINK Core registers (Core Global Registers) */
pr_info("otg GOTGCTL = 0x%x.\n", read_reg_32(GOTGCTL));
pr_info("otg GOTGINT = 0x%x.\n", read_reg_32(GOTGINT));
pr_info("otg GAHBCFG = 0x%x.\n", read_reg_32(GAHBCFG));
pr_info("otg GUSBCFG = 0x%x.\n", read_reg_32(GUSBCFG));
pr_info("otg GINTSTS = 0x%x.\n", read_reg_32(GINTSTS));
pr_info("otg GINTMSK = 0x%x.\n", read_reg_32(GINTMSK));
/* Host Mode Registers */
pr_info("otg HCFG = 0x%x.\n", read_reg_32(HCFG));
pr_info("otg HPRT = 0x%x.\n", read_reg_32(HPRT));
pr_info("otg HFIR = 0x%x.\n", read_reg_32(HFIR));
/* Synopsys ID */
pr_info("otg GSNPSID = 0x%x.\n", read_reg_32(GSNPSID));
/* HWCFG */
pr_info("otg GHWCFG1 = 0x%x.\n", read_reg_32(GHWCFG1));
pr_info("otg GHWCFG2 = 0x%x.\n", read_reg_32(GHWCFG2));
pr_info("otg GHWCFG3 = 0x%x.\n", read_reg_32(GHWCFG3));
pr_info("otg GHWCFG4 = 0x%x.\n", read_reg_32(GHWCFG4));
/* PCGCCTL */
pr_info("otg PCGCCTL = 0x%x.\n", read_reg_32(PCGCCTL));
}
*
* @return USB_ERR_SUCCESS : If success \n
* USB_ERR_FAIL : If call fail \n
* @remark
*
*/
int oci_core_init(void)
{
gahbcfg_t ahbcfg = {.d32 = 0};
gusbcfg_t usbcfg = {.d32 = 0};
ghwcfg2_t hwcfg2 = {.d32 = 0};
gintmsk_t gintmsk = {.d32 = 0};
otg_dbg(OTG_DBG_OCI,
"oci_core_init \n");
usbcfg.d32 = read_reg_32(GUSBCFG);
otg_dbg(OTG_DBG_OCI,
"before - GUSBCFG=0x%x, GOTGCTL=0x%x\n", usbcfg.d32, read_reg_32(GOTGCTL));
/* PHY parameters */
usbcfg.b.physel = 0;
usbcfg.b.phyif = 1; // 16 bit
usbcfg.b.ulpi_utmi_sel = 0; // UTMI
//usbcfg.b.ddrsel = 1; // DDR
usbcfg.b.usbtrdtim = 5; // 16 bit UTMI
usbcfg.b.toutcal = 7;
usbcfg.b.forcehstmode = 1;
write_reg_32 (GUSBCFG, usbcfg.d32);
otg_dbg(OTG_DBG_OCI,
"after - GUSBCFG=0x%x, GOTGCTL=0x%x\n",
