void tee_mmu_get_map(struct tee_mmu_mapping *map) { if (map == NULL) return; map->ttbr0 = read_ttbr0(); map->ctxid = read_contextidr(); }
static void lpae_map_init(void) { pgd_t *pgd; die_if(!(read_ttbcr() >> 31), "LPAE is not enabled\n"); /* get work block address */ work_block = ALIGN_UP((uintptr_t)_end, 2*MiB); assert(work_block); printf("Work block for LPAE mapping is @ 0x%p\n", (void *)work_block); /* get the address of the 1st pmd from pgd[0] */ pgd = (pgd_t *)((uintptr_t)read_ttbr0() & PGD_MASK); ttb_buff = (pmd_t *)((uintptr_t)pgd[0] & PGD_MASK); assert(ttb_buff); original_map = ttb_buff[work_block >> BLOCK_SHIFT]; }
default: return ""; } } static __maybe_unused void print_detailed_abort( struct abort_info *ai __maybe_unused, const char *ctx __maybe_unused) { EMSG_RAW("\n"); EMSG_RAW("%s %s-abort at address 0x%" PRIxVA "%s\n", ctx, abort_type_to_str(ai->abort_type), ai->va, fault_to_str(ai->abort_type, ai->fault_descr)); #ifdef ARM32 EMSG_RAW(" fsr 0x%08x ttbr0 0x%08x ttbr1 0x%08x cidr 0x%X\n", ai->fault_descr, read_ttbr0(), read_ttbr1(), read_contextidr()); EMSG_RAW(" cpu #%zu cpsr 0x%08x\n", get_core_pos(), ai->regs->spsr); EMSG_RAW(" r0 0x%08x r4 0x%08x r8 0x%08x r12 0x%08x\n", ai->regs->r0, ai->regs->r4, ai->regs->r8, ai->regs->ip); EMSG_RAW(" r1 0x%08x r5 0x%08x r9 0x%08x sp 0x%08x\n", ai->regs->r1, ai->regs->r5, ai->regs->r9, read_mode_sp(ai->regs->spsr & CPSR_MODE_MASK)); EMSG_RAW(" r2 0x%08x r6 0x%08x r10 0x%08x lr 0x%08x\n", ai->regs->r2, ai->regs->r6, ai->regs->r10, read_mode_lr(ai->regs->spsr & CPSR_MODE_MASK)); EMSG_RAW(" r3 0x%08x r7 0x%08x r11 0x%08x pc 0x%08x\n", ai->regs->r3, ai->regs->r7, ai->regs->r11, ai->pc); #endif /*ARM32*/ #ifdef ARM64
/*===========================================================================* * lin_lin_copy * *===========================================================================*/ static int lin_lin_copy(struct proc *srcproc, vir_bytes srclinaddr, struct proc *dstproc, vir_bytes dstlinaddr, vir_bytes bytes) { u32_t addr; proc_nr_t procslot; assert(get_cpulocal_var(ptproc)); assert(get_cpulocal_var(proc_ptr)); assert(read_ttbr0() == get_cpulocal_var(ptproc)->p_seg.p_ttbr); procslot = get_cpulocal_var(ptproc)->p_nr; assert(procslot >= 0 && procslot < ARM_VM_DIR_ENTRIES); if(srcproc) assert(!RTS_ISSET(srcproc, RTS_SLOT_FREE)); if(dstproc) assert(!RTS_ISSET(dstproc, RTS_SLOT_FREE)); assert(!RTS_ISSET(get_cpulocal_var(ptproc), RTS_SLOT_FREE)); assert(get_cpulocal_var(ptproc)->p_seg.p_ttbr_v); if(srcproc) assert(!RTS_ISSET(srcproc, RTS_VMINHIBIT)); if(dstproc) assert(!RTS_ISSET(dstproc, RTS_VMINHIBIT)); while(bytes > 0) { phys_bytes srcptr, dstptr; vir_bytes chunk = bytes; int changed = 0; #ifdef CONFIG_SMP unsigned cpu = cpuid; if (srcproc && GET_BIT(srcproc->p_stale_tlb, cpu)) { changed = 1; UNSET_BIT(srcproc->p_stale_tlb, cpu); } if (dstproc && GET_BIT(dstproc->p_stale_tlb, cpu)) { changed = 1; UNSET_BIT(dstproc->p_stale_tlb, cpu); } #endif /* Set up 1MB ranges. */ srcptr = createpde(srcproc, srclinaddr, &chunk, 0, &changed); dstptr = createpde(dstproc, dstlinaddr, &chunk, 1, &changed); if(changed) { reload_ttbr0(); } /* Copy pages. */ PHYS_COPY_CATCH(srcptr, dstptr, chunk, addr); if(addr) { /* If addr is nonzero, a page fault was caught. * * phys_copy does all memory accesses word-aligned (rounded * down), so pagefaults can occur at a lower address than * the specified offsets. compute the lower bounds for sanity * check use. */ vir_bytes src_aligned = srcptr & ~0x3, dst_aligned = dstptr & ~0x3; if(addr >= src_aligned && addr < (srcptr + chunk)) { return EFAULT_SRC; } if(addr >= dst_aligned && addr < (dstptr + chunk)) { return EFAULT_DST; } panic("lin_lin_copy fault out of range"); /* Not reached. */ return EFAULT; } /* Update counter and addresses for next iteration, if any. */ bytes -= chunk; srclinaddr += chunk; dstlinaddr += chunk; } if(srcproc) assert(!RTS_ISSET(srcproc, RTS_SLOT_FREE)); if(dstproc) assert(!RTS_ISSET(dstproc, RTS_SLOT_FREE)); assert(!RTS_ISSET(get_cpulocal_var(ptproc), RTS_SLOT_FREE)); assert(get_cpulocal_var(ptproc)->p_seg.p_ttbr_v); return OK; }