void yield()
{
irq_disable();
printf("-Yield: current id: %d, next id: %d-\n",current_ctx->id,current_ctx->next->id);
/*
static int old_esp, old_ebp;
*/
regread(esp);
//old_esp = esp;
regread(ebp);
//old_ebp = ebp;
current_ctx->esp = esp;
current_ctx->ebp = ebp;
current_ctx = current_ctx->next;
regwrite(esp,current_ctx->esp);
regwrite(ebp,current_ctx->ebp);
disp_procs();
if (current_ctx->started)
{
irq_enable();
return;
} else {
current_ctx->started = 1;
irq_enable();
current_ctx->f_ptr(current_ctx->f_args);
//for(;;) ;
/*regwrite(esp,old_esp);
regwrite(ebp,old_ebp);*/
}
}
int
main(int argc, char *argv[])
{
struct ath_diag atd;
const char *ifname;
char *eptr;
int c, s;
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0)
err(1, "socket");
ifname = getenv("ATH");
if (!ifname)
ifname = ATH_DEFAULT;
while ((c = getopt(argc, argv, "i:")) != -1)
switch (c) {
case 'i':
ifname = optarg;
break;
default:
usage();
/*NOTREACHED*/
}
strncpy(atd.ad_name, ifname, sizeof (atd.ad_name));
atd.ad_id = HAL_DIAG_REVS;
atd.ad_out_data = (caddr_t) &state.revs;
atd.ad_out_size = sizeof(state.revs);
if (ioctl(s, SIOCGATHDIAG, &atd) < 0)
err(1, atd.ad_name);
argc -= optind;
argv += optind;
for (; argc > 0; argc--, argv++) {
char *cp;
const struct dumpreg *dr;
uint32_t reg;
cp = strchr(argv[0], '=');
if (cp != NULL)
*cp++ = '\0';
dr = reglookup(argv[0]);
if (dr == NULL) {
errno = 0;
reg = (uint32_t) strtoul(argv[0], &eptr, 0);
if (argv[0] == eptr || eptr[0] != '\0')
errx(1, "invalid register \"%s\"", argv[0]);
} else
reg = dr->addr;
if (cp != NULL)
regwrite(s, &atd, reg, (uint32_t) strtoul(cp, NULL, 0));
printf("%s = %08x\n", argv[0], regread(s, &atd, reg));
}
return 0;
}
static void probe_idregs_ite_helper(const char *init, uint16_t port)
{
uint16_t id, chipver, ecport;
probing_for("ITE", init, port);
id = regval(port, CHIP_ID_BYTE1_REG) << 8;
id |= regval(port, CHIP_ID_BYTE2_REG);
chipver = regval(port, CHIP_VERSION_REG) & 0x0f; /* Only bits 3..0 */
if (superio_unknown(reg_table, id)) {
if (verbose)
printf(NOTFOUND "id=0x%04x, rev=0x%01x\n", id, chipver);
return;
}
printf("Found ITE %s (id=0x%04x, rev=0x%01x) at 0x%x\n",
get_superio_name(reg_table, id), id, chipver, port);
chip_found = 1;
chip_found_at_port = 1;
dump_superio("ITE", reg_table, port, id, LDN_SEL);
if (extra_dump) {
regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (EC). */
/* Get EC base address (stored in LDN 4, index 0x60/0x61). */
ecport = regval(port, 0x60) << 8;
ecport |= regval(port, 0x61);
/* EC address register = EC base address + 5. */
ecport += 5;
printf("Environment controller (0x%04x)\n", ecport);
dump_superio("ITE-EC", ec_table, ecport, id, LDN_SEL);
regwrite(port, LDN_SEL, 0x10); /* Select LDN 16 (BRAM). */
/* Get EC base address (stored in LDN 16, index 0x62/0x63). */
ecport = regval(port, 0x62) << 8;
ecport |= regval(port, 0x63);
printf("BRAM (0x%04x)\n", ecport);
dump_superio("ITE-BRAM", bram_table, ecport, id, LDN_SEL);
}
}
static void dump_regs(const struct superio_registers reg_table[],
int i, int j, uint16_t port, uint8_t ldn_sel)
{
int k;
const int16_t *idx;
if (reg_table[i].ldn[j].ldn != NOLDN) {
printf("LDN 0x%02x", reg_table[i].ldn[j].ldn);
if (reg_table[i].ldn[j].name != NULL)
printf(" (%s)", reg_table[i].ldn[j].name);
regwrite(port, ldn_sel, reg_table[i].ldn[j].ldn);
} else {
if (reg_table[i].ldn[j].name == NULL)
printf("Register dump:");
else
printf("(%s)", reg_table[i].ldn[j].name);
}
idx = reg_table[i].ldn[j].idx;
printf("\nidx");
for (k = 0; idx[k] != EOT; k++) {
if (k && !(k % 8))
putchar(' ');
printf(" %02x", idx[k]);
}
printf("\nval");
for (k = 0; idx[k] != EOT; k++) {
if (k && !(k % 8))
putchar(' ');
printf(" %02x", regval(port, idx[k]));
}
printf("\ndef");
idx = reg_table[i].ldn[j].def;
for (k = 0; idx[k] != EOT; k++) {
if (k && !(k % 8))
putchar(' ');
if (idx[k] == NANA)
printf(" NA");
else if (idx[k] == RSVD)
printf(" RR");
else if (idx[k] == MISC)
printf(" MM");
else
printf(" %02x", idx[k]);
}
printf("\n");
}
void probe_idregs_nuvoton(uint16_t port)
{
uint8_t sid, srid;
uint16_t chip_id = 0;
uint8_t chip_rev = 0;
uint16_t iobase = 0;
int i;
/* Probe for the 16bit IDs first to avoid collisions */
probing_for("Nuvoton", "", port);
enter_conf_mode_winbond_fintek_ite_8787(port);
chip_id = (regval(port, DEVICE_ID_REG) << 8) |
regval(port, DEVICE_ID_REG + 1);
regwrite(port, LDN_SEL, 0x0b);
iobase = (regval(port, 0x60) << 8) | (regval(port, 0x61) & ~7);
exit_conf_mode_winbond_fintek_ite_8787(port);
if (!superio_unknown(reg_table, chip_id)) {
printf("Found Nuvoton %s (id=0x%02x) at 0x%x\n",
get_superio_name(reg_table, chip_id), chip_id, port);
chip_found = 1;
enter_conf_mode_winbond_fintek_ite_8787(port);
dump_superio("Nuvoton", reg_table, port, chip_id, LDN_SEL);
exit_conf_mode_winbond_fintek_ite_8787(port);
goto extra;
}
if (verbose)
printf(NOTFOUND "chip_id=0x%04x\n", chip_id);
probing_for("Nuvoton", "(sid=0xfc) ", port);
sid = regval(port, DEVICE_ID_REG);
srid = regval(port, DEVICE_REV_REG);
if (sid == 0xfc) { /* WPCE775xL family */
/*
* bits 7-5: Chip ID
* bits 4-0: Chip revision
*/
chip_id = srid >> 5;
chip_rev = srid & 0x1f;
}
void probe_idregs_fintek(uint16_t port)
{
uint16_t vid, did, hwmport;
probing_for("Fintek", "", port);
enter_conf_mode_winbond_fintek_ite_8787(port);
did = regval(port, DEVICE_ID_BYTE1_REG);
did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
vid = regval(port, VENDOR_ID_BYTE1_REG);
vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
if (verbose)
printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
exit_conf_mode_winbond_fintek_ite_8787(port);
return;
}
printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
get_superio_name(reg_table, did), vid, did, port);
chip_found = 1;
dump_superio("Fintek", reg_table, port, did, LDN_SEL);
if (extra_dump) {
regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (HWM). */
/* Get HWM base address (stored in LDN 4, index 0x60/0x61). */
hwmport = regval(port, 0x60) << 8;
hwmport |= regval(port, 0x61);
printf("Hardware monitor (0x%04x)\n", hwmport);
dump_superio("Fintek-HWM", hwm_table, hwmport, did, LDN_SEL);
}
exit_conf_mode_winbond_fintek_ite_8787(port);
}
void loop (){
int ndx, i;
for (ndx = 0; ndx < 16; ndx++) {
regwrite(0, digits[ndx]);
regwrite(1, digits[15 - ndx]);
delay(300);
}
for (i = 0; i < 20; i++) {
for (ndx = 0; ndx < 16; ndx += 2) {
regwrite(0, loop1[ndx]);
regwrite(1, loop1[ndx+1]);
delay(75);
}
}
for (i = 0; i < 20; i++) {
for (ndx = 0; ndx < 24; ndx += 2) {
regwrite(0, loop2[ndx]);
regwrite(1, loop2[ndx+1]);
delay(75);
}
}
}
int ethreg_main(int argc, char *argv[])
{
const char *ifname = "eth0";
int c,portnum = 0x3f,cmd = 0,value = -1;
int optionindex = 0;
int vlanid = 0;
char *mac = NULL;
int tos = -1;
const char *opt = "xfhci:d:s:j:v:t:p:m:l:";
const struct option long_options[] =
{
{ "f_link", no_argument, 0, ATHR_FLOW_LINK_EN},
{ "txfctl", no_argument, 0, ATHR_PHY_TXFCTL},
{ "rxfctl", no_argument, 0, ATHR_PHY_RXFCTL},
{ "stats" , no_argument, 0, ATHR_GMAC_STATS},
{ "mib" , no_argument, 0, ATHR_PHY_MIB},
{ "dma" , no_argument, 0, ATHR_GMAC_DMA_CHECK},
{ "qos" , no_argument, 0, ATHR_QOS_ETH_SOFT_CLASS},
{ "ppri" , no_argument, 0, ATHR_QOS_ETH_PORT},
{ "ipqos" , no_argument, 0, ATHR_QOS_ETH_IP},
{ "vqos" , no_argument, 0, ATHR_QOS_ETH_VLAN},
{ "mqos" , no_argument, 0, ATHR_QOS_ETH_DA},
{ "igrl" , no_argument, 0, ATHR_QOS_PORT_ELIMIT},
{ "egrl" , no_argument, 0, ATHR_QOS_PORT_ILIMIT},
{ "p_st" , no_argument, 0, ATHR_PORT_STATS},
{ "macfl" , no_argument, 0, ATHR_GMAC_FLOW_CTRL},
{ "swfl" , no_argument, 0, ATHR_PHY_FLOW_CTRL},
{ 0,0,0,0}
};
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0)
err(1, "socket");
opt_force = 0;
progname = argv[0];
while ((c = getopt_long(argc, argv,
opt, long_options, &optionindex)) != -1) {
switch (c) {
case ATHR_FLOW_LINK_EN:
cmd = ATHR_FLOW_LINK_EN;
break;
case ATHR_PHY_TXFCTL:
cmd = ATHR_PHY_TXFCTL;
break;
case ATHR_PHY_RXFCTL:
cmd = ATHR_PHY_RXFCTL;
break;
case ATHR_PHY_MIB:
cmd = ATHR_PHY_MIB;
break;
case ATHR_GMAC_STATS:
cmd = ATHR_GMAC_STATS;
break;
case ATHR_GMAC_DMA_CHECK:
cmd = ATHR_GMAC_DMA_CHECK;
break;
case ATHR_QOS_ETH_SOFT_CLASS:
cmd = ATHR_QOS_ETH_SOFT_CLASS;
break;
case ATHR_QOS_ETH_PORT:
cmd = ATHR_QOS_ETH_PORT;
break;
case ATHR_QOS_ETH_VLAN:
cmd = ATHR_QOS_ETH_VLAN;
break;
case ATHR_QOS_ETH_IP:
cmd = ATHR_QOS_ETH_IP;
break;
case ATHR_QOS_ETH_DA:
cmd = ATHR_QOS_ETH_DA;
break;
case ATHR_PORT_STATS:
cmd = ATHR_PORT_STATS;
break;
case ATHR_QOS_PORT_ELIMIT:
cmd = ATHR_QOS_PORT_ELIMIT;
break;
case ATHR_QOS_PORT_ILIMIT:
cmd = ATHR_QOS_PORT_ILIMIT;
break;
case ATHR_GMAC_FLOW_CTRL:
cmd = ATHR_GMAC_FLOW_CTRL;
break;
case ATHR_PHY_FLOW_CTRL:
cmd = ATHR_PHY_FLOW_CTRL;
break;
case 'm':
mac = optarg;
break;
case 'v':
value = strtoul(optarg, 0, 0);
break;
case 'i':
ifname = optarg;
break;
case 't':
tos = strtoul(optarg, 0, 0);
break;
case 'p':
portnum = strtoul(optarg, 0, 0);
break;
case 'f':
opt_force = 1;
break;
case 'd':
duplex = strtoul(optarg, 0, 0);
break;
case 'c':
cmd = ATHR_ACL_COMMIT;
break;
case 'x':
cmd = ATHR_ACL_FLUSH;
break;
case 's':
cmd = ATHR_FRAME_SIZE_CTL;
value = strtoul(optarg, 0, 0);
break;
case 'j':
cmd = ATHR_JUMBO_FRAME;
value = strtoul(optarg, 0, 0);
break;
case 'l':
vlanid = strtoul (optarg, 0, 0);
break;
case 'h':
usage();
break;
default:
usage();
/*NOTREACHED*/
}
}
argc -= optind;
argv += optind;
strncpy(etd.ad_name, ifname, sizeof (etd.ad_name));
strncpy(ifr.ifr_name, ifname, IFNAMSIZ);
ifr.ifr_data = (void *) &etd;
if (cmd == ATHR_ACL_COMMIT) {
athr_commit_acl_rules();
return 0;
}
else if (cmd == ATHR_ACL_FLUSH) {
athr_flush_acl_rules();
return 0;
}
else if(cmd == ATHR_FRAME_SIZE_CTL) {
if (value == -1) {
printf ("usage:ethreg -i <if_name> -s <val>\n");
return -1;
} else {
athr_set_framesize(value);
}
return 0;
}
else if (cmd == ATHR_JUMBO_FRAME) {
if (value == -1) {
printf ("usage: ethreg -i <if_name> -j <0|1>\n");
return -1;
} else {
athr_en_jumboframe(value);
}
return 0;
}
else if (cmd == ATHR_FLOW_LINK_EN) {
if (value == -1 || portnum == 0x3f) {
printf ("usage: ethreg --f_link -i <ifname> -p <portnum> -v 1\n");
return -1;
} else {
athr_flow_link(portnum, value);
}
return 0;
}
else if (cmd == ATHR_PHY_RXFCTL) {
if (value == -1) {
printf ("usage: ethreg --rxfctl -i <ifname> -p <portnum> -v [0|1]\n");
printf ("usage: ethreg --rxfctl -i <ifname> -v [0|1]\n");
return -1;
} else {
athr_rxflctrl(portnum, value);
}
return 0;
}
else if (cmd == ATHR_PHY_TXFCTL) {
if (value == -1) {
printf ("usage: ethreg --txfctl -i <ifname> -p <portnum> -v [0|1]\n");
printf ("usage: ethreg --txfctl -i <ifname> -v [0|1]\n");
return -1;
} else {
athr_txflctrl(portnum, value);
}
return 0;
}
else if (cmd == ATHR_PHY_MIB) {
if (value == -1) {
printf ("usage: ethreg --mib -i <ifname> -v 1\n");
return -1;
} else {
athr_set_mib(value);
}
return 0;
}
else if (cmd == ATHR_GMAC_STATS) {
athr_disp_stats(portnum);
return 0;
}
else if (cmd == ATHR_GMAC_DMA_CHECK) {
if (value == -1) {
printf ("usage: ethreg --dma -i <ifname> -v [0|1]\n");
return -1;
} else {
athr_dma_check(value);
}
return 0;
}
else if (cmd == ATHR_QOS_ETH_SOFT_CLASS) {
if (value == -1) {
printf ("usage: ethreg --qos -i <ifname> -v [0|1]\n");
return -1;
} else {
athr_set_qos(value);
}
return 0;
}
else if (cmd == ATHR_QOS_ETH_PORT) {
if (value == -1) {
printf("usage: ethreg --ppri -i <ifname> -p <portno> -v <val>\n");
return -1;
} else {
athr_set_port_pri(portnum, value);
}
return 0;
}
else if (cmd == ATHR_QOS_ETH_IP) {
if (tos == -1 || value == -1) {
printf ("usage: ethreg --ipqos -i <ifname> -v <val> -t <tos>\n");
return -1;
} else {
athr_ip_qos(tos, value);
}
return 0;
}
else if (cmd == ATHR_QOS_ETH_VLAN) {
if (value == -1 || vlanid == -1) {
printf ("usage: ethreg --vqos -i <ifname> -v <val> -l <vlanid>\n");
return -1;
} else {
athr_vlan_qos(vlanid, value);
}
return 0;
}
else if (cmd == ATHR_QOS_ETH_DA) {
if (portnum == 0x3f || value == -1 || mac == NULL) {
printf ("usage: ethreg --mqos -i <ifname> -v <val> -p <portnum> -m <macaddr>\n");
return -1;
} else {
athr_mac_qos(portnum, value, mac);
}
return 0;
}
else if (cmd == ATHR_PORT_STATS) {
if (portnum == 0x3f) {
printf ("usage: ethreg --port_st -i <ifname> -p <portno>\n");
return -1;
} else {
athr_port_st(portnum);
}
return 0;
}
else if (cmd == ATHR_QOS_PORT_ELIMIT) {
if (portnum == 0x3f || value == -1 ) {
printf("usage: ethreg --egrl -i <ifname> -p <portnum> -v <val>\n");
return -1;
} else {
athr_process_egress(portnum, value);
}
return 0;
}
else if (cmd == ATHR_QOS_PORT_ILIMIT) {
if (portnum == 0x3f || value == -1 ) {
printf("usage: ethreg --igrl -i <ifname> -p <portnum> -v <val>\n");
return -1;
} else {
athr_process_igress(portnum, value);
}
return 0;
}
else if (cmd == ATHR_GMAC_FLOW_CTRL){
athr_gmac_flow_ctrl(value);
return 0;
}
else if (cmd == ATHR_PHY_FLOW_CTRL){
athr_phy_flow_ctrl(value, portnum);
return 0;
}
for (; argc > 0; argc--, argv++) {
u_int32_t off;
u_int32_t val, oval;
char *cp;
cp = strchr(argv[0], '=');
if (cp != NULL)
*cp = '\0';
off = (u_int) strtoul(argv[0], 0, 0);
if (off == 0 && errno == EINVAL)
errx(1, "%s: invalid reg offset %s",
progname, argv[0]);
if (cp == NULL) {
val = regread(off,portnum);
printf("Read Reg: 0x%08x = 0x%08x\n",off, val);
return 0;
} else {
val = (u_int32_t) strtoul(cp+1, 0, 0);
if (val == 0 && errno == EINVAL) {
errx(1, "%s: invalid reg value %s",
progname, cp+1);
}
else {
oval = regread(off,portnum);
if(opt_force == 0) {
printf("Write Reg: 0x%08x: Oldval = 0x%08x Newval = 0x%08x\n", off, oval, val);
} else if(opt_force == 1 && portnum == 0x3f) {
fprintf(stderr, "usage: %s [-f] -p portnum =10/100/0 [-d duplex]\n", progname);
return -1;
}
regwrite(off,val,portnum);
}
}
}
return 0;
}
void exit_conf_mode_winbond_fintek_ite_8787(uint16_t port)
{
OUTB(0xaa, port); /* Fintek, Winbond */
regwrite(port, 0x02, 0x02); /* ITE */
}
int
main(int argc, char *argv[])
{
HAL_REVS revs;
const char *ifname = ATH_DEFAULT;
int c;
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0)
err(1, "socket");
progname = argv[0];
while ((c = getopt(argc, argv, "di:")) != -1)
switch (c) {
case 'i':
ifname = optarg;
break;
case 'd':
strncpy(atd.ad_name, ifname, sizeof (atd.ad_name));
getdmadbg();
return 0;
default:
usage();
/*NOTREACHED*/
}
argc -= optind;
argv += optind;
strncpy(atd.ad_name, ifname, sizeof (atd.ad_name));
for (; argc > 0; argc--, argv++) {
u_int off, i;
u_int32_t val, oval,regbase;
char line[256];
char *cp;
cp = strchr(argv[0], '=');
if (cp != NULL)
*cp = '\0';
off = (u_int) strtoul(argv[0], NULL, 0);
printf("offset =0x%x.\n",off);
if (off == 0 && errno == EINVAL)
errx(1, "%s: invalid reg offset %s",
progname, argv[0]);
if (cp == NULL) {
int cnt = 1;
if (argc > 1) {
cnt = (u_int) strtoul(argv[1], NULL, 0);
argc--; argv++;
}
for (i = 0; i < cnt; i++) {
printf("%p:%04x = 0x%04x\n",getregbase(), off+(4*i), regread(off+(4*i)));
}
} else {
val = (u_int32_t) strtoul(cp+1, NULL, 0);
if (val == 0 && errno == EINVAL)
errx(1, "%s: invalid reg value %s",
progname, cp+1);
oval = regread(off);
printf("Write %04x: %04x = %04x\n",
off, oval, val);
regwrite(off, val);
}
}
return 0;
}
static void exit_conf_mode_ite(uint16_t port)
{
regwrite(port, 0x02, 0x02);
}
