static void rex3_wait_gfifo(struct newport_devconfig *dc) { while (rex3_read(dc, REX3_REG_STATUS) & (REX3_STATUS_GFXBUSY | REX3_STATUS_PIPELEVEL_MASK)) ; }
static void newport_setup_hw(struct newport_devconfig *dc) { uint16_t __unused(curp), tmp; int i; uint32_t scratch; /* Get various revisions */ rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_1 | (NEWPORT_DCBADDR_CMAP_0 << REX3_DCBMODE_DCBADDR_SHIFT) | (CMAP_DCBCRS_REVISION << REX3_DCBMODE_DCBCRS_SHIFT) | (1 << REX3_DCBMODE_CSWIDTH_SHIFT) | (1 << REX3_DCBMODE_CSHOLD_SHIFT) | (1 << REX3_DCBMODE_CSSETUP_SHIFT)); scratch = vc2_read_ireg(dc, VC2_IREG_CONFIG); dc->dc_vc2rev = (scratch & VC2_IREG_CONFIG_REVISION) >> 5; scratch = rex3_read(dc, REX3_REG_DCBDATA0); dc->dc_boardrev = (scratch >> 28) & 0x07; dc->dc_cmaprev = scratch & 0x07; dc->dc_xmaprev = xmap9_read(dc, XMAP9_DCBCRS_REVISION) & 0x07; dc->dc_depth = ( (dc->dc_boardrev > 1) && (scratch & 0x80)) ? 8 : 24; /* Setup cursor glyph */ curp = vc2_read_ireg(dc, VC2_IREG_CURSOR_ENTRY); /* Setup VC2 to a known state */ tmp = vc2_read_ireg(dc, VC2_IREG_CONTROL) & VC2_CONTROL_INTERLACE; vc2_write_ireg(dc, VC2_IREG_CONTROL, tmp | VC2_CONTROL_DISPLAY_ENABLE | VC2_CONTROL_VTIMING_ENABLE | VC2_CONTROL_DID_ENABLE | VC2_CONTROL_CURSORFUNC_ENABLE /*| VC2_CONTROL_CURSOR_ENABLE*/); /* Setup XMAP9s */ xmap9_write(dc, XMAP9_DCBCRS_CONFIG, XMAP9_CONFIG_8BIT_SYSTEM | XMAP9_CONFIG_RGBMAP_CI); xmap9_write(dc, XMAP9_DCBCRS_CURSOR_CMAP, 0); xmap9_write_mode(dc, 0, XMAP9_MODE_GAMMA_BYPASS | XMAP9_MODE_PIXSIZE_8BPP); xmap9_write(dc, XMAP9_DCBCRS_MODE_SELECT, 0); /* Setup REX3 */ rex3_write(dc, REX3_REG_XYWIN, (4096 << 16) | 4096); rex3_write(dc, REX3_REG_TOPSCAN, 0x3ff); /* XXX Why? XXX */ /* Setup CMAP */ for (i = 0; i < 256; i++) newport_cmap_setrgb(dc, i, rasops_cmap[i * 3], rasops_cmap[i * 3 + 1], rasops_cmap[i * 3 + 2]); }
static u_int32_t xmap9_read(struct newport_devconfig *dc, int crs) { rex3_write(dc, REX3_REG_DCBMODE, REX3_DCBMODE_DW_1 | (NEWPORT_DCBADDR_XMAP_0 << REX3_DCBMODE_DCBADDR_SHIFT) | (crs << REX3_DCBMODE_DCBCRS_SHIFT) | (3 << REX3_DCBMODE_CSWIDTH_SHIFT) | (2 << REX3_DCBMODE_CSHOLD_SHIFT) | (1 << REX3_DCBMODE_CSSETUP_SHIFT)); return rex3_read(dc, REX3_REG_DCBDATA0); }
static void rex3_wait_gfifo(struct newport_devconfig *dc) { while (rex3_read(dc, REX3_REG_STATUS) & REX3_STATUS_GFXBUSY) ; }