コード例 #1
0
ファイル: rk3288.c プロジェクト: Astralix/kernel
static void __init rk3288_dt_map_io(void)
{
	iotable_init(rk3288_io_desc, ARRAY_SIZE(rk3288_io_desc));
	debug_ll_io_init();
	usb_uart_init();

	rockchip_soc_id = ROCKCHIP_SOC_RK3288;

	/* rkpwm is used instead of old pwm */
	writel_relaxed(0x00010001, RK_GRF_VIRT + RK3288_GRF_SOC_CON2);

	/* disable address remap */
	writel_relaxed(0x08000000, RK_SGRF_VIRT + RK3288_SGRF_SOC_CON0);

	/* enable timer7 for core */
	writel_relaxed(0, RK3288_TIMER7_VIRT + 0x10);
	dsb();
	writel_relaxed(0xFFFFFFFF, RK3288_TIMER7_VIRT + 0x00);
	writel_relaxed(0xFFFFFFFF, RK3288_TIMER7_VIRT + 0x04);
	dsb();
	writel_relaxed(1, RK3288_TIMER7_VIRT + 0x10);
	dsb();

	rk3288_boot_mode_init();
}
コード例 #2
0
static void __init rk3288_dt_map_io(void)
{
	u32 v;

	rockchip_soc_id = ROCKCHIP_SOC_RK3288;

	iotable_init(rk3288_io_desc, ARRAY_SIZE(rk3288_io_desc));
	debug_ll_io_init();
	usb_uart_init();

	/* pmu reset by second global soft reset */
	v = readl_relaxed(RK_CRU_VIRT + RK3288_CRU_GLB_RST_CON);
	v &= ~(3 << 2);
	v |= 1 << 2;
	writel_relaxed(v, RK_CRU_VIRT + RK3288_CRU_GLB_RST_CON);

	/* rkpwm is used instead of old pwm */
	writel_relaxed(0x00010001, RK_GRF_VIRT + RK3288_GRF_SOC_CON2);

	/* disable address remap */
#ifndef CONFIG_ARM_TRUSTZONE
	writel_relaxed(0x08000000, RK_SGRF_VIRT + RK3288_SGRF_SOC_CON0);
#endif

	/* enable timer7 for core */
	writel_relaxed(0, RK3288_TIMER7_VIRT + 0x10);
	dsb();
	writel_relaxed(0xFFFFFFFF, RK3288_TIMER7_VIRT + 0x00);
	writel_relaxed(0xFFFFFFFF, RK3288_TIMER7_VIRT + 0x04);
	dsb();
	writel_relaxed(1, RK3288_TIMER7_VIRT + 0x10);
	dsb();

	/* power up/down GPU domain wait 1us */
	writel_relaxed(24, RK_PMU_VIRT + RK3288_PMU_GPU_PWRDWN_CNT);
	writel_relaxed(24, RK_PMU_VIRT + RK3288_PMU_GPU_PWRUP_CNT);

	rk3288_boot_mode_init();
#ifndef CONFIG_ARM_TRUSTZONE
	rockchip_efuse_init();
#endif
}