/**
* This function will initial board.
*/
void rt_hw_board_init()
{
// Configure the device for maximum performance, but do not change the PBDIV clock divisor.
// Given the options, this function will change the program Flash wait states,
// RAM wait state and enable prefetch cache, but will not change the PBDIV.
// The PBDIV value is already set via the pragma FPBDIV option above.
SYSTEMConfig(SYS_FREQ, SYS_CFG_WAIT_STATES | SYS_CFG_PCACHE);
/* use DBPRINTF */
/* rt_hw_console_init(); */
rt_hw_usart_init();
rt_console_set_device("uart1");
rt_hw_show_info();
// enable multi-vector interrupts
INTEnableSystemMultiVectoredInt();
rt_hw_interrupt_disable();
// // STEP 2. configure the core timer
// OpenCoreTimer(CORE_TICK_RATE);
//
// // set up the core timer interrupt with a prioirty of 2 and zero sub-priority
// mConfigIntCoreTimer((CT_INT_ON | CT_INT_PRIOR_2 | CT_INT_SUB_PRIOR_0));
// STEP 2. configure Timer 1 using internal clock, 1:256 prescale
OpenTimer1(T1_ON | T1_SOURCE_INT | T1_PS_1_256, T1_TICK);
// set up the timer interrupt with a priority of 2
ConfigIntTimer1(T1_INT_ON | T1_INT_PRIOR_2);
/* Setup the software interrupt. */
mConfigIntCoreSW0( CSW_INT_ON | CSW_INT_PRIOR_1 | CSW_INT_SUB_PRIOR_0 );
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
RCC_Configuration();
GPIO_Configuration();
exti_config(); /* mark by David */
Exti_Pvd_Init();
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
#if STM32_EXT_SRAM
EXT_SRAM_Configuration();
#endif
rt_hw_usart_init();
rt_console_set_device(CONSOLE_DEVICE);
spi_config();
#if 1==USE_TO_7INCH_LCD
FSMC_LCD_Init();
#elif 1==STM32_USE_FSMC_NOR_MUX
//sys_fsmc_nor_mux_config();
#elif 1==STM32_USE_FSMC_NOR_MUX2LCD
lcd_fsmc_nor_mux_config();
#endif
#if USE_STM32_IWDG
iwdg_init();
#endif
// led_on(LED_PORTX, LED3_PIN);
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init(void)
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
//SysTick_Configuration();
#if STM32_EXT_SRAM
EXT_SRAM_Configuration();
#endif
rt_hw_usart_init();
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
stm32_hw_pin_init();
ports_initial();
}
/** This function will initial STM32 board**/
void rt_hw_board_init()
{
BSP_Init();
//add for finsh
rt_hw_usart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
/**
* This function will initial STM32 Radio board.
*/
void rt_hw_board_init(void)
{
/* Configure the system clocks */
SystemInit();
all_device_reset();
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
/* Console Initialization*/
rt_hw_usart_init();
rt_console_set_device("uart1");
rt_kprintf("\r\n\r\nSystemInit......\r\n");
/* SPI1 config */
{
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
/* Enable SPI1 Periph clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
| RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
ENABLE);
/* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/*------------------------ SPI1 configuration ------------------------*/
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;/* 72M/64=1.125M */
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_I2S_DeInit(SPI1);
SPI_Init(SPI1, &SPI_InitStructure);
/* Enable SPI_MASTER */
SPI_Cmd(SPI1, ENABLE);
SPI_CalculateCRC(SPI1, DISABLE);
if (rt_sem_init(&spi1_lock, "spi1lock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
{
rt_kprintf("init spi1 lock semaphore failed\n");
}
}
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init(void)
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
rt_hw_usart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
/*
* Setup system tick for OS required.
*/
void bsp_init(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
// drv_uart_init();
rt_hw_usart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
/* System tick init */
BSP_Tmr_TickInit(0x1, (MB_PCLK / RT_TICK_PER_SECOND), IRQ_SYS_TICK_VECTOR, SysTick_Handler);
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
RCC_Configuration();
GPIO_Configuration();
#if STM32_EXT_SRAM
EXT_SRAM_Configuration();
#endif
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
/* rand */
#if ENABLE_RAND
ADC_Configration();
ADC_Channel_Config();
#endif
rt_hw_usart_init();
rt_console_set_device(CONSOLE_DEVICE);
board_debug(("func:%s(), line:%d\n", __FUNCTION__, __LINE__));
exti_config(); /* mark by David */
spi_config();
board_debug(("func:%s(), line:%d\n", __FUNCTION__, __LINE__));
#if RT_USING_ADE7880
#if ADE7880_USE_SPI
ade7880_spi_cfg();
#else
ade7880_i2c_cfg();
start_7880_i2c();
ade7880_spi_withdma_hsdccfg();
dma_configuration_spi1_rx();
#endif
#endif
board_debug(("func:%s(), line:%d\n", __FUNCTION__, __LINE__));
#if USE_STM32_IWDG
iwdg_init();
#endif
board_debug(("func:%s(), line:%d\n", __FUNCTION__, __LINE__));
return;
}
/**
* This function will initial win32
*/
void rt_hw_board_init()
{
/* init system memory */
heap = rt_hw_sram_init();
//#if defined(RT_USING_USART)
rt_hw_usart_init();
//#endif
#if defined(RT_USING_CONSOLE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Configuration();
rt_hw_usart_init();
#ifdef RT_USING_CONSOLE
rt_console_set_device(CONSOLE_DEVICE);
#endif
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
#if STM32_EXT_SRAM
EXT_SRAM_Configuration();
#endif
rt_hw_usart_init();
rt_console_set_device(CONSOLE_DEVICE);
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* 配置系统时钟并启动PLL,让系统工作在72M,此函数由库中提供 */
SystemInit();
/* 配置systick分频器 */
/* SystemCoreClock为系统主时钟 由库中提供,在system_stm32f10x.c中 */
/* RT_TICK_PER_SECOND 为系统节拍,由rtconfig.h中定义 */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
// /* 初始化串口 */
// rt_hw_console_init();
rt_hw_usart_init();
rt_console_set_device("uart4");
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
rt_hw_usart_init();
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
fsmc_gpio_init();
mco_config();
}
/**
* This function will initial NUC472 board.
*/
void rt_hw_board_init(void)
{
clock_init();
#ifdef RT_USING_HEAP
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)SRAM_END);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
#else
/* init memory system */
rt_system_heap_init((void*)&__bss_end, (void*)SRAM_END);
#endif
#endif /* RT_USING_HEAP */
rt_hw_usart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
}
/**
* This function will initial Nuvoton board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the system clock */
rt_hw_system_init();
/* Configure the SysTick */
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
/* Initial usart deriver, and set console device */
rt_hw_usart_init();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)M05X_SRAM_BEGIN, (void *)M05X_SRAM_END);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
}
/**
* This function will initial STM32 Radio board.
*/
void rt_hw_board_init(void)
{
/* Configure the system clocks */
SystemInit();
#ifndef STM32_SIMULATOR
all_device_reset();
#endif
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
/* Console Initialization */
rt_hw_usart_init();
rt_console_set_device("uart1");
/* Led Initialization */
rt_hw_led_init();
rt_kprintf("\r\n\r\nSystemInit......\r\n");
}
void rt_hw_board_init(void)
{
//NAND_IDTypeDef NAND_ID;
/* Configure the system clocks */
SystemInit();
all_device_reset();
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
/* Console Initialization*/
rt_hw_usart_init();
#if STM32_CONSOLE_USART == 1
rt_console_set_device("uart1");
#elif STM32_CONSOLE_USART == 2
rt_console_set_device("uart2");
#elif STM32_CONSOLE_USART == 3
rt_console_set_device("uart3");
#endif
up_mcu_show();
rt_kprintf("\r\n\r\nSystemInit......\r\n");
// show SN
{
uint8_t * sn = (uint8_t *)0x1FFFF7E8;
uint32_t i;
rt_kprintf("CPU SN: ");
for(i=0;i<12;i++)
{
rt_kprintf("%02X",*sn++);
}
rt_kprintf("\r\n");
}
/* SRAM init */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
FSMC_SRAM_Init();
/* memtest */
{
unsigned char * p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
unsigned int temp;
rt_kprintf("\r\nmem testing....");
for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
{
*p_extram++ = (unsigned char)temp;
}
p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
{
if( *p_extram++ != (unsigned char)temp )
{
rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);
while(1);
}
}
rt_kprintf("\rmem test pass!!\r\n");
}/* memtest */
}/* rt_hw_board_init */
void rt_hw_board_init(void)
{
//NAND_IDTypeDef NAND_ID;
/* Configure the system clocks */
SystemInit();
all_device_reset();
/* NVIC Configuration */
NVIC_Configuration();
/* Configure the SysTick */
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
/* Console Initialization*/
rt_hw_usart_init();
#if STM32_CONSOLE_USART == 1
rt_console_set_device("uart1");
#elif STM32_CONSOLE_USART == 2
rt_console_set_device("uart2");
#elif STM32_CONSOLE_USART == 3
rt_console_set_device("uart3");
#endif
rt_kprintf("\r\n\r\nSystemInit......\r\n");
/* SRAM init */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
FSMC_SRAM_Init();
/* memtest */
{
unsigned char * p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
unsigned int temp;
rt_kprintf("\r\nmem testing....");
for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
{
*p_extram++ = (unsigned char)temp;
}
p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
{
if( *p_extram++ != (unsigned char)temp )
{
rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);
while(1);
}
}
rt_kprintf("\rmem test pass!!\r\n");
}/* memtest */
/* SPI1 config */
{
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
/* Enable SPI1 Periph clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
| RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
ENABLE);
/* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/*------------------------ SPI1 configuration ------------------------*/
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;/* 72M/64=1.125M */
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_I2S_DeInit(SPI1);
SPI_Init(SPI1, &SPI_InitStructure);
/* Enable SPI_MASTER */
SPI_Cmd(SPI1, ENABLE);
SPI_CalculateCRC(SPI1, DISABLE);
if (rt_sem_init(&spi1_lock, "spi1lock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
{
rt_kprintf("init spi1 lock semaphore failed\n");
}
}
}/* rt_hw_board_init */
