static int s3c_rtc_resume(struct platform_device *pdev) { struct rtc_time tm; struct timespec time; time.tv_nsec = 0; s3c_rtc_enable(pdev, 1); s3c_rtc_gettime(&pdev->dev, &tm); rtc_tm_to_time(&tm, &time.tv_sec); restore_time_delta(&s3c_rtc_delta, &time); writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); return 0; }
static int set_wakealarm(void) { int retval = 0; unsigned long now, alarm; struct rtc_wkalrm alm; struct rtc_device *rtc; rtc = rtc_class_open(CONFIG_WAKEALARM_RTC); if (!rtc) { return -1; } /* Only request alarms that trigger in the future. Disable them * by writing another time, e.g. 0 meaning Jan 1 1970 UTC. */ retval = rtc_read_time(rtc, &alm.time); if (retval < 0) goto close_rtc; rtc_tm_to_time(&alm.time, &now); alarm = now + sleep_time; if (alarm > now) { /* Avoid accidentally clobbering active alarms; we can't * entirely prevent that here, without even the minimal * locking from the /dev/rtcN api. */ retval = rtc_read_alarm(rtc, &alm); if (retval < 0) goto close_rtc; alm.enabled = 1; } else { alm.enabled = 0; /* Provide a valid future alarm time. Linux isn't EFI, * this time won't be ignored when disabling the alarm. */ alarm = now + 300; } rtc_time_to_tm(alarm, &alm.time); retval = rtc_set_alarm(rtc, &alm); close_rtc: rtc_class_close(rtc); return retval; }
static int omap_rtc_resume(struct platform_device *pdev) { struct rtc_time rtc_tm; struct timespec time; time.tv_nsec = 0; omap_rtc_read_time(NULL, &rtc_tm); rtc_tm_to_time(&rtc_tm, &time.tv_sec); restore_time_delta(&rtc_delta, &time); if (device_may_wakeup(&pdev->dev)) disable_irq_wake(omap_rtc_alarm); else rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG); return 0; }
static int pl030_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) { struct pl030_rtc *rtc = dev_get_drvdata(dev); unsigned long time; int ret; /* * At the moment, we can only deal with non-wildcarded alarm times. */ ret = rtc_valid_tm(&alrm->time); if (ret == 0) ret = rtc_tm_to_time(&alrm->time, &time); if (ret == 0) writel(time, rtc->base + RTC_MR); return ret; }
/* * set the seconds portion of dryice time counter and clear the * fractional part. */ static int dryice_rtc_set_time(struct device *dev, struct rtc_time *tm) { struct rtc_drv_data *pdata = dev_get_drvdata(dev); unsigned long now; int rc; dev_dbg(dev, "%s\n", __func__); rc = rtc_tm_to_time(tm, &now); if (rc == 0) { /* zero the fractional part first */ di_write_wait_err(pdata, 0, DTCLR, rc, err); di_write_wait_err(pdata, now, DTCMR, rc, err); } err: return rc; }
/** * read_persistent_clock() - Return time from a persistent clock. * @ts: timespec returns a relative timestamp, not a wall time * * Reads a clock that keeps relative time across suspend/resume on Exynos * platforms. The clock is accurate to 1 second. */ void exynos_read_persistent_clock(struct timespec *ts) { struct rtc_time rtc_tm; unsigned long time; if (!exynos_rtc_base) { ts->tv_sec = 0; ts->tv_nsec = 0; return; } exynos_persistent_clock_read(&rtc_tm); rtc_tm_to_time(&rtc_tm, &time); ts->tv_sec = time; ts->tv_nsec = 0; }
static int iphone_rtc_settime(struct device *dev, struct rtc_time *rtc_tm) { unsigned long secs; unsigned long cur; s32 offset; rtc_tm_to_time(rtc_tm, &secs); cur = iphone_pmu_get_epoch(); offset = secs - cur; iphone_pmu_write_reg(0x6B, offset & 0xFF, 0); iphone_pmu_write_reg(0x6C, (offset >> 8) & 0xFF, 0); iphone_pmu_write_reg(0x6D, (offset >> 16) & 0xFF, 0); iphone_pmu_write_reg(0x6E, (offset >> 24) & 0xFF, 0); return 0; }
static int xgene_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) { struct xgene_rtc_dev *pdata = dev_get_drvdata(dev); unsigned long rtc_time; unsigned long alarm_time; rtc_time = readl(pdata->csr_base + RTC_CCVR); rtc_tm_to_time(&alrm->time, &alarm_time); pdata->alarm_time = alarm_time; writel((u32) pdata->alarm_time, pdata->csr_base + RTC_CMR); xgene_rtc_alarm_irq_enable(dev, alrm->enabled); return 0; }
static int au1xtoy_rtc_set_time(struct device *dev, struct rtc_time *tm) { unsigned long t; rtc_tm_to_time(tm, &t); alchemy_wrsys(t, AU1000_SYS_TOYWRITE); /* wait for the pending register write to succeed. This can * take up to 6 seconds... */ while (alchemy_rdsys(AU1000_SYS_CNTRCTRL) & SYS_CNTRL_C0S) msleep(1); return 0; }
static int stm_sbc_rtc_read_time(struct device *dev, struct rtc_time *tm) { unsigned long lpt; unsigned long lpt_cur; struct stm_sbc_rtc *rtc = dev_get_drvdata(dev); lpt = get_time_in_sec(); rtc_tm_to_time(&rtc->tm_cur, &lpt_cur); rtc_time_to_tm(lpt, tm); if (lpt < lpt_cur) lpt = lpt - lpt_cur; rtc_time_to_tm(lpt, &rtc->tm_cur); return 0; }
static ssize_t rtc_sysfs_show_since_epoch(struct device *dev, struct device_attribute *attr, char *buf) { ssize_t retval; struct rtc_time tm; retval = rtc_read_time(to_rtc_device(dev), &tm); if (retval == 0) { unsigned long time; rtc_tm_to_time(&tm, &time); retval = sprintf(buf, "%lu\n", time); } return retval; }
static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) { struct rtc_time tm; struct timespec time; time.tv_nsec = 0; /* save TICNT for anyone using periodic interrupts */ ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); s3c_rtc_gettime(&pdev->dev, &tm); rtc_tm_to_time(&tm, &time.tv_sec); save_time_delta(&s3c_rtc_delta, &time); s3c_rtc_enable(pdev, 0); return 0; }
int rtc_hctosys(void) { int err; struct rtc_time tm; struct rtc_device *rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE); if (rtc == NULL) { printk("%s: unable to open rtc device (%s)\n", __FILE__, CONFIG_RTC_HCTOSYS_DEVICE); return -ENODEV; } err = rtc_read_time(rtc, &tm); if (err == 0) { err = rtc_valid_tm(&tm); if (err == 0) { struct timespec tv; #ifdef CONFIG_RTC_DRV_MSM struct timeval curtv; #endif tv.tv_nsec = NSEC_PER_SEC >> 1; rtc_tm_to_time(&tm, &tv.tv_sec); #ifdef CONFIG_RTC_DRV_MSM /* Only update kernel time if seconds changed.. otherwise this causes confusion with A2DP. RTC time is in seconds.. so every invocation of do_settimeofday() will cause cur ms to skip.. */ do_gettimeofday(&curtv); if ((tv.tv_sec > (curtv.tv_sec + 1)) || ((tv.tv_sec + 1) < curtv.tv_sec)) { #endif do_settimeofday(&tv); dev_info(rtc->dev.parent, "setting system clock to " "%d-%02d-%02d %02d:%02d:%02d UTC (%u)\n", tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec, (unsigned int) tv.tv_sec); #ifdef CONFIG_RTC_DRV_MSM } #endif } else
static ssize_t rtc_sysfs_set_wakealarm(struct device *dev, struct device_attribute *attr, const char *buf, size_t n) { ssize_t retval; unsigned long now, alarm; struct rtc_wkalrm alm; struct rtc_device *rtc = to_rtc_device(dev); char *buf_ptr; int adjust = 0; retval = rtc_read_time(rtc, &alm.time); if (retval < 0) return retval; rtc_tm_to_time(&alm.time, &now); buf_ptr = (char *)buf; if (*buf_ptr == '+') { buf_ptr++; adjust = 1; } alarm = simple_strtoul(buf_ptr, NULL, 0); if (adjust) { alarm += now; } if (alarm > now) { retval = rtc_read_alarm(rtc, &alm); if (retval < 0) return retval; if (alm.enabled) return -EBUSY; alm.enabled = 1; } else { alm.enabled = 0; alarm = now + 300; } rtc_time_to_tm(alarm, &alm.time); retval = rtc_set_alarm(rtc, &alm); return (retval < 0) ? retval : n; }
static ssize_t rtc_sysfs_show_wakealarm(struct device *dev, struct device_attribute *attr, char *buf) { ssize_t retval; unsigned long alarm; struct rtc_wkalrm alm; retval = rtc_read_alarm(to_rtc_device(dev), &alm); if (retval == 0 && alm.enabled) { rtc_tm_to_time(&alm.time, &alarm); retval = sprintf(buf, "%lu\n", alarm); } return retval; }
unsigned long rtc_read_hw_time(void) { unsigned long time, flags; struct rtc_time tm; spin_lock_irqsave(&rtc_lock, flags); /* rtc_ctrl_func(HAL_RTC_CMD_RELOAD, NULL); */ /* rtc_ctrl_func(HAL_RTC_CMD_GET_TIME, &tm); */ hal_rtc_get_tick_time(&tm); spin_unlock_irqrestore(&rtc_lock, flags); tm.tm_year += RTC_MIN_YEAR_OFFSET; tm.tm_mon--; rtc_tm_to_time(&tm, &time); tm.tm_wday = (time / 86400 + 4) % 7; /* 1970/01/01 is Thursday */ return time; }
static int pcap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) { struct pcap_rtc *pcap_rtc = dev_get_drvdata(dev); struct rtc_time *tm = &alrm->time; unsigned long secs; u32 tod, days; rtc_tm_to_time(tm, &secs); tod = secs % SEC_PER_DAY; ezx_pcap_write(pcap_rtc->pcap, PCAP_REG_RTC_TODA, tod); days = secs / SEC_PER_DAY; ezx_pcap_write(pcap_rtc->pcap, PCAP_REG_RTC_DAYA, days); return 0; }
static int au1xtoy_rtc_set_time(struct device *dev, struct rtc_time *tm) { unsigned long t; rtc_tm_to_time(tm, &t); au_writel(t, SYS_TOYWRITE); au_sync(); /* wait for the pending register write to succeed. This can * take up to 6 seconds... */ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S) msleep(1); return 0; }
static int sprd_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) { unsigned long secs; unsigned temp; unsigned long read_secs; int i = 0,n; rtc_tm_to_time(&alrm->time, &secs); sci_adi_raw_write(ANA_RTC_INT_CLR, RTC_ALARM_BIT); // printk("sprd_rtc_set_alarm enable : %d, : %lu, secs : %lu\n", alrm->enabled, secs_start_year_to_1970, secs); // printk("sprd_rtc_set_alarm - day [%d] hour [%d] min [%d] sec [%d]\n", alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min, alrm->time.tm_sec); if(alrm->enabled){ if(secs < secs_start_year_to_1970) return -1; temp = sci_adi_read(ANA_RTC_INT_EN); temp |= RTC_ALARM_BIT; sci_adi_raw_write(ANA_RTC_INT_EN, temp); secs = secs - secs_start_year_to_1970; wake_lock(&rtc_wake_lock); n = 2; while(sprd_rtc_set_alarm_sec(secs)!=0&&(n--)>0); do { if(i!=0){ n = 2; while(sprd_rtc_set_alarm_sec(secs)!=0&&(n--)>0); } read_secs = sprd_rtc_get_alarm_sec(); msleep(1); i++; }while(read_secs != secs && i < SPRD_RTC_SET_MAX); //sci_adi_raw_write(ANA_RTC_SPG_UPD, SPRD_RTC_UNLOCK); wake_unlock(&rtc_wake_lock); }else{ sci_adi_clr(ANA_RTC_INT_EN, RTC_ALARM_BIT); //sci_adi_raw_write(ANA_RTC_SPG_UPD, SPRD_RTC_LOCK); msleep(150); } return 0; }
int alarm_read_rtc_ring(int *flag, unsigned long *alarm_time) { struct rtc_wkalrm rtc_alarm; int ret = 0; if (pwr_rtc_dev != NULL) { if (pwr_rtc_dev->dev.platform_data) *flag = *(int *)(pwr_rtc_dev->dev.platform_data); ret = rtc_read_alarm(pwr_rtc_dev, &rtc_alarm); if (ret < 0) goto out; rtc_tm_to_time(&rtc_alarm.time, alarm_time); pr_alarm(INT, "%s, flag: %d, alarm time: %lu\n", __func__, *flag, *alarm_time); } out: return ret; }
static int tegra_rtc_set_time(struct device *dev, struct rtc_time *tm) { unsigned long now; int ret; if (hPmu == NULL) return -1; ret = rtc_tm_to_time(tm, &now); if (ret != 0) return -1; if (!NvOdmPmuWriteRtc(hPmu, (NvU32)now)) { printk("NvOdmPmuWriteRtc failed\n"); return -1; } return 0; }
static int l4x_rtc_set_time(struct device *dev, struct rtc_time *time) { u64 new_offset_to_realtime; long unsigned int seconds; rtc_tm_to_time(time, &seconds); new_offset_to_realtime = (u64)seconds * 1000000000 - l4rtc_get_timer(); if (L4XV_FN_i(l4rtc_set_offset_to_realtime(rtc_server, new_offset_to_realtime))) { pr_err("l4x-rtc: Could not set time.\n"); return -EAGAIN; } /* * We do not update our internal offset to realtime here. It will be * updated when the rtc server sends its "time changed" IRQ. */ return 0; }
static int lpc22xx_rtc_resume(struct platform_device *pdev) { struct rtc_time tm; struct timespec time; time.tv_nsec = 0; lpc22xx_rtc_readtime(&pdev->dev, &tm); rtc_tm_to_time(&tm, &time.tv_sec); restore_time_delta(&lpc22xx_rtc_delta, &time); #ifdef CONFIG_RTC_DEBUG printk("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __FUNCTION__, 1900 + tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); #endif return 0; }
static int mc13xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) { struct mc13xxx_rtc *priv = dev_get_drvdata(dev); unsigned long s1970; unsigned seconds, days; int ret; mc13xxx_lock(priv->mc13xxx); /* */ ret = mc13xxx_reg_write(priv->mc13xxx, MC13XXX_RTCTODA, 0x1ffff); if (unlikely(ret)) goto out; ret = mc13xxx_irq_ack(priv->mc13xxx, MC13XXX_IRQ_TODA); if (unlikely(ret)) goto out; ret = rtc_tm_to_time(&alarm->time, &s1970); if (unlikely(ret)) goto out; dev_dbg(dev, "%s: o%2.s %lu\n", __func__, alarm->enabled ? "n" : "ff", s1970); ret = mc13xxx_rtc_irq_enable_unlocked(dev, alarm->enabled, MC13XXX_IRQ_TODA); if (unlikely(ret)) goto out; seconds = s1970 % 86400; days = s1970 / 86400; ret = mc13xxx_reg_write(priv->mc13xxx, MC13XXX_RTCDAYA, days); if (unlikely(ret)) goto out; ret = mc13xxx_reg_write(priv->mc13xxx, MC13XXX_RTCTODA, seconds); out: mc13xxx_unlock(priv->mc13xxx); return ret; }
/* * rtc_power_off: Set the pmic power off sequence. The RTC generates * pmic_pwr_enable control, which can be used to control an external * PMIC. */ static void rtc_power_off(void) { u32 val; struct rtc_time tm; unsigned long time; /* Set PMIC power enable */ val = readl(rtc_base + OMAP_RTC_PMIC_REG); writel(val | OMAP_RTC_PMIC_POWER_EN_EN, rtc_base + OMAP_RTC_PMIC_REG); /* Read rtc time */ omap_rtc_read_time(NULL, &tm); /* Convert Gregorian date to seconds since 01-01-1970 00:00:00 */ rtc_tm_to_time(&tm, &time); /* Add shutdown time to the current value */ time += SHUTDOWN_TIME_SEC; /* Convert seconds since 01-01-1970 00:00:00 to Gregorian date */ rtc_time_to_tm(time, &tm); if (tm2bcd(&tm) < 0) return; pr_info("System will go to power_off state in approx. %d secs\n", SHUTDOWN_TIME_SEC); /* * pmic_pwr_enable is controlled by means of ALARM2 event. So here * programming alarm2 expiry time and enabling alarm2 interrupt */ rtc_write(tm.tm_sec, OMAP_RTC_ALARM2_SECONDS_REG); rtc_write(tm.tm_min, OMAP_RTC_ALARM2_MINUTES_REG); rtc_write(tm.tm_hour, OMAP_RTC_ALARM2_HOURS_REG); rtc_write(tm.tm_mday, OMAP_RTC_ALARM2_DAYS_REG); rtc_write(tm.tm_mon, OMAP_RTC_ALARM2_MONTHS_REG); rtc_write(tm.tm_year, OMAP_RTC_ALARM2_YEARS_REG); /* Enable alarm2 interrupt */ val = readl(rtc_base + OMAP_RTC_INTERRUPTS_REG); writel(val | OMAP_RTC_INTERRUPTS_IT_ALARM2, rtc_base + OMAP_RTC_INTERRUPTS_REG); }
static ssize_t rtc_sysfs_set_wakealarm(struct device *dev, struct device_attribute *attr, const char *buf, size_t n) { ssize_t retval; unsigned long now, alarm; struct rtc_wkalrm alm; struct rtc_device *rtc = to_rtc_device(dev); /* Only request alarms that trigger in the future. Disable them * by writing another time, e.g. 0 meaning Jan 1 1970 UTC. */ retval = rtc_read_time(rtc, &alm.time); if (retval < 0) return retval; rtc_tm_to_time(&alm.time, &now); alarm = simple_strtoul(buf, NULL, 0); if (alarm > now) { /* Avoid accidentally clobbering active alarms; we can't * entirely prevent that here, without even the minimal * locking from the /dev/rtcN api. */ retval = rtc_read_alarm(rtc, &alm); if (retval < 0) return retval; if (alm.enabled) return -EBUSY; alm.enabled = 1; } else { alm.enabled = 0; /* Provide a valid future alarm time. Linux isn't EFI, * this time won't be ignored when disabling the alarm. */ alarm = now + 300; } rtc_time_to_tm(alarm, &alm.time); retval = rtc_set_alarm(rtc, &alm); return (retval < 0) ? retval : n; }
static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) { int rc, i; u8 value[NUM_8_BIT_RTC_REGS], ctrl_reg; unsigned long secs, irq_flags; struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev); rtc_tm_to_time(&alarm->time, &secs); for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) { value[i] = secs & 0xFF; secs >>= 8; } spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags); rc = pm8xxx_write_wrapper(rtc_dd, value, rtc_dd->alarm_rw_base, NUM_8_BIT_RTC_REGS); if (rc < 0) { dev_err(dev, "Write to RTC ALARM register failed\n"); goto rtc_rw_fail; } ctrl_reg = rtc_dd->ctrl_reg; ctrl_reg = alarm->enabled ? (ctrl_reg | PM8xxx_RTC_ALARM_ENABLE) : (ctrl_reg & ~PM8xxx_RTC_ALARM_ENABLE); rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1); if (rc < 0) { dev_err(dev, "Write to RTC control register failed\n"); goto rtc_rw_fail; } rtc_dd->ctrl_reg = ctrl_reg; dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n", alarm->time.tm_hour, alarm->time.tm_min, alarm->time.tm_sec, alarm->time.tm_mday, alarm->time.tm_mon, alarm->time.tm_year); rtc_rw_fail: spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags); return rc; }
static void rtc_sync_save_delta(void) { struct rtc_time rtc_time; static time_t rtc_time_t; struct timespec ts_system, ts_rtc; getnstimeofday(&ts_system); s3c_rtc_gettime(NULL, &rtc_time); rtc_tm_to_time(&rtc_time, &rtc_time_t); /* RTC precision is 1 second; adjust delta for avg 1/2 sec err */ set_normalized_timespec(&ts_rtc, rtc_time_t, NSEC_PER_SEC>>1); ts_saved_delta = timespec_sub(ts_system, ts_rtc); #ifdef CONFIG_RTC_S3C_SYNC_SYSTEM_TIME_DEBUG printk ("RTC_SYNC: save delta sec:%d nsec:%d\n", ts_saved_delta.tv_sec, ts_saved_delta.tv_nsec); #endif }
static int msmrtc_pmlib_set_time(struct device *dev, struct rtc_time *tm) { unsigned long unix_time; struct msm_dex_command dex; if (rtc_valid_tm(tm)) return -EINVAL; rtc_tm_to_time(tm, &unix_time); unix_time=unix_time-SECSFROM_1970_TO_1980; // MSM RTC starts 10 years after unix time dex.cmd = PCOM_WRITE_RTC; dex.has_data = 1; dex.data = unix_time; msm_proc_comm_wince(&dex, 0); return 0; }
static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) { struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); struct wm831x *wm831x = wm831x_rtc->wm831x; int ret; unsigned long time; ret = rtc_tm_to_time(&alrm->time, &time); if (ret < 0) { dev_err(dev, "Failed to convert time: %d\n", ret); return ret; } ret = wm831x_rtc_stop_alarm(wm831x_rtc); if (ret < 0) { dev_err(dev, "Failed to stop alarm: %d\n", ret); return ret; } ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1, (time >> 16) & 0xffff); if (ret < 0) { dev_err(dev, "Failed to write ALARM_1: %d\n", ret); return ret; } ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff); if (ret < 0) { dev_err(dev, "Failed to write ALARM_2: %d\n", ret); return ret; } if (alrm->enabled) { ret = wm831x_rtc_start_alarm(wm831x_rtc); if (ret < 0) { dev_err(dev, "Failed to start alarm: %d\n", ret); return ret; } } return 0; }