//
// Description: In normal chip, we should send some packet to Hw which will be used by Fw
// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then
// Fw can tell Hw to send these packet derectly.
// Added by tynli. 2009.10.15.
//
static VOID
FillFakeTxDescriptor92D(
IN PADAPTER Adapter,
IN u8* pDesc,
IN u32 BufferLen,
IN BOOLEAN IsPsPoll
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct tx_desc *ptxdesc = (struct tx_desc *)pDesc;
// Clear all status
_rtw_memset(pDesc, 0, 32);
//offset 0
ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg;
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); //32 bytes for TX Desc
ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header
//offset 4
ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<<QSEL_SHT)&0x00001f00); // Fixed queue of Mgnt queue
//Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw.
if(IsPsPoll)
{
ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
}
else
{
ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
}
//offset 16
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
if(pHalData->CurrentBandType92D == BAND_ON_5G)
ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
#ifdef CONFIG_USB_HCI
// USB interface drop packet if the checksum of descriptor isn't correct.
// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
rtl8192du_cal_txdesc_chksum(ptxdesc);
#endif
RT_PRINT_DATA(_module_rtl8712_cmd_c_, _drv_info_, "FillFakeTxDescriptor92D(): H2C Tx Desc Content ----->\n", pDesc, TXDESC_SIZE);
}
static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt)
{
int pull=0;
uint qsel;
_adapter *padapter = pxmitframe->padapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
#ifdef CONFIG_AP_MODE
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#endif //CONFIG_AP_MODE
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
sint bmcst = IS_MCAST(pattrib->ra);
#ifdef CONFIG_P2P
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
struct registry_priv *pregistrypriv = &padapter->registrypriv;
#endif //CONFIG_P2P
#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
if (padapter->registrypriv.mp_mode == 0)
{
if((_FALSE == bagg_pkt) && (urb_zero_packet_chk(padapter, sz)==0))
{
ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
pull = 1;
pxmitframe->pkt_offset --;
}
}
#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX
_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
{
//DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n");
//offset 4
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
qsel = (uint)(pattrib->qsel & 0x0000001f);
ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
fill_txdesc_sectype(pattrib, ptxdesc);
if(pattrib->ampdu_en==_TRUE){
ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN
//Insert Early Mode Content after tx desc position.
if((pHalData->bEarlyModeEnable) && (_TRUE == bagg_pkt)){
ptxdesc->txdw0 |= cpu_to_le32(((USB_HWDESC_HEADER_LEN-8) << OFFSET_SHT) & 0x00ff0000);//32 bytes for TX Desc
if(pxmitframe->EMPktNum > 0){
InsertEMContent(pxmitframe, pmem+TXDESC_SIZE);
}
}
}
else
{
ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
}
//offset 8
//offset 12
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
//offset 16 , offset 20
if (pattrib->qos_en)
ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS
if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->dhcp_pkt != 1))
{
//Non EAP & ARP & DHCP type data packet
fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M
ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//
//ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M
//use REG_INIDATA_RATE_SEL value
ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]);
if(0)//for driver dbg
{
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
if(pattrib->ht_en)
ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI
ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7
}
}
else
{
// EAP data packet and ARP packet.
// Use the 1M data rate to send the EAP/ARP packet.
// This will maybe make the handshake smooth.
ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
ptxdesc->txdw4 |= cpu_to_le32(BIT(24));// DATA_SHORT
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
}
#ifdef CONFIG_P2P
if(pregistrypriv->wifi_spec==1 && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
{
ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
ptxdesc->txdw5 = cpu_to_le32(0x0001ff00);//
ptxdesc->txdw5 |= cpu_to_le32(BIT(2));// use OFDM 6Mbps
}
#endif //CONFIG_P2P
//offset 24
#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
if ( pattrib->hw_tcp_csum == 1 ) {
// ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!!
u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8;
ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16);
DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7);
}
#endif
}
else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
{
//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");
//offset 4
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f);
qsel = (uint)(pattrib->qsel&0x0000001f);
ptxdesc->txdw1 |= cpu_to_le32((qsel<<QSEL_SHT)&0x00001f00);
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000);
//fill_txdesc_sectype(pattrib, ptxdesc);
//offset 8
#ifdef CONFIG_XMIT_ACK
//CCX-TXRPT ack for xmit mgmt frames.
if (pxmitframe->ack_report) {
ptxdesc->txdw2 |= cpu_to_le32(BIT(19));
#ifdef DBG_CCX
DBG_871X("%s set ccx\n", __func__);
#endif
}
#endif //CONFIG_XMIT_ACK
//offset 12
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
//offset 16
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
//offset 20
#ifdef CONFIG_AP_MODE
if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
{
ptxdesc->txdw5 |= cpu_to_le32(BIT(17));//retry limit enable
#ifdef CONFIG_P2P
if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
{
ptxdesc->txdw5 |= cpu_to_le32(0x00080000);//retry limit = 2
}
else
#endif //CONFIG_P2P
ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6
}
#endif
#ifdef CONFIG_INTEL_PROXIM
if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){
printk("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate);
ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate);
}
else
#endif
{
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
}
}
else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG)
{
DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
}
#ifdef CONFIG_MP_INCLUDED
else if((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG)
{
fill_txdesc_for_mp(padapter, ptxdesc);
}
#endif
else
{
DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
//offset 4
ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID)
ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid
//offset 8
//offset 12
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000);
//offset 16
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
//offset 20
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
}
// 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
// (1) The sequence number of each non-Qos frame / broadcast / multicast /
// mgnt frame should be controled by Hw because Fw will also send null data
// which we cannot control when Fw LPS enable.
// --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
// (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
// 2010.06.23. Added by tynli.
if(!pattrib->qos_en)
{
ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
}
//offset 0
ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff);
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//32 bytes for TX Desc
if(bmcst)
{
ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
}
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("offset0-txdesc=0x%x\n", ptxdesc->txdw0));
//offset 4
// pkt_offset, unit:8 bytes padding
if (pxmitframe->pkt_offset > 0)
ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
#ifdef CONFIG_USB_TX_AGGREGATION
if (pxmitframe->agg_num > 1)
ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000);
#endif
rtl8192du_cal_txdesc_chksum(ptxdesc);
return pull;
}