static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
struct rtl_stats *pstatus, u8 *pdesc,
struct rx_fwinfo_92c *p_drvinfo, bool bpacket_match_bssid,
bool bpacket_toself, bool b_packet_beacon)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
struct phy_sts_cck_8192s_t *cck_buf;
s8 rx_pwr_all, rx_pwr[4];
u8 rf_rx_num = 0, evm, pwdb_all;
u8 i, max_spatial_stream;
u32 rssi, total_rssi = 0;
bool b_is_cck = pstatus->b_is_cck;
/* Record it for next packet processing */
pstatus->b_packet_matchbssid = bpacket_match_bssid;
pstatus->b_packet_toself = bpacket_toself;
pstatus->b_packet_beacon = b_packet_beacon;
pstatus->rx_mimo_signalquality[0] = -1;
pstatus->rx_mimo_signalquality[1] = -1;
if (b_is_cck) {
u8 report, cck_highpwr;
/* CCK Driver info Structure is not the same as OFDM packet. */
cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
/* (1)Hardware does not provide RSSI for CCK */
/* (2)PWDB, Average PWDB cacluated by
* hardware (for rate adaptive) */
if (ppsc->rfpwr_state == ERFON)
cck_highpwr = (u8) rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
BIT(9));
else
cck_highpwr = false;
if (!cck_highpwr) {
u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
report = cck_buf->cck_agc_rpt & 0xc0;
report = report >> 6;
switch (report) {
case 0x3:
rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
break;
}
} else {
static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
struct rtl_stats *pstats,
struct rx_desc_92c *pdesc,
struct rx_fwinfo_92c *p_drvinfo,
bool packet_match_bssid,
bool packet_toself,
bool packet_beacon)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct phy_sts_cck_8192s_t *cck_buf;
struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
s8 rx_pwr_all = 0, rx_pwr[4];
u8 evm, pwdb_all, rf_rx_num = 0;
u8 i, max_spatial_stream;
u32 rssi, total_rssi = 0;
bool is_cck_rate;
is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
pstats->packet_matchbssid = packet_match_bssid;
pstats->packet_toself = packet_toself;
pstats->is_cck = is_cck_rate;
pstats->packet_beacon = packet_beacon;
pstats->rx_mimo_sig_qual[0] = -1;
pstats->rx_mimo_sig_qual[1] = -1;
if (is_cck_rate) {
u8 report, cck_highpwr;
cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
if (ppsc->rfpwr_state == ERFON)
cck_highpwr = (u8) rtl_get_bbreg(hw,
RFPGA0_XA_HSSIPARAMETER2,
BIT(9));
else
cck_highpwr = false;
if (!cck_highpwr) {
u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
report = cck_buf->cck_agc_rpt & 0xc0;
report = report >> 6;
switch (report) {
case 0x3:
rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
break;
}
} else {
void rtl8723ae_dm_rf_saving( struct ieee80211_hw *hw, u8 force_in_normal )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct ps_t *dm_pstable = &rtlpriv->dm_pstable;
if ( !rtlpriv->reg_init ) {
rtlpriv->reg_874 = ( rtl_get_bbreg( hw, RFPGA0_XCD_RFINTERFACESW,
MASKDWORD ) & 0x1CC000 ) >> 14;
rtlpriv->reg_c70 = ( rtl_get_bbreg( hw, ROFDM0_AGCPARAMETER1,
MASKDWORD ) & BIT( 3 ) ) >> 3;
rtlpriv->reg_85c = ( rtl_get_bbreg( hw, RFPGA0_XCD_SWITCHCONTROL,
MASKDWORD ) & 0xFF000000 ) >> 24;
rtlpriv->reg_a74 = ( rtl_get_bbreg( hw, 0xa74, MASKDWORD ) &
0xF000 ) >> 12;
rtlpriv->reg_init = true;
}
void rtl8723e_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct ps_t *dm_pstable = &rtlpriv->dm_pstable;
static u8 initialize;
static u32 reg_874, reg_c70, reg_85c, reg_a74;
if (initialize == 0) {
reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,
MASKDWORD) & 0x1CC000) >> 14;
reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1,
MASKDWORD) & BIT(3)) >> 3;
reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,
MASKDWORD) & 0xFF000000) >> 24;
reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12;
initialize = 1;
}
static int rtl_proc_get_bb_f(struct seq_file *m, void *v)
{
struct ieee80211_hw *hw = m->private;
int i, n, page;
int max = 0xff;
page = 0xf00;
for (n = 0; n <= max; ) {
seq_printf(m, "\n%8.8x ", n + page);
for (i = 0; i < 4 && n <= max; i++, n += 4)
seq_printf(m, "%8.8x ",
rtl_get_bbreg(hw, (page | n), 0xffffffff));
}
seq_puts(m, "\n");
return 0;
}
static int rtl_proc_get_bb_f(char *page, char **start,
off_t offset, int count, int *eof, void *data)
{
struct ieee80211_hw *hw = data;
int len = 0;
int i, n, page0;
int max = 0xff;
page0 = 0xf00;
for (n = 0; n <= max; ) {
len += snprintf(page + len, count - len, "\n%#8.8x ", n + page0);
for (i = 0; i < 4 && n <= max; n += 4, i++)
len += snprintf(page + len, count - len,
"%8.8x ",rtl_get_bbreg(hw, (page0 | n), 0xffffffff));
}
len += snprintf(page + len, count - len, "\n");
*eof = 1;
return len;
}
static void _rtl92s_dm_dynamic_txpower( struct ieee80211_hw *hw )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct rtl_phy *rtlphy = &( rtlpriv->phy );
struct rtl_mac *mac = rtl_mac( rtl_priv( hw ) );
long undec_sm_pwdb;
long txpwr_threshold_lv1, txpwr_threshold_lv2;
/* 2T2R TP issue */
if ( rtlphy->rf_type == RF_2T2R )
return;
if ( !rtlpriv->dm.dynamic_txpower_enable ||
rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE ) {
rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
return;
}
if ( ( mac->link_state < MAC80211_LINKED ) &&
( rtlpriv->dm.entry_min_undec_sm_pwdb == 0 ) ) {
RT_TRACE( rtlpriv, COMP_POWER, DBG_TRACE,
"Not connected to any\n" );
rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
rtlpriv->dm.last_dtp_lvl = TX_HIGHPWR_LEVEL_NORMAL;
return;
}
if ( mac->link_state >= MAC80211_LINKED ) {
if ( mac->opmode == NL80211_IFTYPE_ADHOC ) {
undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
RT_TRACE( rtlpriv, COMP_POWER, DBG_LOUD,
"AP Client PWDB = 0x%lx\n",
undec_sm_pwdb );
} else {
undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
RT_TRACE( rtlpriv, COMP_POWER, DBG_LOUD,
"STA Default Port PWDB = 0x%lx\n",
undec_sm_pwdb );
}
} else {
undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
RT_TRACE( rtlpriv, COMP_POWER, DBG_LOUD,
"AP Ext Port PWDB = 0x%lx\n",
undec_sm_pwdb );
}
txpwr_threshold_lv2 = TX_POWER_NEAR_FIELD_THRESH_LVL2;
txpwr_threshold_lv1 = TX_POWER_NEAR_FIELD_THRESH_LVL1;
if ( rtl_get_bbreg( hw, 0xc90, MASKBYTE0 ) == 1 )
rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
else if ( undec_sm_pwdb >= txpwr_threshold_lv2 )
rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL2;
else if ( ( undec_sm_pwdb < ( txpwr_threshold_lv2 - 3 ) ) &&
( undec_sm_pwdb >= txpwr_threshold_lv1 ) )
rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL1;
else if ( undec_sm_pwdb < ( txpwr_threshold_lv1 - 3 ) )
rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
if ( ( rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl ) )
rtl92s_phy_set_txpower( hw, rtlphy->current_channel );
rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
}
static void _rtl92s_dm_initial_gain_sta_beforeconnect( struct ieee80211_hw *hw )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct dig_t *digtable = &rtlpriv->dm_digtable;
struct false_alarm_statistics *falsealm_cnt = &( rtlpriv->falsealm_cnt );
static u8 initialized, force_write;
u8 initial_gain = 0;
if ( ( digtable->pre_sta_cstate == digtable->cur_sta_cstate ) ||
( digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT ) ) {
if ( digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT ) {
if ( rtlpriv->psc.rfpwr_state != ERFON )
return;
if ( digtable->backoff_enable_flag )
rtl92s_backoff_enable_flag( hw );
else
digtable->back_val = DM_DIG_BACKOFF_MAX;
if ( ( digtable->rssi_val + 10 - digtable->back_val ) >
digtable->rx_gain_max )
digtable->cur_igvalue =
digtable->rx_gain_max;
else if ( ( digtable->rssi_val + 10 - digtable->back_val )
< digtable->rx_gain_min )
digtable->cur_igvalue =
digtable->rx_gain_min;
else
digtable->cur_igvalue = digtable->rssi_val + 10
- digtable->back_val;
if ( falsealm_cnt->cnt_all > 10000 )
digtable->cur_igvalue =
( digtable->cur_igvalue > 0x33 ) ?
digtable->cur_igvalue : 0x33;
if ( falsealm_cnt->cnt_all > 16000 )
digtable->cur_igvalue =
digtable->rx_gain_max;
/* connected -> connected or disconnected -> disconnected */
} else {
/* Firmware control DIG, do nothing in driver dm */
return;
}
/* disconnected -> connected or connected ->
* disconnected or beforeconnect->( dis )connected */
} else {
/* Enable FW DIG */
digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
rtl92s_phy_set_fw_cmd( hw, FW_CMD_DIG_ENABLE );
digtable->back_val = DM_DIG_BACKOFF_MAX;
digtable->cur_igvalue = rtlpriv->phy.default_initialgain[0];
digtable->pre_igvalue = 0;
return;
}
/* Forced writing to prevent from fw-dig overwriting. */
if ( digtable->pre_igvalue != rtl_get_bbreg( hw, ROFDM0_XAAGCCORE1,
MASKBYTE0 ) )
force_write = 1;
if ( ( digtable->pre_igvalue != digtable->cur_igvalue ) ||
!initialized || force_write ) {
/* Disable FW DIG */
rtl92s_phy_set_fw_cmd( hw, FW_CMD_DIG_DISABLE );
initial_gain = ( u8 )digtable->cur_igvalue;
/* Set initial gain. */
rtl_set_bbreg( hw, ROFDM0_XAAGCCORE1, MASKBYTE0, initial_gain );
rtl_set_bbreg( hw, ROFDM0_XBAGCCORE1, MASKBYTE0, initial_gain );
digtable->pre_igvalue = digtable->cur_igvalue;
initialized = 1;
force_write = 0;
}
}
/* mac80211's rate_idx is like this:
*
* 2.4G band:rx_status->band == IEEE80211_BAND_2GHZ
*
* B/G rate:
* (rx_status->flag & RX_FLAG_HT) = 0,
* DESC_RATE1M-->DESC_RATE54M ==> idx is 0-->11,
*
* N rate:
* (rx_status->flag & RX_FLAG_HT) = 1,
* DESC_RATEMCS0-->DESC_RATEMCS15 ==> idx is 0-->15
*
* 5G band:rx_status->band == IEEE80211_BAND_5GHZ
* A rate:
* (rx_status->flag & RX_FLAG_HT) = 0,
* DESC_RATE6M-->DESC_RATE54M ==> idx is 0-->7,
*
* N rate:
* (rx_status->flag & RX_FLAG_HT) = 1,
* DESC_RATEMCS0-->DESC_RATEMCS15 ==> idx is 0-->15
*/
static int _rtl92de_rate_mapping(struct ieee80211_hw *hw,
bool isht, u8 desc_rate)
{
int rate_idx;
if (false == isht) {
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0))
if (IEEE80211_BAND_2GHZ == hw->conf.chandef.chan->band) {
#else
if (IEEE80211_BAND_2GHZ == hw->conf.channel->band) {
#endif
switch (desc_rate) {
case DESC92D_RATE1M:
rate_idx = 0;
break;
case DESC92D_RATE2M:
rate_idx = 1;
break;
case DESC92D_RATE5_5M:
rate_idx = 2;
break;
case DESC92D_RATE11M:
rate_idx = 3;
break;
case DESC92D_RATE6M:
rate_idx = 4;
break;
case DESC92D_RATE9M:
rate_idx = 5;
break;
case DESC92D_RATE12M:
rate_idx = 6;
break;
case DESC92D_RATE18M:
rate_idx = 7;
break;
case DESC92D_RATE24M:
rate_idx = 8;
break;
case DESC92D_RATE36M:
rate_idx = 9;
break;
case DESC92D_RATE48M:
rate_idx = 10;
break;
case DESC92D_RATE54M:
rate_idx = 11;
break;
default:
rate_idx = 0;
break;
}
} else {
switch (desc_rate) {
case DESC92D_RATE6M:
rate_idx = 0;
break;
case DESC92D_RATE9M:
rate_idx = 1;
break;
case DESC92D_RATE12M:
rate_idx = 2;
break;
case DESC92D_RATE18M:
rate_idx = 3;
break;
case DESC92D_RATE24M:
rate_idx = 4;
break;
case DESC92D_RATE36M:
rate_idx = 5;
break;
case DESC92D_RATE48M:
rate_idx = 6;
break;
case DESC92D_RATE54M:
rate_idx = 7;
break;
default:
rate_idx = 0;
break;
}
}
} else {
switch (desc_rate) {
case DESC92D_RATEMCS0:
rate_idx = 0;
break;
case DESC92D_RATEMCS1:
rate_idx = 1;
break;
case DESC92D_RATEMCS2:
rate_idx = 2;
break;
case DESC92D_RATEMCS3:
rate_idx = 3;
break;
case DESC92D_RATEMCS4:
rate_idx = 4;
break;
case DESC92D_RATEMCS5:
rate_idx = 5;
break;
case DESC92D_RATEMCS6:
rate_idx = 6;
break;
case DESC92D_RATEMCS7:
rate_idx = 7;
break;
case DESC92D_RATEMCS8:
rate_idx = 8;
break;
case DESC92D_RATEMCS9:
rate_idx = 9;
break;
case DESC92D_RATEMCS10:
rate_idx = 10;
break;
case DESC92D_RATEMCS11:
rate_idx = 11;
break;
case DESC92D_RATEMCS12:
rate_idx = 12;
break;
case DESC92D_RATEMCS13:
rate_idx = 13;
break;
case DESC92D_RATEMCS14:
rate_idx = 14;
break;
case DESC92D_RATEMCS15:
rate_idx = 15;
break;
default:
rate_idx = 0;
break;
}
}
return rate_idx;
}
static void _rtl92de_query_rxphystatus(struct ieee80211_hw *hw,
struct rtl_stats *pstatus, u8 *pdesc,
struct rx_fwinfo_92d *p_drvinfo, bool bpacket_match_bssid,
bool bpacket_toself, bool packet_beacon)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
struct phy_sts_cck_8192d *cck_buf;
s8 rx_pwr_all = 0, rx_pwr[4];
u8 rf_rx_num = 0, evm, pwdb_all;
u8 i, max_spatial_stream;
u32 rssi, total_rssi = 0;
bool is_cck = pstatus->is_cck;
pstatus->packet_matchbssid = bpacket_match_bssid;
pstatus->packet_toself = bpacket_toself;
pstatus->packet_beacon = packet_beacon;
pstatus->rx_mimo_signalquality[0] = -1;
pstatus->rx_mimo_signalquality[1] = -1;
if (is_cck) {
u8 report, cck_highpwr;
cck_buf = (struct phy_sts_cck_8192d *)p_drvinfo;
if (ppsc->rfpwr_state == ERFON)
cck_highpwr = (u8) rtl_get_bbreg(hw,
RFPGA0_XA_HSSIPARAMETER2, BIT(9));
else
cck_highpwr = false;
if (!cck_highpwr) {
u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
report = cck_buf->cck_agc_rpt & 0xc0;
report = report >> 6;
switch (report) {
case 0x3:
rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
break;
}
} else {
u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
report = p_drvinfo->cfosho[0] & 0x60;
report = report >> 5;
switch (report) {
case 0x3:
rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x2:
rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x1:
rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x0:
rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
break;
}
}
pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
/* CCK gain is smaller than OFDM/MCS gain, */
/* so we add gain diff by experiences, the val is 6 */
pwdb_all += 6;
if (pwdb_all > 100)
pwdb_all = 100;
/* modify the offset to make the same gain index with OFDM. */
if (pwdb_all > 34 && pwdb_all <= 42)
pwdb_all -= 2;
else if (pwdb_all > 26 && pwdb_all <= 34)
pwdb_all -= 6;
else if (pwdb_all > 14 && pwdb_all <= 26)
pwdb_all -= 8;
else if (pwdb_all > 4 && pwdb_all <= 14)
pwdb_all -= 4;
pstatus->rx_pwdb_all = pwdb_all;
pstatus->recvsignalpower = rx_pwr_all;
if (bpacket_match_bssid) {
u8 sq;
if (pstatus->rx_pwdb_all > 40) {
sq = 100;
} else {
sq = cck_buf->sq_rpt;
if (sq > 64)
sq = 0;
else if (sq < 20)
sq = 100;
else
sq = ((64 - sq) * 100) / 44;
}
pstatus->signalquality = sq;
pstatus->rx_mimo_signalquality[0] = sq;
pstatus->rx_mimo_signalquality[1] = -1;
}
} else {
static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
{
u32 ret_value;
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
unsigned long flag = 0;
/* hold ofdm counter */
rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
falsealm_cnt->cnt_rate_illegal +
falsealm_cnt->cnt_crc8_fail +
falsealm_cnt->cnt_mcs_fail +
falsealm_cnt->cnt_fast_fsync_fail +
falsealm_cnt->cnt_sb_search_fail;
if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
/* hold cck counter */
rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
falsealm_cnt->cnt_cck_fail = ret_value;
ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
} else {
falsealm_cnt->cnt_cck_fail = 0;
}
/* reset false alarm counter registers */
falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
falsealm_cnt->cnt_sb_search_fail +
falsealm_cnt->cnt_parity_fail +
falsealm_cnt->cnt_rate_illegal +
falsealm_cnt->cnt_crc8_fail +
falsealm_cnt->cnt_mcs_fail +
falsealm_cnt->cnt_cck_fail;
rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
/* update ofdm counter */
rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
/* update page C counter */
rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
/* update page D counter */
rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
/* reset cck counter */
rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
/* enable cck counter */
rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
}
RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Cnt_Fast_Fsync_fail = %x, "
"Cnt_SB_Search_fail = %x\n",
falsealm_cnt->cnt_fast_fsync_fail,
falsealm_cnt->cnt_sb_search_fail));
RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %x, "
"Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, "
"Cnt_Mcs_fail = %x\n",
falsealm_cnt->cnt_parity_fail,
falsealm_cnt->cnt_rate_illegal,
falsealm_cnt->cnt_crc8_fail,
falsealm_cnt->cnt_mcs_fail));
RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
("Cnt_Ofdm_fail = %x, " "Cnt_Cck_fail = %x, "
"Cnt_all = %x\n",
falsealm_cnt->cnt_ofdm_fail,
falsealm_cnt->cnt_cck_fail,
falsealm_cnt->cnt_all));
}
static bool _rtl8723be_phy_rf6052_config_parafile( struct ieee80211_hw *hw )
{
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct rtl_phy *rtlphy = &( rtlpriv->phy );
u32 u4_regvalue = 0;
u8 rfpath;
bool rtstatus = true;
struct bb_reg_def *pphyreg;
for ( rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++ ) {
pphyreg = &rtlphy->phyreg_def[rfpath];
switch ( rfpath ) {
case RF90_PATH_A:
case RF90_PATH_C:
u4_regvalue = rtl_get_bbreg( hw, pphyreg->rfintfs,
BRFSI_RFENV );
break;
case RF90_PATH_B:
case RF90_PATH_D:
u4_regvalue = rtl_get_bbreg( hw, pphyreg->rfintfs,
BRFSI_RFENV << 16 );
break;
}
rtl_set_bbreg( hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1 );
udelay( 1 );
rtl_set_bbreg( hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1 );
udelay( 1 );
rtl_set_bbreg( hw, pphyreg->rfhssi_para2,
B3WIREADDREAALENGTH, 0x0 );
udelay( 1 );
rtl_set_bbreg( hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0 );
udelay( 1 );
switch ( rfpath ) {
case RF90_PATH_A:
rtstatus = rtl8723be_phy_config_rf_with_headerfile( hw,
( enum radio_path )rfpath );
break;
case RF90_PATH_B:
rtstatus = rtl8723be_phy_config_rf_with_headerfile( hw,
( enum radio_path )rfpath );
break;
case RF90_PATH_C:
break;
case RF90_PATH_D:
break;
}
switch ( rfpath ) {
case RF90_PATH_A:
case RF90_PATH_C:
rtl_set_bbreg( hw, pphyreg->rfintfs,
BRFSI_RFENV, u4_regvalue );
break;
case RF90_PATH_B:
case RF90_PATH_D:
rtl_set_bbreg( hw, pphyreg->rfintfs,
BRFSI_RFENV << 16, u4_regvalue );
break;
}
if ( !rtstatus ) {
RT_TRACE( rtlpriv, COMP_INIT, DBG_TRACE,
"Radio[%d] Fail!!", rfpath );
return false;
}
}
RT_TRACE( rtlpriv, COMP_INIT, DBG_TRACE, "\n" );
return rtstatus;
}
