static int s6e8ax0_ldi_init(struct lcd_info *lcd)
{
int ret = 0;
s6e8ax0_write(lcd, SEQ_APPLY_LEVEL_2_KEY_ENABLE, ARRAY_SIZE(SEQ_APPLY_LEVEL_2_KEY_ENABLE));
s6e8ax0_write(lcd, SEQ_APPLY_LEVEL_3_KEY, ARRAY_SIZE(SEQ_APPLY_LEVEL_3_KEY));
s6e8ax0_write(lcd, SEQ_AUTO_RECOVERY, ARRAY_SIZE(SEQ_AUTO_RECOVERY));
if (lcd->id[1] == 0x13) { /* M4 */
s6e8ax0_write(lcd, SEQ_M4_PANEL_CONDITION_SET, ARRAY_SIZE(SEQ_M4_PANEL_CONDITION_SET));
s6e8ax0_write(lcd, SEQ_DISPLAY_CONDITION_SET, ARRAY_SIZE(SEQ_DISPLAY_CONDITION_SET));
/* s6e8ax0_write(lcd, SEQ_FRAME_GAMMA_UPDATE_KEY, ARRAY_SIZE(SEQ_FRAME_GAMMA_UPDATE_KEY));
s6e8ax0_write(lcd, SEQ_M4_GAMMA_CONDITION_SET, ARRAY_SIZE(SEQ_M4_GAMMA_CONDITION_SET));
s6e8ax0_write(lcd, SEQ_FRAME_GAMMA_UPDATE_KEY2, ARRAY_SIZE(SEQ_FRAME_GAMMA_UPDATE_KEY2)); */
s6e8ax0_gamma_ctl(lcd);
s6e8ax0_write(lcd, SEQ_LTPS_AID, ARRAY_SIZE(SEQ_LTPS_AID));
s6e8ax0_write(lcd, ELVSS_CONTROL_SET, ARRAY_SIZE(ELVSS_CONTROL_SET));
s6e8ax0_write(lcd, SEQ_ETC_WCABC_CONTROL, ARRAY_SIZE(SEQ_ETC_WCABC_CONTROL));
s6e8ax0_write(lcd, SEQ_M4_SLEW, ARRAY_SIZE(SEQ_M4_SLEW));
} else { /* SM2 */
s6e8ax0_write(lcd, SEQ_PANEL_CONDITION_SET, ARRAY_SIZE(SEQ_PANEL_CONDITION_SET));
s6e8ax0_write(lcd, SEQ_DISPLAY_CONDITION_SET, ARRAY_SIZE(SEQ_DISPLAY_CONDITION_SET));
/* s6e8ax0_write(lcd, SEQ_FRAME_GAMMA_UPDATE_KEY, ARRAY_SIZE(SEQ_FRAME_GAMMA_UPDATE_KEY));
s6e8ax0_write(lcd, SEQ_GAMMA_CONDITION_SET, ARRAY_SIZE(SEQ_GAMMA_CONDITION_SET));
s6e8ax0_write(lcd, SEQ_FRAME_GAMMA_UPDATE_KEY2, ARRAY_SIZE(SEQ_FRAME_GAMMA_UPDATE_KEY2)); */
s6e8ax0_gamma_ctl(lcd);
s6e8ax0_write(lcd, SEQ_LTPS_AID, ARRAY_SIZE(SEQ_LTPS_AID));
s6e8ax0_write(lcd, ELVSS_CONTROL_SET, ARRAY_SIZE(ELVSS_CONTROL_SET));
s6e8ax0_write(lcd, SEQ_ETC_WCABC_CONTROL, ARRAY_SIZE(SEQ_ETC_WCABC_CONTROL));
slew_rev_control_set(lcd);
}
s6e8ax0_write(lcd, SEQ_SLEEP_OUT, ARRAY_SIZE(SEQ_SLEEP_OUT));
return ret;
}
static int s6e8ax0_ldi_init(struct lcd_info *lcd)
{
int ret = 0;
#if defined(CONFIG_S6E8AA0_AMS529HA01)
s6e8ax0_write(lcd, SEQ_APPLY_LEVEL_2_KEY, ARRAY_SIZE(SEQ_APPLY_LEVEL_2_KEY));
s6e8ax0_write(lcd, SEQ_LTPS_DELAY, ARRAY_SIZE(SEQ_LTPS_DELAY));
s6e8ax0_write(lcd, SEQ_SLEEP_OUT, ARRAY_SIZE(SEQ_SLEEP_OUT));
msleep(22);
s6e8ax0_write(lcd, SEQ_PANEL_CONDITION_SET, ARRAY_SIZE(SEQ_PANEL_CONDITION_SET));
s6e8ax0_write(lcd, SEQ_DISPLAY_CONDITION_SET, ARRAY_SIZE(SEQ_DISPLAY_CONDITION_SET));
s6e8ax0_gamma_ctl(lcd);
s6e8ax0_write(lcd, SEQ_ETC_SOURCE_CONTROL, ARRAY_SIZE(SEQ_ETC_SOURCE_CONTROL));
s6e8ax0_write(lcd, SEQ_ETC_PENTILE_CONTROL, ARRAY_SIZE(SEQ_ETC_PENTILE_CONTROL));
s6e8ax0_write(lcd, SEQ_ETC_POWER_CONTROL, ARRAY_SIZE(SEQ_ETC_POWER_CONTROL));
s6e8ax0_write(lcd, SEQ_ELVSS_NVM_SETTING, ARRAY_SIZE(SEQ_ELVSS_NVM_SETTING));
s6e8ax0_write(lcd, SEQ_ELVSS_CONTROL, ARRAY_SIZE(SEQ_ELVSS_CONTROL));
#else
s6e8ax0_write(lcd, SEQ_APPLY_LEVEL_2, ARRAY_SIZE(SEQ_APPLY_LEVEL_2));
s6e8ax0_write(lcd, SEQ_APPLY_MTP_KEY_ENABLE, ARRAY_SIZE(SEQ_APPLY_MTP_KEY_ENABLE));
s6e8ax0_write(lcd, SEQ_SLEEP_OUT, ARRAY_SIZE(SEQ_SLEEP_OUT));
msleep(22);
/* 4.8" HD for M0/C1*/
if (lcd->id[1] == 0x20 || lcd->id[1] == 0x40 || lcd->id[1] == 0x60) {
s6e8ax0_write(lcd, SEQ_PANEL_CONDITION_SET_500MBPS,\
ARRAY_SIZE(SEQ_PANEL_CONDITION_SET_500MBPS));
s6e8ax0_write(lcd, SEQ_DISPLAY_CONDITION_SET, ARRAY_SIZE(SEQ_DISPLAY_CONDITION_SET));
s6e8ax0_gamma_ctl(lcd);
s6e8ax0_write(lcd, SEQ_ETC_SOURCE_CONTROL, ARRAY_SIZE(SEQ_ETC_SOURCE_CONTROL));
s6e8ax0_write(lcd, SEQ_ETC_PENTILE_CONTROL, ARRAY_SIZE(SEQ_ETC_PENTILE_CONTROL));
s6e8ax0_write(lcd, SEQ_ETC_NVM_SETTING, ARRAY_SIZE(SEQ_ETC_NVM_SETTING));
s6e8ax0_write(lcd, SEQ_ETC_POWER_CONTROL, ARRAY_SIZE(SEQ_ETC_POWER_CONTROL));
} else if (lcd->id[1] == 0xae) {
s6e8ax0_write(lcd, SEQ_PANEL_CONDITION_SET_480MBPS_46, ARRAY_SIZE(SEQ_PANEL_CONDITION_SET_480MBPS_46));
s6e8ax0_write(lcd, SEQ_DISPLAY_CONDITION_SET, ARRAY_SIZE(SEQ_DISPLAY_CONDITION_SET));
s6e8ax0_gamma_ctl(lcd);
s6e8ax0_write(lcd, SEQ_ETC_SOURCE_CONTROL, ARRAY_SIZE(SEQ_ETC_SOURCE_CONTROL));
s6e8ax0_write(lcd, SEQ_ETC_PENTILE_CONTROL_46, ARRAY_SIZE(SEQ_ETC_PENTILE_CONTROL_46));
s6e8ax0_write(lcd, SEQ_ETC_NVM_SETTING_46, ARRAY_SIZE(SEQ_ETC_NVM_SETTING_46));
s6e8ax0_write(lcd, SEQ_ETC_POWER_CONTROL_46, ARRAY_SIZE(SEQ_ETC_POWER_CONTROL_46));
} else {
s6e8ax0_write(lcd, SEQ_PANEL_CONDITION_SET_500MBPS_46, ARRAY_SIZE(SEQ_PANEL_CONDITION_SET_500MBPS_46));
s6e8ax0_write(lcd, SEQ_DISPLAY_CONDITION_SET, ARRAY_SIZE(SEQ_DISPLAY_CONDITION_SET));
s6e8ax0_gamma_ctl(lcd);
s6e8ax0_write(lcd, SEQ_ETC_SOURCE_CONTROL, ARRAY_SIZE(SEQ_ETC_SOURCE_CONTROL));
s6e8ax0_write(lcd, SEQ_ETC_PENTILE_CONTROL_46, ARRAY_SIZE(SEQ_ETC_PENTILE_CONTROL_46));
s6e8ax0_write(lcd, SEQ_ETC_NVM_SETTING_46, ARRAY_SIZE(SEQ_ETC_NVM_SETTING_46));
s6e8ax0_write(lcd, SEQ_ETC_POWER_CONTROL_46, ARRAY_SIZE(SEQ_ETC_POWER_CONTROL_46));
}
s6e8ax0_write(lcd, SEQ_ELVSS_CONTROL, ARRAY_SIZE(SEQ_ELVSS_CONTROL));
#endif
return ret;
}
static int update_brightness(struct lcd_info *lcd, u8 force)
{
u32 brightness;
mutex_lock(&lcd->bl_lock);
brightness = lcd->bd->props.brightness;
if (unlikely(!lcd->auto_brightness && brightness > 250))
brightness = 250;
lcd->bl = get_backlight_level_from_brightness(brightness);
if ((force) || ((lcd->ldi_enable) && (lcd->current_bl != lcd->bl))) {
s6e8ax0_gamma_ctl(lcd);
#ifdef CONFIG_AID_DIMMING
s6e8ax0_aid_parameter_ctl(lcd, force);
#endif
s6e8ax0_set_acl(lcd, force);
s6e8ax0_set_elvss(lcd, force);
lcd->current_bl = lcd->bl;
dev_info(&lcd->ld->dev, "brightness=%d, bl=%d, candela=%d\n", brightness, lcd->bl, candela_table[lcd->bl]);
}
mutex_unlock(&lcd->bl_lock);
return 0;
}