static int __init gpio_init(void) { int i; if (!(gpio_sbh = sb_kattach())) return -ENODEV; sb_gpiosetcore(gpio_sbh); if ((gpio_major = devfs_register_chrdev(0, "gpio", &gpio_fops)) < 0) return gpio_major; gpio_dir = devfs_mk_dir(NULL, "gpio", NULL); for (i = 0; i < ARRAYSIZE(gpio_file); i++) { gpio_file[i].handle = devfs_register(gpio_dir, gpio_file[i].name, DEVFS_FL_DEFAULT, gpio_major, i, S_IFCHR | S_IRUGO | S_IWUGO, &gpio_fops, NULL); } return 0; }
/* * Linux: Init API */ void * bcm_api_init() { #ifdef __KERNEL__ #ifdef BCM5380 if (!(hSb = sb_kattach())) return 0; if (!(robo = robosw_attach(hSb, (1 << 2), (1 << 3), (1 << 4), (1 << 5)))) return 0; #else if (!(robo = robosw_attach_pmii())) return 0; #endif #if 0 /* remove for vxworks */ sema_init (&robo_sema, 1); #endif /* remove for vxworks */ return robo; #else /* for user mode, just open file handle */ if (0 == robo_fd_instance) { robo_fd = open(ROBO_DEVICE, O_RDWR, 0); } robo_fd_instance++; return (void *)robo_fd; #endif }
void __init brcm_setup(void) { char *s; int i; char *value; /* Get global SB handle */ sbh = sb_kattach(); /* Initialize clocks and interrupts */ sb_mips_init(sbh, SBMIPS_VIRTIRQ_BASE); if (BCM330X(current_cpu_data.processor_id) && (read_c0_diag() & BRCM_PFC_AVAIL)) { /* * Now that the sbh is inited set the proper PFC value */ printk("Setting the PFC to its default value\n"); enable_pfc(PFC_AUTO); } #ifdef CONFIG_SERIAL sb_serial_init(sbh, serial_add); /* reverse serial ports if nvram variable starts with console=ttyS1 */ /* Initialize UARTs */ s = nvram_get("kernel_args"); if (!s) s = ""; if (!strncmp(s, "console=ttyS1", 13)) { for (i = num_ports; i; i--) do_serial_add(&ports[i - 1]); } else { for (i = 0; i < num_ports; i++) do_serial_add(&ports[i]); } #endif #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) ide_ops = &std_ide_ops; #endif /* Override default command line arguments */ value = nvram_get("kernel_cmdline"); if (value && strlen(value) && strncmp(value, "empty", 5)) strncpy(arcs_cmdline, value, sizeof(arcs_cmdline)); /* Generic setup */ _machine_restart = bcm947xx_machine_restart; _machine_halt = bcm947xx_machine_halt; _machine_power_off = bcm947xx_machine_halt; board_time_init = bcm947xx_time_init; board_timer_setup = bcm947xx_timer_setup; }
static int __init bcm947xx_pcibios_init(void) { ulong flags; extern int pci_probe_only; pci_probe_only = 1; if (!(sbh = sb_kattach())) panic("sb_kattach failed"); spin_lock_init(&sbh_lock); spin_lock_irqsave(&sbh_lock, flags); sbpci_init(sbh); spin_unlock_irqrestore(&sbh_lock, flags); set_io_port_base((unsigned long) ioremap_nocache(SB_PCI_MEM, 0x04000000)); register_pci_controller(&bcm947xx_controller); return 0; }
static int __init gpio_init(void) { int i; if (!(gpio_sbh = sb_kattach(SB_OSH))) return -ENODEV; sb_gpiosetcore(gpio_sbh); if ((gpio_major = devfs_register_chrdev(0, "gpio", &gpio_fops)) < 0) return gpio_major; gpio_dir = devfs_mk_dir(NULL, "gpio", NULL); for (i = 0; i < ARRAYSIZE(gpio_file); i++) { gpio_file[i].handle = devfs_register(gpio_dir, gpio_file[i].name, DEVFS_FL_DEFAULT, gpio_major, i, S_IFCHR | S_IRUGO | S_IWUGO, &gpio_fops, NULL); } gpio_init_flag = 1; if (iswrt350n) { // printk(KERN_EMERG "WRT350N GPIO Init\n"); /* For WRT350N USB LED control */ sb_gpioreserve(gpio_sbh, 0x400, GPIO_HI_PRIORITY); sb_gpioouten(gpio_sbh, 0x400, 0x400, GPIO_HI_PRIORITY); sb_gpioreserve(gpio_sbh, 0x800, GPIO_HI_PRIORITY); sb_gpioouten(gpio_sbh, 0x800, 0x800, GPIO_HI_PRIORITY); //if (nvram_match("disabled_5397", "1")) { // printk("5397 switch GPIO-Reset \n"); sb_gpioreserve(gpio_sbh, 0x4, GPIO_HI_PRIORITY); sb_gpioouten(gpio_sbh, 0x4, 0x4, GPIO_HI_PRIORITY); sb_gpioout(gpio_sbh, 0x4, 0x4, GPIO_HI_PRIORITY); //} USB_SET_LED(USB_DISCONNECT); //2005-02-24 by kanki for USB LED } return 0; }
void __init pcibios_init(void) { ulong flags; if (!(sbh = sb_kattach())) panic("sb_kattach failed"); spin_lock_init(&sbh_lock); spin_lock_irqsave(&sbh_lock, flags); sbpci_init(sbh); spin_unlock_irqrestore(&sbh_lock, flags); set_io_port_base((unsigned long) ioremap_nocache(SB_PCI_MEM, 0x04000000)); /* Scan the SB bus */ pci_scan_bus(0, &pcibios_ops, NULL); }
void * osl_init() { uint32 c0reg; sb_t *sbh; /* Disable interrupts */ c0reg = MFC0(C0_STATUS, 0); c0reg &= ~ST0_IE; MTC0(C0_STATUS, 0, c0reg); /* Scan backplane */ sbh = sb_kattach(SB_OSH); sb_mips_init(sbh, 0); sb_serial_init(sbh, serial_add); /* Init malloc */ free_mem_ptr = (ulong) bss_end; free_mem_ptr_end = ((ulong)&c0reg) - 8192; /* Enough stack? */ return ((void *)sbh); }
mod_init_t sflash_mtd_init(void) { struct pci_dev *pdev; int ret = 0; struct sflash *info; uint i; #ifdef CONFIG_MTD_PARTITIONS struct mtd_partition *parts; #endif if (!(pdev = pci_find_device(VENDOR_BROADCOM, SB_CC, NULL))) { printk(KERN_ERR "sflash: chipcommon not found\n"); return -ENODEV; } memset(&sflash, 0, sizeof(struct sflash_mtd)); init_MUTEX(&sflash.lock); /* attach to the backplane */ if (!(sflash.sbh = sb_kattach(SB_OSH))) { printk(KERN_ERR "sflash: error attaching to backplane\n"); ret = -EIO; goto fail; } /* Map registers and flash base */ if (!(sflash.cc = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)))) { printk(KERN_ERR "sflash: error mapping registers\n"); ret = -EIO; goto fail; } /* Initialize serial flash access */ if (!(info = sflash_init(sflash.sbh, sflash.cc))) { printk(KERN_ERR "sflash: found no supported devices\n"); ret = -ENODEV; goto fail; } printk(KERN_INFO "sflash: found serial flash; blocksize=%dKB, numblocks=%d, size=%dKB\n",info->blocksize/1024,info->numblocks,info->size/1024); /* Setup region info */ sflash.region.offset = 0; sflash.region.erasesize = info->blocksize; sflash.region.numblocks = info->numblocks; if (sflash.region.erasesize > sflash.mtd.erasesize) sflash.mtd.erasesize = sflash.region.erasesize; sflash.mtd.size = info->size; sflash.mtd.numeraseregions = 1; /* Register with MTD */ sflash.mtd.name = "sflash"; sflash.mtd.type = MTD_NORFLASH; sflash.mtd.flags = MTD_CAP_NORFLASH; sflash.mtd.eraseregions = &sflash.region; sflash.mtd.module = THIS_MODULE; sflash.mtd.erase = sflash_mtd_erase; sflash.mtd.read = sflash_mtd_read; sflash.mtd.write = sflash_mtd_write; sflash.mtd.priv = &sflash; #ifdef CONFIG_MTD_PARTITIONS parts = init_mtd_partitions(&sflash.mtd, sflash.mtd.size); for (i = 0; parts[i].name; i++); ret = add_mtd_partitions(&sflash.mtd, parts, i); #else ret = add_mtd_device(&sflash.mtd); #endif if (ret) { printk(KERN_ERR "sflash: add_mtd failed\n"); goto fail; } return 0; fail: if (sflash.cc) iounmap((void *) sflash.cc); if (sflash.sbh) sb_detach(sflash.sbh); return ret; }
/* Read the flash ID and set the globals */ int sysFlashInit(char *flash_str) { osl_t *osh; uint32 fltype = PFLASH; uint16 flash_vendid = 0; uint16 flash_devid = 0; int idx; struct sflash *sflash; /* * Check for serial flash. */ sbh = sb_kattach(SB_OSH); ASSERT(sbh); osh = sb_osh(sbh); flashutl_base = (uint8*)OSL_UNCACHED(SB_FLASH1); flashutl_wsz = sizeof(uint16); cc = (chipcregs_t *)sb_setcore(sbh, SB_CC, 0); if (cc) { flashutl_base = (uint8*)OSL_UNCACHED(SB_FLASH2); flashutl_wsz = (R_REG(osh, &cc->flash_config) & CC_CFG_DS) ? sizeof(uint16) : sizeof(uint8); /* Select SFLASH ? */ fltype = R_REG(osh, &cc->capabilities) & CC_CAP_FLASH_MASK; if (fltype == SFLASH_ST || fltype == SFLASH_AT) { sflash = sflash_init(sbh, cc); flashutl_cmd = &sflash_cmd_t; flashutl_desc = &sflash_desc; flashutl_desc->size = sflash->size; if (flash_str) sprintf(flash_str, "SFLASH %d kB", sflash->size/1024); return (0); } } ASSERT(flashutl_wsz == sizeof(uint8) || flashutl_wsz == sizeof(uint16)); /* * Parallel flash support * Some flashes have different unlock addresses, try each it turn */ for (idx = 0; fltype == PFLASH && idx < ARRAYSIZE(flash_cmds); idx ++) { flashutl_cmd = &flash_cmds[idx]; if (flashutl_cmd->type == OLD) continue; if (flashutl_cmd->read_id) cmd(flashutl_cmd->read_id, CMD_ADDR); #ifdef MIPSEB flash_vendid = flash_readword(FLASH_ADDR(2)); flash_devid = flash_readword(FLASH_ADDR(0)); #else flash_vendid = flash_readword(FLASH_ADDR(0)); flash_devid = flash_readword(FLASH_ADDR(2)); #endif /* MIPSEB */ /* Funky AMD, uses 3 byte device ID so use first byte (4th addr) to * identify it is a 3-byte ID and use the next two bytes (5th & 6th addr) * to form a word for unique identification of format xxyy, where * xx = 5th addr and yy = 6th addr */ if ((flash_vendid == 1) && (flash_devid == 0x227e)) { /* Get real devid */ uint16 flash_devid_5th; #ifdef MIPSEB flash_devid_5th = flash_readword(FLASH_ADDR(0x1e)) << 8; flash_devid = (flash_readword(FLASH_ADDR(0x1c)) & 0xff) | flash_devid_5th; #else flash_devid_5th = flash_readword(FLASH_ADDR(0x1c)) << 8; flash_devid = (flash_readword(FLASH_ADDR(0x1e)) & 0xff) | flash_devid_5th; #endif /* MIPSEB */ } flashutl_desc = flashes; while (flashutl_desc->mfgid != 0 && !(flashutl_desc->mfgid == flash_vendid && flashutl_desc->devid == flash_devid)) { flashutl_desc++; } if (flashutl_desc->mfgid != 0) break; } if (flashutl_desc->mfgid == 0) { flashutl_desc = NULL; flashutl_cmd = NULL; } else { flashutl_cmd = flash_cmds; while (flashutl_cmd->type != 0 && flashutl_cmd->type != flashutl_desc->type) flashutl_cmd++; if (flashutl_cmd->type == 0) flashutl_cmd = NULL; } if (flashutl_cmd != NULL) { flash_reset(); } if (flashutl_desc == NULL) { if (flash_str) sprintf(flash_str, "UNKNOWN 0x%x 0x%x", flash_vendid, flash_devid); DPRINT(("Flash type UNKNOWN\n")); return 1; } if (flash_str) strcpy(flash_str, flashutl_desc->desc); DPRINT(("Flash type \"%s\"\n", flashutl_desc->desc)); return 0; }
/* Read the flash ID and set the globals */ int sysFlashInit(char *flash_str) { uint32 fltype = PFLASH; uint16 flash_vendid = 0; uint16 flash_devid = 0; uint16* flash = (uint16*)0xbfc00000; int idx; struct sflash *sflash; void *sbh; /* * Check for serial flash. */ sbh = sb_kattach(); ASSERT(sbh); cc = (chipcregs_t *) sb_setcore(sbh, SB_CC, 0); if (cc) { flash = (uint16*)0xbc000000; fltype = R_REG(&cc->capabilities) & CAP_FLASH_MASK; /* Select SFLASH ? */ if (fltype == SFLASH_ST || fltype == SFLASH_AT) { sflash = sflash_init(cc); flashutl_cmd = &sflash_cmd_t; flashutl_desc = &sflash_desc; flashutl_desc->size = sflash->size; if (flash_str) sprintf(flash_str, "SFLASH %d kB", sflash->size/1024); return(0); } } flashutl_base = (uint8*)flash; /* * Parallel flash support * Some flashes have different unlock addresses, try each it turn */ idx = sizeof(flash_cmds)/sizeof(flash_cmds_t) - 2; flashutl_cmd = &flash_cmds[idx--]; while((fltype == PFLASH) && flashutl_cmd->type) { if (flashutl_cmd->read_id) cmd(flashutl_cmd->read_id, CMD_ADDR); #ifdef MIPSEB flash_vendid = *(flash + 1); flash_devid = *flash; #else flash_vendid = *flash; flash_devid = *(flash + 1); #endif /* Funky AMD */ if ((flash_vendid == 1) && (flash_devid == 0x227e)) { /* Get real devid */ #ifdef MIPSEB flash_devid = *(flash+0xe); #else flash_devid = *(flash+0xf); #endif } flashutl_desc = flashes; while (flashutl_desc->mfgid != 0 && !(flashutl_desc->mfgid == flash_vendid && flashutl_desc->devid == flash_devid)) { flashutl_desc++; } if (flashutl_desc->mfgid != 0) break; flashutl_cmd = &flash_cmds[idx--]; } if (flashutl_desc->mfgid == 0) { flashutl_desc = NULL; flashutl_cmd = NULL; } else { flashutl_cmd = flash_cmds; while (flashutl_cmd->type != 0 && flashutl_cmd->type != flashutl_desc->type) flashutl_cmd++; if (flashutl_cmd->type == 0) flashutl_cmd = NULL; } if (flashutl_cmd != NULL) { flash_reset(); } if (flashutl_desc == NULL) { if (flash_str) sprintf(flash_str, "UNKNOWN 0x%x 0x%x", flash_vendid, flash_devid); DPRINT(("Flash type UNKNOWN\n")); return 1; } if (flash_str) strcpy(flash_str, flashutl_desc->desc); DPRINT(("Flash type \"%s\"\n", flashutl_desc->desc)); return 0; }