void cloud9_state::machine_start()
{
rectangle visarea;
/* initialize globals */
m_syncprom = memregion("proms")->base() + 0x000;
/* find the start of VBLANK in the SYNC PROM */
for (m_vblank_start = 0; m_vblank_start < 256; m_vblank_start++)
if ((m_syncprom[(m_vblank_start - 1) & 0xff] & 2) != 0 && (m_syncprom[m_vblank_start] & 2) == 0)
break;
if (m_vblank_start == 0)
m_vblank_start = 256;
/* find the end of VBLANK in the SYNC PROM */
for (m_vblank_end = 0; m_vblank_end < 256; m_vblank_end++)
if ((m_syncprom[(m_vblank_end - 1) & 0xff] & 2) == 0 && (m_syncprom[m_vblank_end] & 2) != 0)
break;
/* can't handle the wrapping case */
assert(m_vblank_end < m_vblank_start);
/* reconfigure the visible area to match */
visarea.set(0, 255, m_vblank_end + 1, m_vblank_start);
m_screen->configure(320, 256, visarea, HZ_TO_ATTOSECONDS(PIXEL_CLOCK) * VTOTAL * HTOTAL);
/* create a timer for IRQs and set up the first callback */
m_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(cloud9_state::clock_irq),this));
m_irq_state = 0;
schedule_next_irq(0-64);
/* setup for save states */
save_item(NAME(m_irq_state));
}
static void clock_irq(int param)
{
/* assert the IRQ if not already asserted */
if (!irq_state)
{
cpunum_set_input_line(0, 0, ASSERT_LINE);
irq_state = 1;
}
/* force an update now */
video_screen_update_partial(0, video_screen_get_vpos(0));
/* find the next edge */
schedule_next_irq(param);
}
static TIMER_CALLBACK( clock_irq )
{
/* assert the IRQ if not already asserted */
if (!irq_state)
{
cpunum_set_input_line(machine, 0, 0, ASSERT_LINE);
irq_state = 1;
}
/* force an update now */
video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
/* find the next edge */
schedule_next_irq(machine, param);
}
static TIMER_CALLBACK( clock_irq )
{
cloud9_state *state = (cloud9_state *)machine->driver_data;
/* assert the IRQ if not already asserted */
if (!state->irq_state)
{
cpu_set_input_line(state->maincpu, 0, ASSERT_LINE);
state->irq_state = 1;
}
/* force an update now */
machine->primary_screen->update_partial(machine->primary_screen->vpos());
/* find the next edge */
schedule_next_irq(machine, param);
}
static MACHINE_START( ccastles )
{
rectangle visarea;
/* initialize globals */
syncprom = memory_region(REGION_PROMS) + 0x000;
/* find the start of VBLANK in the SYNC PROM */
for (ccastles_vblank_start = 0; ccastles_vblank_start < 256; ccastles_vblank_start++)
if ((syncprom[(ccastles_vblank_start - 1) & 0xff] & 1) == 0 && (syncprom[ccastles_vblank_start] & 1) != 0)
break;
if (ccastles_vblank_start == 0)
ccastles_vblank_start = 256;
/* find the end of VBLANK in the SYNC PROM */
for (ccastles_vblank_end = 0; ccastles_vblank_end < 256; ccastles_vblank_end++)
if ((syncprom[(ccastles_vblank_end - 1) & 0xff] & 1) != 0 && (syncprom[ccastles_vblank_end] & 1) == 0)
break;
/* can't handle the wrapping case */
assert(ccastles_vblank_end < ccastles_vblank_start);
/* reconfigure the visible area to match */
visarea.min_x = 0;
visarea.max_x = 255;
visarea.min_y = ccastles_vblank_end;
visarea.max_y = ccastles_vblank_start - 1;
video_screen_configure(0, 320, 256, &visarea, (float)PIXEL_CLOCK / (float)VTOTAL / (float)HTOTAL);
/* configure the ROM banking */
memory_configure_bank(1, 0, 2, memory_region(REGION_CPU1) + 0xa000, 0x6000);
/* create a timer for IRQs and set up the first callback */
irq_timer = timer_alloc(clock_irq);
irq_state = 0;
schedule_next_irq(0);
/* allocate backing memory for the NVRAM */
generic_nvram = auto_malloc(generic_nvram_size);
/* setup for save states */
state_save_register_global(irq_state);
state_save_register_global_array(nvram_store);
state_save_register_global_pointer(generic_nvram, generic_nvram_size);
return 0;
}
static TIMER_CALLBACK( clock_irq )
{
ccastles_state *state = machine.driver_data<ccastles_state>();
/* assert the IRQ if not already asserted */
if (!state->m_irq_state)
{
device_set_input_line(state->m_maincpu, 0, ASSERT_LINE);
state->m_irq_state = 1;
}
/* force an update now */
machine.primary_screen->update_partial(machine.primary_screen->vpos());
/* find the next edge */
schedule_next_irq(machine, param);
}
static MACHINE_START( cloud9 )
{
cloud9_state *state = (cloud9_state *)machine->driver_data;
rectangle visarea;
/* initialize globals */
state->maincpu = machine->device("maincpu");
state->syncprom = memory_region(machine, "proms") + 0x000;
/* find the start of VBLANK in the SYNC PROM */
for (state->vblank_start = 0; state->vblank_start < 256; state->vblank_start++)
if ((state->syncprom[(state->vblank_start - 1) & 0xff] & 2) != 0 && (state->syncprom[state->vblank_start] & 2) == 0)
break;
if (state->vblank_start == 0)
state->vblank_start = 256;
/* find the end of VBLANK in the SYNC PROM */
for (state->vblank_end = 0; state->vblank_end < 256; state->vblank_end++)
if ((state->syncprom[(state->vblank_end - 1) & 0xff] & 2) == 0 && (state->syncprom[state->vblank_end] & 2) != 0)
break;
/* can't handle the wrapping case */
assert(state->vblank_end < state->vblank_start);
/* reconfigure the visible area to match */
visarea.min_x = 0;
visarea.max_x = 255;
visarea.min_y = state->vblank_end + 1;
visarea.max_y = state->vblank_start;
machine->primary_screen->configure(320, 256, visarea, HZ_TO_ATTOSECONDS(PIXEL_CLOCK) * VTOTAL * HTOTAL);
/* create a timer for IRQs and set up the first callback */
state->irq_timer = timer_alloc(machine, clock_irq, NULL);
state->irq_state = 0;
schedule_next_irq(machine, 0-64);
/* allocate backing memory for the NVRAM */
machine->generic.nvram.u8 = auto_alloc_array(machine, UINT8, machine->generic.nvram_size);
/* setup for save states */
state_save_register_global(machine, state->irq_state);
state_save_register_global_pointer(machine, machine->generic.nvram.u8, machine->generic.nvram_size);
}
static MACHINE_START( cloud9 )
{
rectangle visarea;
/* initialize globals */
syncprom = memory_region(REGION_PROMS) + 0x000;
/* find the start of VBLANK in the SYNC PROM */
for (cloud9_vblank_start = 0; cloud9_vblank_start < 256; cloud9_vblank_start++)
if ((syncprom[(cloud9_vblank_start - 1) & 0xff] & 2) != 0 && (syncprom[cloud9_vblank_start] & 2) == 0)
break;
if (cloud9_vblank_start == 0)
cloud9_vblank_start = 256;
/* find the end of VBLANK in the SYNC PROM */
for (cloud9_vblank_end = 0; cloud9_vblank_end < 256; cloud9_vblank_end++)
if ((syncprom[(cloud9_vblank_end - 1) & 0xff] & 2) == 0 && (syncprom[cloud9_vblank_end] & 2) != 0)
break;
/* can't handle the wrapping case */
assert(cloud9_vblank_end < cloud9_vblank_start);
/* reconfigure the visible area to match */
visarea.min_x = 0;
visarea.max_x = 255;
visarea.min_y = cloud9_vblank_end + 1;
visarea.max_y = cloud9_vblank_start;
video_screen_configure(machine->primary_screen, 320, 256, &visarea, HZ_TO_ATTOSECONDS(PIXEL_CLOCK) * VTOTAL * HTOTAL);
/* create a timer for IRQs and set up the first callback */
irq_timer = timer_alloc(clock_irq, NULL);
irq_state = 0;
schedule_next_irq(machine, 0-64);
/* allocate backing memory for the NVRAM */
generic_nvram = auto_malloc(generic_nvram_size);
/* setup for save states */
state_save_register_global(irq_state);
state_save_register_global_pointer(generic_nvram, generic_nvram_size);
}
static MACHINE_START( ccastles )
{
ccastles_state *state = machine.driver_data<ccastles_state>();
rectangle visarea;
/* initialize globals */
state->m_syncprom = state->memregion("proms")->base() + 0x000;
/* find the start of VBLANK in the SYNC PROM */
for (state->m_vblank_start = 0; state->m_vblank_start < 256; state->m_vblank_start++)
if ((state->m_syncprom[(state->m_vblank_start - 1) & 0xff] & 1) == 0 && (state->m_syncprom[state->m_vblank_start] & 1) != 0)
break;
if (state->m_vblank_start == 0)
state->m_vblank_start = 256;
/* find the end of VBLANK in the SYNC PROM */
for (state->m_vblank_end = 0; state->m_vblank_end < 256; state->m_vblank_end++)
if ((state->m_syncprom[(state->m_vblank_end - 1) & 0xff] & 1) != 0 && (state->m_syncprom[state->m_vblank_end] & 1) == 0)
break;
/* can't handle the wrapping case */
assert(state->m_vblank_end < state->m_vblank_start);
/* reconfigure the visible area to match */
visarea.set(0, 255, state->m_vblank_end, state->m_vblank_start - 1);
machine.primary_screen->configure(320, 256, visarea, HZ_TO_ATTOSECONDS(PIXEL_CLOCK) * VTOTAL * HTOTAL);
/* configure the ROM banking */
state->membank("bank1")->configure_entries(0, 2, state->memregion("maincpu")->base() + 0xa000, 0x6000);
/* create a timer for IRQs and set up the first callback */
state->m_irq_timer = machine.scheduler().timer_alloc(FUNC(clock_irq));
state->m_irq_state = 0;
schedule_next_irq(machine, 0);
/* setup for save states */
state->save_item(NAME(state->m_irq_state));
state->save_item(NAME(state->m_nvram_store));
}