uint32_t nrf_drv_ppi_group_free(nrf_ppi_channel_group_t group)
{
uint32_t err_code;
if (!is_app_group(group))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else if (!is_allocated_group(group))
{
err_code = NRF_ERROR_INVALID_STATE;
}
else
{
#if (NRF_PPI_RESTRICTED > 0)
err_code = sd_ppi_group_task_disable((uint8_t) group);
#else
nrf_ppi_group_disable(group);
err_code = NRF_SUCCESS;
#endif
CRITICAL_REGION_ENTER();
group_allocated_clr(group);
CRITICAL_REGION_EXIT();
}
return err_code;
}
static void ppi_disable_channel_group(uint32_t ch_grp)
{
#if(USE_WITH_SOFTDEVICE == 1)
sd_ppi_group_task_disable(ch_grp);
#else
NRF_PPI->TASKS_CHG[ch_grp].DIS = 1;
#endif
}
uint32_t nrf_drv_ppi_uninit(void)
{
uint32_t err_code = NRF_SUCCESS;
uint32_t mask = NRF_PPI_ALL_APP_GROUPS_MASK;
nrf_ppi_channel_group_t group;
if (m_drv_state != NRF_DRV_STATE_UNINITIALIZED)
{
m_drv_state = NRF_DRV_STATE_UNINITIALIZED;
// Disable all channels and groups
#if (NRF_PPI_RESTRICTED > 0)
err_code = sd_ppi_channel_enable_clr(NRF_PPI_ALL_APP_CHANNELS_MASK);
if (err_code != NRF_SUCCESS)
{
return NRF_ERROR_INTERNAL;
}
for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++)
{
if(mask & group_to_mask(group))
{
err_code = sd_ppi_group_task_disable((uint8_t)group);
if (err_code != NRF_SUCCESS)
{
return NRF_ERROR_INTERNAL;
}
}
}
#else
nrf_ppi_channel_disable_all();
for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++)
{
if(mask & group_to_mask(group))
{
nrf_ppi_channel_group_clear(group);
}
}
#endif
channel_allocated_clr_all();
group_allocated_clr_all();
}
else
{
err_code = NRF_ERROR_INVALID_STATE;
}
return err_code;
}
uint32_t ir_lib_init(uint32_t ir_pin)
{
uint32_t err_code = 0;
NRF_GPIOTE->CONFIG[0] = GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos |
GPIOTE_CONFIG_OUTINIT_Low << GPIOTE_CONFIG_OUTINIT_Pos |
GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos |
ir_pin << GPIOTE_CONFIG_PSEL_Pos;
// Carrier timer init
IR_TIMER_CARRIER->MODE = TIMER_MODE_MODE_Timer;
IR_TIMER_CARRIER->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
IR_TIMER_CARRIER->PRESCALER = 4;
IR_TIMER_CARRIER->CC[0] = IR_CARRIER_LOW_US;
IR_TIMER_CARRIER->CC[1] = IR_CARRIER_LOW_US + IR_CARRIER_HIGH_US;
IR_TIMER_CARRIER->SHORTS = TIMER_SHORTS_COMPARE1_CLEAR_Msk;
// Modulation timer init
IR_CARRIER_COUNTER->MODE = TIMER_MODE_MODE_Counter;
IR_CARRIER_COUNTER->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
IR_CARRIER_COUNTER->INTENSET = TIMER_INTENSET_COMPARE0_Msk | TIMER_INTENSET_COMPARE1_Msk;
IR_CARRIER_COUNTER->EVENTS_COMPARE[0] = 0;
IR_CARRIER_COUNTER->EVENTS_COMPARE[1] = 0;
err_code |= sd_nvic_SetPriority(IR_CARRIER_COUNTER_IRQn, IR_CARRIER_COUNTER_IRQ_Priority);
err_code |= sd_nvic_EnableIRQ(IR_CARRIER_COUNTER_IRQn);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_A, &IR_TIMER_CARRIER->EVENTS_COMPARE[1], &IR_CARRIER_COUNTER->TASKS_COUNT);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_B, &IR_TIMER_CARRIER->EVENTS_COMPARE[0], &NRF_GPIOTE->TASKS_OUT[0]);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_C, &IR_TIMER_CARRIER->EVENTS_COMPARE[1], &NRF_GPIOTE->TASKS_OUT[0]);
err_code |= sd_ppi_group_assign(IR_PPI_GROUP, 1 << IR_PPI_CH_B | 1 << IR_PPI_CH_C);
err_code |= sd_ppi_group_task_disable(IR_PPI_GROUP);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_D, &IR_CARRIER_COUNTER->EVENTS_COMPARE[0], &NRF_PPI->TASKS_CHG[IR_PPI_GROUP].DIS);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_E, &IR_CARRIER_COUNTER->EVENTS_COMPARE[1], &NRF_PPI->TASKS_CHG[IR_PPI_GROUP].EN);
err_code |= sd_ppi_channel_enable_set(1 << IR_PPI_CH_A | 1 << IR_PPI_CH_B | 1 << IR_PPI_CH_C | 1 << IR_PPI_CH_D | 1 << IR_PPI_CH_E);
m_busy = false;
return err_code;
}
uint32_t nrf_drv_ppi_group_disable(nrf_ppi_channel_group_t group)
{
uint32_t err_code;
if (!is_app_group(group))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else
{
#if (NRF_PPI_RESTRICTED > 0)
err_code = sd_ppi_group_task_disable((uint8_t) group);
#else
nrf_ppi_group_disable(group);
err_code = NRF_SUCCESS;
#endif
}
return err_code;
}
