/**
* setVcoreMCLK
*
* Config VCORE and MCLK registers
*
* @param vCore VCORE level
* @param dcorsel CPU DCORSEL value
* @param flln MCLK multiplier bits
*/
void __inline__ CC430CORE::setVcoreMCLK(uint8_t vCore, uint16_t dcorsel, uint16_t flln)
{
// Configure PMM
SetVCore(vCore);
// Set MCLK
setMCLK(dcorsel, flln);
}
static void setCPUFreq(unsigned int freq)
{
switch (freq)
{
default:
break;
case M1:
DCOCTL = 0;
BCSCTL1 |= CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
setMCLK(DCOCLK, 1);
_currentfreq = 1;
break;
case K500:
DCOCTL = 0;
BCSCTL1 |= CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
setMCLK(DCOCLK, 2);
_currentfreq = 500;
break;
case K250:
DCOCTL = 0;
BCSCTL1 |= CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
setMCLK(DCOCLK, 4);
_currentfreq = 250;
break;
case K125:
DCOCTL = 0;
BCSCTL1 |= CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
setMCLK(DCOCLK, 8);
_currentfreq = 125;
break;
case K32:
setMCLK(CRYSTAL, 1);
_currentfreq = 32;
break;
case K22:
setMCLK(VLOCLK, 1);
_currentfreq = 22;
break;
case DAMNSLOW:
setMCLK(VLOCLK, 8);
_currentfreq = 2;
break;
}
}
/**
* init
*
* Initialize CC430 core
* VCORE = 1 and SCLK = 8 MHz when no argument is passed
*
* @param vCore VCORE level
* @param dcorsel CPU DCORSEL value
* @param flln MCLK multiplier bits
*/
void CC430CORE::init(uint8_t vCore, uint16_t dcorsel, uint16_t flln)
{
// Configure PMM
SetVCore(vCore);
// Set the High-Power Mode Request Enable bit so LPM3 can be entered
// with active radio enabled
PMMCTL0_H = 0xA5;
PMMCTL0_L |= PMMHPMRE_L;
PMMCTL0_H = 0x00;
/*
* Select internal RC oscillator as FLL reference
*/
UCSCTL3 |= SELREF_2; // Set DCO FLL reference = REFO
UCSCTL4 |= SELA_2; // Set ACLK = REFO
/*
* Configure CPU clock
*/
setMCLK(dcorsel, flln);
/*
* Select Interrupt edge for PA_PD and SYNC signal:
* Interrupt Edge select register: 1 == Interrupt on High to Low transition.
*/
RF1AIES = BIT0 | BIT9;
// POWER: Turn ADC and reference voltage off to conserve power
ADC12CTL0 &= ~ADC12ENC;
ADC12CTL0 &= ~ADC12ON;
ADC12CTL0 &= ~ADC12REFON;
REFCTL0 &= ~REFON;
REFCTL0 |= REFTCOFF; // Temp sensor disabled
// Config pins as outputs by default except P2, wich contains the ADC inputs
P1DIR = 0xFF;
P3DIR = 0xFF;
PJDIR = 0xFF;
}
