static void mn10300_frame_unwind_init (struct gdbarch *gdbarch) { frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); frame_unwind_append_sniffer (gdbarch, mn10300_frame_sniffer); frame_base_set_default (gdbarch, &mn10300_frame_base); set_gdbarch_unwind_dummy_id (gdbarch, mn10300_unwind_dummy_id); set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); }
static struct gdbarch * m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { struct gdbarch *gdbarch; /* If there is already a candidate, use it. */ arches = gdbarch_list_lookup_by_info (arches, &info); if (arches != NULL) return arches->gdbarch; /* Allocate space for the new architecture. */ gdbarch = gdbarch_alloc (&info, NULL); /* There is no real `long double'. */ set_gdbarch_long_double_bit (gdbarch, 64); set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS); set_gdbarch_register_name (gdbarch, m88k_register_name); set_gdbarch_register_type (gdbarch, m88k_register_type); /* Register numbers of various important registers. */ set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM); set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM); /* Core file support. */ set_gdbarch_regset_from_core_section (gdbarch, m88k_regset_from_core_section); set_gdbarch_print_insn (gdbarch, print_insn_m88k); set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue); /* Stack grows downward. */ set_gdbarch_inner_than (gdbarch, core_addr_lessthan); /* Call dummy code. */ set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call); set_gdbarch_unwind_dummy_id (gdbarch, m88k_unwind_dummy_id); /* Return value info */ set_gdbarch_return_value (gdbarch, m88k_return_value); set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove); set_gdbarch_breakpoint_from_pc (gdbarch, m88k_breakpoint_from_pc); set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc); set_gdbarch_write_pc (gdbarch, m88k_write_pc); frame_base_set_default (gdbarch, &m88k_frame_base); frame_unwind_append_sniffer (gdbarch, m88k_frame_sniffer); return gdbarch; }
static struct gdbarch * sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { struct gdbarch_tdep *tdep; struct gdbarch *gdbarch; /* If there is already a candidate, use it. */ arches = gdbarch_list_lookup_by_info (arches, &info); if (arches != NULL) return arches->gdbarch; /* Allocate space for the new architecture. */ tdep = XMALLOC (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); tdep->pc_regnum = SPARC32_PC_REGNUM; tdep->npc_regnum = SPARC32_NPC_REGNUM; tdep->gregset = NULL; tdep->sizeof_gregset = 0; tdep->fpregset = NULL; tdep->sizeof_fpregset = 0; tdep->plt_entry_size = 0; tdep->step_trap = sparc_step_trap; set_gdbarch_long_double_bit (gdbarch, 128); set_gdbarch_long_double_format (gdbarch, &floatformat_sparc_quad); set_gdbarch_num_regs (gdbarch, SPARC32_NUM_REGS); set_gdbarch_register_name (gdbarch, sparc32_register_name); set_gdbarch_register_type (gdbarch, sparc32_register_type); set_gdbarch_num_pseudo_regs (gdbarch, SPARC32_NUM_PSEUDO_REGS); set_gdbarch_pseudo_register_read (gdbarch, sparc32_pseudo_register_read); set_gdbarch_pseudo_register_write (gdbarch, sparc32_pseudo_register_write); /* Register numbers of various important registers. */ set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM); /* %sp */ set_gdbarch_pc_regnum (gdbarch, SPARC32_PC_REGNUM); /* %pc */ set_gdbarch_fp0_regnum (gdbarch, SPARC_F0_REGNUM); /* %f0 */ /* Call dummy code. */ set_gdbarch_call_dummy_location (gdbarch, ON_STACK); set_gdbarch_push_dummy_code (gdbarch, sparc32_push_dummy_code); set_gdbarch_push_dummy_call (gdbarch, sparc32_push_dummy_call); set_gdbarch_return_value (gdbarch, sparc32_return_value); set_gdbarch_stabs_argument_has_addr (gdbarch, sparc32_stabs_argument_has_addr); set_gdbarch_skip_prologue (gdbarch, sparc32_skip_prologue); /* Stack grows downward. */ set_gdbarch_inner_than (gdbarch, core_addr_lessthan); set_gdbarch_breakpoint_from_pc (gdbarch, sparc_breakpoint_from_pc); set_gdbarch_frame_args_skip (gdbarch, 8); set_gdbarch_print_insn (gdbarch, print_insn_sparc); set_gdbarch_software_single_step (gdbarch, sparc_software_single_step); set_gdbarch_write_pc (gdbarch, sparc_write_pc); set_gdbarch_unwind_dummy_id (gdbarch, sparc_unwind_dummy_id); set_gdbarch_unwind_pc (gdbarch, sparc_unwind_pc); frame_base_set_default (gdbarch, &sparc32_frame_base); /* Hook in the DWARF CFI frame unwinder. */ dwarf2_frame_set_init_reg (gdbarch, sparc32_dwarf2_frame_init_reg); /* FIXME: kettenis/20050423: Don't enable the unwinder until the StackGhost issues have been resolved. */ /* Hook in ABI-specific overrides, if they have been registered. */ gdbarch_init_osabi (info, gdbarch); frame_unwind_append_sniffer (gdbarch, sparc32_frame_sniffer); /* If we have register sets, enable the generic core file support. */ if (tdep->gregset) set_gdbarch_regset_from_core_section (gdbarch, sparc_regset_from_core_section); return gdbarch; }
void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); /* AMD64 generally uses `fxsave' instead of `fsave' for saving its floating-point registers. */ tdep->sizeof_fpregset = I387_SIZEOF_FXSAVE; /* AMD64 has an FPU and 16 SSE registers. */ tdep->st0_regnum = AMD64_ST0_REGNUM; tdep->num_xmm_regs = 16; /* This is what all the fuss is about. */ set_gdbarch_long_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64); set_gdbarch_ptr_bit (gdbarch, 64); /* In contrast to the i386, on AMD64 a `long double' actually takes up 128 bits, even though it's still based on the i387 extended floating-point format which has only 80 significant bits. */ set_gdbarch_long_double_bit (gdbarch, 128); set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS); set_gdbarch_register_name (gdbarch, amd64_register_name); set_gdbarch_register_type (gdbarch, amd64_register_type); /* Register numbers of various important registers. */ set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */ set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */ set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */ set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */ /* APPLE LOCAL: Add the frame pointer register so it can be modified in expressions. */ set_gdbarch_deprecated_fp_regnum (gdbarch, AMD64_RBP_REGNUM); /* %rbp */ /* The "default" register numbering scheme for AMD64 is referred to as the "DWARF Register Number Mapping" in the System V psABI. The preferred debugging format for all known AMD64 targets is actually DWARF2, and GCC doesn't seem to support DWARF (that is DWARF-1), but we provide the same mapping just in case. This mapping is also used for stabs, which GCC does support. */ set_gdbarch_stab_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum); set_gdbarch_dwarf_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum); set_gdbarch_dwarf2_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum); /* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to be in use on any of the supported AMD64 targets. */ /* Call dummy code. */ set_gdbarch_push_dummy_call (gdbarch, amd64_push_dummy_call); set_gdbarch_frame_align (gdbarch, amd64_frame_align); set_gdbarch_frame_red_zone_size (gdbarch, 128); set_gdbarch_convert_register_p (gdbarch, amd64_convert_register_p); set_gdbarch_register_to_value (gdbarch, i387_register_to_value); set_gdbarch_value_to_register (gdbarch, i387_value_to_register); set_gdbarch_return_value (gdbarch, amd64_return_value); set_gdbarch_skip_prologue (gdbarch, amd64_skip_prologue); /* Avoid wiring in the MMX registers for now. */ set_gdbarch_num_pseudo_regs (gdbarch, 0); tdep->mm0_regnum = -1; set_gdbarch_unwind_dummy_id (gdbarch, amd64_unwind_dummy_id); frame_unwind_append_sniffer (gdbarch, amd64_sigtramp_frame_sniffer); frame_unwind_append_sniffer (gdbarch, amd64_frame_sniffer); frame_base_set_default (gdbarch, &amd64_frame_base); /* If we have a register mapping, enable the generic core file support. */ if (tdep->gregset_reg_offset) set_gdbarch_regset_from_core_section (gdbarch, amd64_regset_from_core_section); /* APPLE LOCAL: A handy little function. */ set_gdbarch_fetch_pointer_argument (gdbarch, amd64_fetch_pointer_argument); }