static void rs780_por_mc_index_init(pci_devfn_t nb_dev) { set_nbmc_enable_bits(nb_dev, 0x7A, ~0xFFFFFF80, 0x0000005F); set_nbmc_enable_bits(nb_dev, 0xD8, ~0x00000000, 0x00600060); set_nbmc_enable_bits(nb_dev, 0xD9, ~0x00000000, 0x00600060); set_nbmc_enable_bits(nb_dev, 0xE0, ~0x00000000, 0x00000000); set_nbmc_enable_bits(nb_dev, 0xE1, ~0x00000000, 0x00000000); set_nbmc_enable_bits(nb_dev, 0xE8, ~0x00000000, 0x003E003E); set_nbmc_enable_bits(nb_dev, 0xE9, ~0x00000000, 0x003E003E); }
/***************************************** * Compliant with CIM_33's ATINB_MCIndex_POR_TABLE *****************************************/ static void rs780_por_mc_index_init(device_t nb_dev) { printk_info("enter rs780_por_mc_index_init\n"); set_nbmc_enable_bits(nb_dev, 0x7A, ~0xFFFFFF80, 0x0000005F); set_nbmc_enable_bits(nb_dev, 0xD8, ~0x00000000, 0x00600060); set_nbmc_enable_bits(nb_dev, 0xD9, ~0x00000000, 0x00600060); set_nbmc_enable_bits(nb_dev, 0xE0, ~0x00000000, 0x00000000); set_nbmc_enable_bits(nb_dev, 0xE1, ~0x00000000, 0x00000000); set_nbmc_enable_bits(nb_dev, 0xE8, ~0x00000000, 0x003E003E); set_nbmc_enable_bits(nb_dev, 0xE9, ~0x00000000, 0x003E003E); printk_info("exit rs780_por_mc_index_init\n"); }