void kgdb_params_early_init(void) { if (cpm_uart_nr) return; get_from_flat_dt("cpu", "clock-frequency", &ppc_proc_freq); get_from_flat_dt("cpm", "brg-frequency", &brgfreq); get_from_flat_dt("soc", "reg", &immrbase); #ifdef CONFIG_FSL_BOOKE /* MMU configuration for early access to IMMR and memory */ settlbcam(num_tlbcam_entries - 1, immrbase, immrbase, 0x100000, _PAGE_IO, 0); settlbcam(0, KERNELBASE, 0, lmb_end_of_DRAM(), _PAGE_KERNEL, 0); #else /* Set up BAT for early access to IMMR */ mb(); mtspr(SPRN_DBAT1L, (immrbase & 0xffff0000) | 0x2a); mtspr(SPRN_DBAT1U, (immrbase & 0xffff0000) | BL_256M << 2 | 2); mb(); setbat(1, immrbase, immrbase, 0x10000000, _PAGE_IO); #endif #ifdef CONFIG_MPC8272_ADS /* Enable serial ports in BCSR */ clrbits32((u32 *)0xf4500000, BCSR1_RS232_EN1 | BCSR1_RS232_EN2); #endif cpm2_reset(); init_ioports(); }
void __init cam_mapin_extra_chip_select(void) { extern phys_addr_t get_immrbase(void); phys_addr_t immr_base = -1; immr_base = get_immrbase(); if ( immr_base != -1 ) { //configuration base settlbcam(15, immr_base, immr_base, 1024*1024, _PAGE_IO, 0); //CS1: CPLD settlbcam(14, SYNO_CPLD_BASE, SYNO_CPLD_BASE, SYNO_CPLD_SIZE, _PAGE_IO, 0); } else { printk("HW Settings Error: Failed to get immr_base\n"); } }
unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx) { int i; unsigned long virt = PAGE_OFFSET; phys_addr_t phys = memstart_addr; unsigned long amount_mapped = 0; /* Calculate CAM values */ for (i = 0; ram && i < max_cam_idx; i++) { unsigned long cam_sz; cam_sz = calc_cam_sz(ram, virt, phys); settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0); ram -= cam_sz; amount_mapped += cam_sz; virt += cam_sz; phys += cam_sz; } tlbcam_index = i; return amount_mapped; }
/* ************************************************************************ */ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { /* parse_bootinfo must always be called first */ parse_bootinfo(find_bootinfo()); /* * If we were passed in a board information, copy it into the * residual data area. */ if (r3) { memcpy((void *) __res, (void *) (r3 + KERNELBASE), sizeof (bd_t)); } #ifdef CONFIG_SERIAL_TEXT_DEBUG /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ settlbcam(num_tlbcam_entries - 1, UARTA_ADDR, UARTA_ADDR, 0x1000, _PAGE_IO, 0); #endif #if defined(CONFIG_BLK_DEV_INITRD) /* * If the init RAM disk has been configured in, and there's a valid * starting address for it, set it up. */ if (r4) { initrd_start = r4 + KERNELBASE; initrd_end = r5 + KERNELBASE; } #endif /* CONFIG_BLK_DEV_INITRD */ /* Copy the kernel command line arguments to a safe place. */ if (r6) { *(char *) (r7 + KERNELBASE) = 0; strcpy(cmd_line, (char *) (r6 + KERNELBASE)); } identify_ppc_sys_by_id(mfspr(SPRN_SVR)); /* setup the PowerPC module struct */ ppc_md.setup_arch = sbc8560_setup_arch; ppc_md.show_cpuinfo = sbc8560_show_cpuinfo; ppc_md.init_IRQ = sbc8560_init_IRQ; ppc_md.get_irq = openpic_get_irq; ppc_md.restart = mpc85xx_restart; ppc_md.power_off = mpc85xx_power_off; ppc_md.halt = mpc85xx_halt; ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory; ppc_md.time_init = NULL; ppc_md.set_rtc_time = NULL; ppc_md.get_rtc_time = NULL; ppc_md.calibrate_decr = mpc85xx_calibrate_decr; #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) ppc_md.progress = gen550_progress; #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB) ppc_md.early_serial_map = sbc8560_early_serial_map; #endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */ if (ppc_md.progress) ppc_md.progress("sbc8560_init(): exit", 0); }
/* ************************************************************************ */ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { /* parse_bootinfo must always be called first */ parse_bootinfo(find_bootinfo()); /* * If we were passed in a board information, copy it into the * residual data area. */ if (r3) { memcpy((void *) __res, (void *) (r3 + KERNELBASE), sizeof (bd_t)); } #if defined(CONFIG_SERIAL_TEXT_DEBUG) && !defined(CONFIG_MPC8560) { bd_t *binfo = (bd_t *) __res; struct uart_port p; /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base, binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0); memset(&p, 0, sizeof (p)); p.iotype = UPIO_MEM; p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET; p.uartclk = binfo->bi_busfreq; gen550_init(0, &p); memset(&p, 0, sizeof (p)); p.iotype = UPIO_MEM; p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET; p.uartclk = binfo->bi_busfreq; gen550_init(1, &p); } #endif #if defined(CONFIG_BLK_DEV_INITRD) /* * If the init RAM disk has been configured in, and there's a valid * starting address for it, set it up. */ if (r4) { initrd_start = r4 + KERNELBASE; initrd_end = r5 + KERNELBASE; } #endif /* CONFIG_BLK_DEV_INITRD */ /* Copy the kernel command line arguments to a safe place. */ if (r6) { *(char *) (r7 + KERNELBASE) = 0; strcpy(cmd_line, (char *) (r6 + KERNELBASE)); } identify_ppc_sys_by_id(mfspr(SPRN_SVR)); /* setup the PowerPC module struct */ ppc_md.setup_arch = tqm85xx_setup_arch; ppc_md.show_cpuinfo = tqm85xx_show_cpuinfo; ppc_md.init_IRQ = tqm85xx_init_IRQ; ppc_md.get_irq = openpic_get_irq; ppc_md.restart = mpc85xx_restart; ppc_md.power_off = mpc85xx_power_off; ppc_md.halt = mpc85xx_halt; ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory; ppc_md.time_init = NULL; ppc_md.set_rtc_time = NULL; ppc_md.get_rtc_time = NULL; ppc_md.calibrate_decr = mpc85xx_calibrate_decr; #ifndef CONFIG_MPC8560 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) ppc_md.progress = gen550_progress; #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB) ppc_md.early_serial_map = mpc85xx_early_serial_map; #endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */ #endif /* CONFIG_MPC8560 */ if (ppc_md.progress) ppc_md.progress("tqm85xx_init(): exit", 0); return; }
/* ************************************************************************ */ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { /* parse_bootinfo must always be called first */ parse_bootinfo(find_bootinfo()); /* * If we were passed in a board information, copy it into the * residual data area. */ if (r3) { memcpy((void *) __res, (void *) (r3 + KERNELBASE), sizeof (bd_t)); } #ifdef CONFIG_SERIAL_TEXT_DEBUG { bd_t *binfo = (bd_t *) __res; /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base, binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0); } #endif #if defined(CONFIG_BLK_DEV_INITRD) /* * If the init RAM disk has been configured in, and there's a valid * starting address for it, set it up. */ if (r4) { initrd_start = r4 + KERNELBASE; initrd_end = r5 + KERNELBASE; } #endif /* CONFIG_BLK_DEV_INITRD */ /* Copy the kernel command line arguments to a safe place. */ if (r6) { *(char *) (r7 + KERNELBASE) = 0; strcpy(cmd_line, (char *) (r6 + KERNELBASE)); } /* setup the PowerPC module struct */ ppc_md.setup_arch = mpc8540ads_setup_arch; ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo; ppc_md.init_IRQ = mpc85xx_ads_init_IRQ; ppc_md.get_irq = openpic_get_irq; ppc_md.restart = mpc85xx_restart; ppc_md.power_off = mpc85xx_power_off; ppc_md.halt = mpc85xx_halt; ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory; ppc_md.time_init = NULL; ppc_md.set_rtc_time = NULL; ppc_md.get_rtc_time = NULL; ppc_md.calibrate_decr = mpc85xx_calibrate_decr; #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) ppc_md.progress = gen550_progress; #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ if (ppc_md.progress) ppc_md.progress("mpc8540ads_init(): exit", 0); return; }