static int enable_msp(struct ux500_msp *msp, struct ux500_msp_config *config) { int status = 0, retval = 0; u32 reg_val_DMACR, reg_val_GCR; unsigned long flags; /* Check msp state whether in RUN or CONFIGURED Mode */ if (msp->msp_state == MSP_STATE_IDLE) { spin_lock_irqsave(&msp_rxtx_lock, flags); if (msp->pinctrl_rxtx_ref == 0 && !(IS_ERR(msp->pinctrl_p) || IS_ERR(msp->pinctrl_def))) { retval = pinctrl_select_state(msp->pinctrl_p, msp->pinctrl_def); if (retval) pr_err("could not set MSP defstate\n"); } if (!retval) msp->pinctrl_rxtx_ref++; spin_unlock_irqrestore(&msp_rxtx_lock, flags); } /* Configure msp with protocol dependent settings */ configure_protocol(msp, config); setup_bitclk(msp, config); if (config->multichannel_configured == 1) { status = configure_multichannel(msp, config); if (status) dev_warn(msp->dev, "%s: WARN: configure_multichannel failed (%d)!\n", __func__, status); } /* Make sure the correct DMA-directions are configured */ if ((config->direction & MSP_DIR_RX) && (!msp->dma_cfg_rx)) { dev_err(msp->dev, "%s: ERROR: MSP RX-mode is not configured!", __func__); return -EINVAL; } if ((config->direction == MSP_DIR_TX) && (!msp->dma_cfg_tx)) { dev_err(msp->dev, "%s: ERROR: MSP TX-mode is not configured!", __func__); return -EINVAL; } reg_val_DMACR = readl(msp->registers + MSP_DMACR); if (config->direction & MSP_DIR_RX) reg_val_DMACR |= RX_DMA_ENABLE; if (config->direction & MSP_DIR_TX) reg_val_DMACR |= TX_DMA_ENABLE; writel(reg_val_DMACR, msp->registers + MSP_DMACR); writel(config->iodelay, msp->registers + MSP_IODLY); /* Enable frame generation logic */ reg_val_GCR = readl(msp->registers + MSP_GCR); writel(reg_val_GCR | FRAME_GEN_ENABLE, msp->registers + MSP_GCR); return status; }
static int enable_msp(struct ux500_msp *msp, struct ux500_msp_config *config) { int status = 0; u32 reg_val_DMACR, reg_val_GCR; /* Check msp state whether in RUN or CONFIGURED Mode */ if ((msp->msp_state == MSP_STATE_IDLE) && (msp->plat_init)) { status = msp->plat_init(); if (status) { dev_err(msp->dev, "%s: ERROR: Failed to init MSP (%d)!\n", __func__, status); return status; } } /* Configure msp with protocol dependent settings */ configure_protocol(msp, config); setup_bitclk(msp, config); if (config->multichannel_configured == 1) { status = configure_multichannel(msp, config); if (status) dev_warn(msp->dev, "%s: WARN: configure_multichannel failed (%d)!\n", __func__, status); } /* Make sure the correct DMA-directions are configured */ if ((config->direction & MSP_DIR_RX) && (!msp->dma_cfg_rx)) { dev_err(msp->dev, "%s: ERROR: MSP RX-mode is not configured!", __func__); return -EINVAL; } if ((config->direction == MSP_DIR_TX) && (!msp->dma_cfg_tx)) { dev_err(msp->dev, "%s: ERROR: MSP TX-mode is not configured!", __func__); return -EINVAL; } reg_val_DMACR = readl(msp->registers + MSP_DMACR); if (config->direction & MSP_DIR_RX) reg_val_DMACR |= RX_DMA_ENABLE; if (config->direction & MSP_DIR_TX) reg_val_DMACR |= TX_DMA_ENABLE; writel(reg_val_DMACR, msp->registers + MSP_DMACR); writel(config->iodelay, msp->registers + MSP_IODLY); /* Enable frame generation logic */ reg_val_GCR = readl(msp->registers + MSP_GCR); writel(reg_val_GCR | FRAME_GEN_ENABLE, msp->registers + MSP_GCR); return status; }
static int enable_msp(struct ux500_msp *msp, struct ux500_msp_config *config) { int status = 0; u32 reg_val_DMACR, reg_val_GCR; /* Configure msp with protocol dependent settings */ configure_protocol(msp, config); setup_bitclk(msp, config); if (config->multichannel_configured == 1) { status = configure_multichannel(msp, config); if (status) dev_warn(msp->dev, "%s: WARN: configure_multichannel failed (%d)!\n", __func__, status); } /* Make sure the correct DMA-directions are configured */ if ((config->direction & MSP_DIR_RX) && !msp->capture_dma_data.dma_cfg) { dev_err(msp->dev, "%s: ERROR: MSP RX-mode is not configured!", __func__); return -EINVAL; } if ((config->direction == MSP_DIR_TX) && !msp->playback_dma_data.dma_cfg) { dev_err(msp->dev, "%s: ERROR: MSP TX-mode is not configured!", __func__); return -EINVAL; } reg_val_DMACR = readl(msp->registers + MSP_DMACR); if (config->direction & MSP_DIR_RX) reg_val_DMACR |= RX_DMA_ENABLE; if (config->direction & MSP_DIR_TX) reg_val_DMACR |= TX_DMA_ENABLE; writel(reg_val_DMACR, msp->registers + MSP_DMACR); writel(config->iodelay, msp->registers + MSP_IODLY); /* Enable frame generation logic */ reg_val_GCR = readl(msp->registers + MSP_GCR); writel(reg_val_GCR | FRAME_GEN_ENABLE, msp->registers + MSP_GCR); return status; }