static void mcp55_early_clear_port(unsigned mcp55_num, unsigned *busn, unsigned *devn, unsigned *io_base) { static const unsigned int ctrl_devport_conf_clear[] = { PCI_ADDR(0, 1, 1, ANACTRL_REG_POS), ~(0x0000ff00), 0, PCI_ADDR(0, 1, 1, SYSCTRL_REG_POS), ~(0x0000ff00), 0, PCI_ADDR(0, 1, 1, ACPICTRL_REG_POS), ~(0x0000ff00), 0, }; int j; for (j = 0; j < mcp55_num; j++ ) { setup_resource_map_offset(ctrl_devport_conf_clear, ARRAY_SIZE(ctrl_devport_conf_clear), PCI_DEV(busn[j], devn[j], 0) , io_base[j]); } }
static void ck804_early_clear_port(unsigned ck804_num, unsigned *busn, unsigned *io_base) { static const unsigned int ctrl_devport_conf_clear[] = { PCI_ADDR(0, 0x1, 0, ANACTRL_REG_POS), ~(0x0000ff01), 0, PCI_ADDR(0, 0x1, 0, SYSCTRL_REG_POS), ~(0x0000ff01), 0, }; int j; for (j = 0; j < ck804_num; j++) { u32 dev; if (busn[j] == 0) /* SB chain */ dev = PCI_DEV(busn[j], CK804_DEVN_BASE, 0); else dev = PCI_DEV(busn[j], CK804B_DEVN_BASE, 0); setup_resource_map_offset(ctrl_devport_conf_clear, ARRAY_SIZE(ctrl_devport_conf_clear), dev, io_base[j]); } }