C++ (Cpp) sffsdr_fpga_set_codec_fsの例

コード例 #1

ファイル: davinci-sffsdr.c プロジェクト: rrowicki/Chrono_Kernel-1

static int sffsdr_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
	int fs;
	int ret = 0;

	/* Fsref can be 32000, 44100 or 48000. */
	fs = params_rate(params);

#ifndef CONFIG_SFFSDR_FPGA
	/* Without the FPGA module, the Fs is fixed at 44100 Hz */
	if (fs != 44100) {
		pr_debug("warning: only 44.1 kHz is supported without SFFSDR FPGA module\n");
		return -EINVAL;
	}
#endif

	/* set cpu DAI configuration */
	ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT);
	if (ret < 0)
		return ret;

	pr_debug("sffsdr_hw_params: rate = %d Hz\n", fs);

#ifndef CONFIG_SFFSDR_FPGA
	return 0;
#else
	return sffsdr_fpga_set_codec_fs(fs);
#endif
}

コード例 #2

static int sffsdr_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
	int fs;
	int ret = 0;

	
	fs = params_rate(params);

#ifndef CONFIG_SFFSDR_FPGA
	
	if (fs != 44100) {
		pr_debug("warning: only 44.1 kHz is supported without SFFSDR FPGA module\n");
		return -EINVAL;
	}
#endif

	
	ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT);
	if (ret < 0)
		return ret;

	pr_debug("sffsdr_hw_params: rate = %d Hz\n", fs);

#ifndef CONFIG_SFFSDR_FPGA
	return 0;
#else
	return sffsdr_fpga_set_codec_fs(fs);
#endif
}

コード例 #3

ファイル: davinci-sffsdr.c プロジェクト: Oxel40/ev3sources

static int sffsdr_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
	int fs;
	int ret = 0;

	/* Fsref can be 32000, 44100 or 48000. */
	fs = params_rate(params);

#ifndef CONFIG_SFFSDR_FPGA
	/* Without the FPGA module, the Fs is fixed at 44100 Hz */
	if (fs != 44100) {
		pr_debug("warning: only 44.1 kHz is supported without SFFSDR FPGA module\n");
		return -EINVAL;
	}
#endif

	/* Set cpu DAI configuration:
	 * CLKX and CLKR are the inputs for the Sample Rate Generator.
	 * FSX and FSR are outputs, driven by the sample Rate Generator. */
	ret = snd_soc_dai_set_fmt(cpu_dai,
				  SND_SOC_DAIFMT_RIGHT_J |
				  SND_SOC_DAIFMT_CBM_CFS |
				  SND_SOC_DAIFMT_IB_NF);
	if (ret < 0)
		return ret;

	pr_debug("sffsdr_hw_params: rate = %d Hz\n", fs);

#ifndef CONFIG_SFFSDR_FPGA
	return 0;
#else
	return sffsdr_fpga_set_codec_fs(fs);
#endif
}