static void sirfsoc_local_timer_stop(struct clock_event_device *ce) { int cpu = smp_processor_id(); sirfsoc_timer_count_disable(1); if (cpu == 0) remove_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq); else remove_irq(sirfsoc_timer1_irq.irq, &sirfsoc_timer1_irq); }
static void sirfsoc_timer_set_mode(enum clock_event_mode mode, struct clock_event_device *ce) { switch (mode) { case CLOCK_EVT_MODE_ONESHOT: /* enable in set_next_event */ break; default: break; } sirfsoc_timer_count_disable(smp_processor_id()); }
/* timer interrupt handler */ static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *ce = dev_id; int cpu = smp_processor_id(); /* clear timer interrupt */ writel_relaxed(BIT(cpu), sirfsoc_timer_base + SIRFSOC_TIMER_INTR_STATUS); if (clockevent_state_oneshot(ce)) sirfsoc_timer_count_disable(cpu); ce->event_handler(ce); return IRQ_HANDLED; }
static int sirfsoc_timer_set_next_event(unsigned long delta, struct clock_event_device *ce) { int cpu = smp_processor_id(); /* disable timer first, then modify the related registers */ sirfsoc_timer_count_disable(cpu); writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_0 + 4 * cpu); writel_relaxed(delta, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0 + 4 * cpu); /* enable the tick */ sirfsoc_timer_count_enable(cpu); return 0; }
/* Oneshot is enabled in set_next_event */ static int sirfsoc_timer_shutdown(struct clock_event_device *evt) { sirfsoc_timer_count_disable(smp_processor_id()); return 0; }
static void sirfsoc_local_timer_stop(struct clock_event_device *ce) { sirfsoc_timer_count_disable(1); remove_irq(sirfsoc_timer1_irq.irq, &sirfsoc_timer1_irq); }