/**
* \brief Test different parameters of the Sleep Manager module
*
* This function locks & unlocks the different sleep modes, and verifies that
* the correct values are being set.
*
* \param test Current test case.
*/
static void run_set_functions_test(const struct test_case *test)
{
volatile enum sleepmgr_mode sleep_mode;
/* Initialize the lock counts */
sleepmgr_init();
/* Lock Power Down mode */
sleepmgr_lock_mode(SLEEPMGR_PDOWN);
/* get the deepest allowable sleep mode */
sleep_mode = sleepmgr_get_sleep_mode();
test_assert_true(test, sleep_mode == SLEEPMGR_PDOWN,
"Trying to lock Power Down mode failed.");
/* Lock Power Save mode */
sleepmgr_lock_mode(SLEEPMGR_PSAVE);
/* get the deepest allowable sleep mode */
sleep_mode = sleepmgr_get_sleep_mode();
test_assert_true(test, sleep_mode == SLEEPMGR_PSAVE,
"Trying to lock Power Save mode failed.");
/* Lock Idle Sleep mode */
sleepmgr_lock_mode(SLEEPMGR_IDLE);
/* get the deepest allowable sleep mode */
sleep_mode = sleepmgr_get_sleep_mode();
test_assert_true(test, sleep_mode == SLEEPMGR_IDLE,
"Trying to lock Idle Sleep mode failed.");
/* Unlock Idle Sleep mode */
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
/* get the deepest allowable sleep mode */
sleep_mode = sleepmgr_get_sleep_mode();
test_assert_true(test, sleep_mode == SLEEPMGR_PSAVE,
"Trying to unlock Idle Sleep mode failed.");
/* Unlock Power Save mode */
sleepmgr_unlock_mode(SLEEPMGR_PSAVE);
/* get the deepest allowable sleep mode */
sleep_mode = sleepmgr_get_sleep_mode();
test_assert_true(test, sleep_mode == SLEEPMGR_PDOWN,
"Trying to unlock Power Save Sleep mode failed.");
/* Unlock Power Down mode */
sleepmgr_unlock_mode(SLEEPMGR_PDOWN);
/* get the deepest allowable sleep mode */
sleep_mode = sleepmgr_get_sleep_mode();
test_assert_true(test, sleep_mode == (SLEEPMGR_NR_OF_MODES - 1),
"Trying to unlock Power Down mode failed.");
}
void udd_disable(void)
{
irqflags_t flags;
#ifdef UHD_ENABLE
# ifdef USB_ID
if (Is_otg_id_host()) {
return; // Host mode running, ignore UDD disable
}
# else
if (Is_otg_host_mode_forced()) {
return; // Host mode running, ignore UDD disable
}
# endif
#endif
flags = cpu_irq_save();
otg_unfreeze_clock();
udd_detach();
#ifndef UDD_NO_SLEEP_MGR
sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_SUSPEND);
#endif
#ifndef UHD_ENABLE
otg_disable();
otg_disable_pad();
sysclk_disable_usb();
// Else the USB clock disable is done by UHC which manage USB dual role
#endif
cpu_irq_restore(flags);
}
/**
* \brief Disable TWIS Module.
*
* \param dev_inst Device structure pointer
*/
void twis_disable(struct twis_dev_inst *const dev_inst)
{
Assert(dev_inst->hw_dev);
dev_inst->hw_dev->TWIS_CR &= ~TWIS_CR_SEN;
sleepmgr_unlock_mode(SLEEPMGR_SLEEP_1);
}
/**
* \brief Manages the sleep mode following the UHP state
*
* \param new_state New UHP state
*/
static void uhd_sleep_mode(enum uhd_uhp_state_enum new_state)
{
enum sleepmgr_mode sleep_mode[] = {
SLEEPMGR_ACTIVE, // UHD_STATE_OFF (not used)
SLEEPMGR_ACTIVE, // UHD_STATE_WAIT_ID_HOST
SLEEPMGR_ACTIVE, // UHD_STATE_NO_VBUS
SLEEPMGR_ACTIVE, // UHD_STATE_DISCONNECT
SLEEPMGR_ACTIVE, // UHD_STATE_SUSPEND
SLEEPMGR_ACTIVE, // UHD_STATE_IDLE
};
static enum uhd_uhp_state_enum uhd_state = UHD_STATE_OFF;
if (uhd_state == new_state) {
return; // No change
}
if (new_state != UHD_STATE_OFF) {
/* Lock new limit. */
sleepmgr_lock_mode(sleep_mode[new_state]);
}
if (uhd_state != UHD_STATE_OFF) {
/* Unlock old limit. */
sleepmgr_unlock_mode(sleep_mode[uhd_state]);
}
uhd_state = new_state;
}
/**
* \brief Disable TC
*
* Disables the TC.
*
* \param tc Pointer to TC module
*
* \note
* mask TC clock (sysclk).
*/
void tc_disable(volatile void *tc)
{
irqflags_t iflags = cpu_irq_save();
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
#ifdef TCC0
if ((uintptr_t) tc == (uintptr_t) & TCC0) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC0);
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES);
} else
#endif
#ifdef TCC1
if ((uintptr_t) tc == (uintptr_t) & TCC1) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC1);
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES);
} else
#endif
#ifdef TCD0
if ((uintptr_t) tc == (uintptr_t) & TCD0) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC0);
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_HIRES);
} else
#endif
#ifdef TCD1
if ((uintptr_t) tc == (uintptr_t) & TCD1) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC1);
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_HIRES);
} else
#endif
#ifdef TCE0
if ((uintptr_t) tc == (uintptr_t) & TCE0) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC0);
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_HIRES);
} else
#endif
#ifdef TCE1
if ((uintptr_t) tc == (uintptr_t) & TCE1) {
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_TC1);
sysclk_disable_module(SYSCLK_PORT_E, SYSCLK_HIRES);
} else
#endif
#ifdef TCF0
if ((uintptr_t) tc == (uintptr_t) & TCF0) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC0);
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_HIRES);
} else
#endif
#ifdef TCF1
if ((uintptr_t) tc == (uintptr_t) & TCF1) {
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_TC1);
sysclk_disable_module(SYSCLK_PORT_F, SYSCLK_HIRES);
} else
#endif
{
cpu_irq_restore(iflags);
return;
}
cpu_irq_restore(iflags);
}
/**
* \brief Disable an analog comparator channel
*
* \param ac Pointer to the analog comparator (AC) base address
* \param channel Number of analog comparator (AC) channel to disable
*/
void ac_disable(AC_t *ac, uint8_t channel)
{
irqflags_t iflags = cpu_irq_save();
if (channel == 0) {
ac->AC0CTRL &= ~AC_ENABLE_bm;
} else {
ac->AC1CTRL &= ~AC_ENABLE_bm;
}
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
#ifdef ACA
if ((uintptr_t)ac == (uintptr_t)&ACA) {
ac_aca_opened--;
if (!ac_aca_opened) {
sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_AC);
}
} else
#endif
#ifdef ACB
if ((uintptr_t)ac == (uintptr_t)&ACB) {
ac_acb_opened--;
if (!ac_acb_opened) {
sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_AC);
}
} else
#endif
{
cpu_irq_restore(iflags);
return;
}
cpu_irq_restore(iflags);
}
/**
* \brief Disable TC45
*
* Disables the TC45.
*
* \param tc Pointer to TC45 module
*
* \note
* mask TC45 clock (sysclk).
*/
void tc45_disable(volatile void *tc)
{
irqflags_t iflags = cpu_irq_save();
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
#ifdef TCC4
if ((uintptr_t)tc == (uintptr_t)&TCC4) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC4);
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES);
} else
#endif
#ifdef TCC5
if ((uintptr_t)tc == (uintptr_t)&TCC5) {
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_TC5);
sysclk_disable_module(SYSCLK_PORT_C, SYSCLK_HIRES);
} else
#endif
#ifdef TCD5
if ((uintptr_t)tc == (uintptr_t)&TCD5) {
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_TC4);
sysclk_disable_module(SYSCLK_PORT_D, SYSCLK_HIRES);
} else
#endif
{
cpu_irq_restore(iflags);
return;
}
cpu_irq_restore(iflags);
}
/**
* \brief Test interrupt is getting triggered in various Sleep mode.
*
* This function put the device in Idle and Power Save sleep mode and check
* whether the ADC conversion complete interrupt is executed only in Idle sleep
* mode.
* The device will wakeup from power save mode when Timer/Counter2 overflow
* occur.
*
* \param test Current test case.
*/
static void run_sleep_trigger_test(const struct test_case *test)
{
/* Disable Global interrupt */
cpu_irq_disable();
/* Initialize the lock counts */
sleepmgr_init();
/* Initialize the ADC */
adc_initialisation();
/* Initialize the Timer/Counter2 */
timer2_initialisation();
/* Lock Idle Sleep mode */
sleepmgr_lock_mode(SLEEPMGR_IDLE);
/* Clear Timer/Counter2 Register */
TCNT2 = 0;
/* Wait for TCNT2 register to get updated */
while (ASSR & (1 << TCN2UB)) {
}
/* Start ADC Conversion */
adc_start_conversion();
/* Enable Global interrupt */
cpu_irq_enable();
/* Go to sleep in the deepest allowed mode */
sleepmgr_enter_sleep();
/* Unlock Idle Sleep mode */
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
/* Lock Power Save mode */
sleepmgr_lock_mode(SLEEPMGR_PSAVE);
/* Clear Timer/Counter2 Register */
TCNT2 = 0;
/* Wait for TCNT2 register to get updated */
while (ASSR & (1 << TCN2UB)) {
}
/* Start ADC Conversion */
adc_start_conversion();
/* Go to sleep in the deepest allowed mode */
sleepmgr_enter_sleep();
/* Disable ADC */
adc_disable();
/* Unlock Power Save mode */
sleepmgr_unlock_mode(SLEEPMGR_PSAVE);
/* Disable Global interrupt */
cpu_irq_disable();
test_assert_true(test, trigger_count == 2,
"ADC interrupt trigger failed.");
}
/**
* \brief Disable ADC
*
* Disables the ADC and unlocks IDLE mode for the sleep manager.
*
* \param adc Pointer to ADC module
*/
void adc_disable(ADC_t *adc)
{
irqflags_t flags = cpu_irq_save();
adc->CTRLA &= ~ADC_ENABLE_bm;
adc_disable_clock(adc);
cpu_irq_restore(flags);
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
}
/**
* \brief Disable DAC
*
* Disables the DAC, stopping all conversions.
*
* \param dac Pointer to DAC module.
*/
void dac_disable(DAC_t *dac)
{
irqflags_t flags;
flags = cpu_irq_save();
dac->CTRLA &= ~DAC_ENABLE_bm;
dac_disable_clock(dac);
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
cpu_irq_restore(flags);
}
/*! \brief Authorize or not the CPU powerdown mode
*
* \param b_enable true to authorize powerdown mode
*/
static void udd_sleep_mode(bool b_idle)
{
if (!b_idle && udd_b_idle) {
sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_IDLE);
}
if (b_idle && !udd_b_idle) {
sleepmgr_lock_mode(USBB_SLEEP_MODE_USB_IDLE);
}
udd_b_idle = b_idle;
}
/**
* Lock sleep mode for VBus PIO pin change detection
*/
static void udd_vbus_monitor_sleep_mode(bool b_lock)
{
if (b_lock && !b_vbus_sleep_lock) {
b_vbus_sleep_lock = true;
sleepmgr_lock_mode(SLEEPMGR_SLEEP_WFI);
}
if (!b_lock && b_vbus_sleep_lock) {
b_vbus_sleep_lock = false;
sleepmgr_unlock_mode(SLEEPMGR_SLEEP_WFI);
}
}
/*! \brief Authorize or not the CPU power down mode
*
* \param b_idle true to authorize idle mode
*/
static void udd_sleep_mode(bool b_idle)
{
if (!b_idle && udd_b_idle) {
dbg_print("_W ");
sleepmgr_unlock_mode(UHDP_SLEEP_MODE_USB_IDLE);
}
if (b_idle && !udd_b_idle) {
dbg_print("_S ");
sleepmgr_lock_mode(UHDP_SLEEP_MODE_USB_IDLE);
}
udd_b_idle = b_idle;
}
/**
* \brief Disable EDMA controller
*
* \note This function disables the EDMA controller, clearing all previous
* configurations.
*/
void edma_disable(void)
{
/* Disable */
EDMA.CTRL = 0x00;
/* Wait for effective operation */
while (EDMA.CTRL & EDMA_ENABLE_bm) {
}
/* Reset all fields */
EDMA.CTRL = 0x00;
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_EDMA);
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
}
void udd_disable(void)
{
irqflags_t flags;
flags = cpu_irq_save();
// Disable USB pad
otg_disable();
otg_disable_pad();
sysclk_disable_usb();
udd_sleep_mode(false);
#ifndef UDD_NO_SLEEP_MGR
sleepmgr_unlock_mode(USBB_SLEEP_MODE_USB_SUSPEND);
#endif
cpu_irq_restore(flags);
}
/**
* \brief Disable FREQM.
*
* \param dev_inst Device structure pointer.
*
* \return Status code
*/
enum status_code freqm_disable(struct freqm_dev_inst *const dev_inst)
{
uint32_t timeout = FREQM_NUM_OF_ATTEMPTS;
/* Wait until the measurement is done */
while (freqm_get_status(dev_inst) & FREQM_STATUS_BUSY) {
if (!timeout--) {
return ERR_TIMEOUT;
}
}
sysclk_disable_peripheral_clock(dev_inst->hw_dev);
sleepmgr_unlock_mode(SLEEPMGR_SLEEP_1);
return STATUS_OK;
}
void udd_disable(void)
{
irqflags_t flags;
flags = cpu_irq_save();
udd_detach_device();
// Disable interface
USB_CTRLA = 0;
USB_CTRLB = 0;
sysclk_disable_usb();
udd_sleep_mode(false);
#ifndef UDD_NO_SLEEP_MGR
sleepmgr_unlock_mode(USBC_SLEEP_MODE_USB_SUSPEND);
#endif
cpu_irq_restore(flags);
}
/** \brief Main function.
*/
int main(void)
{
/* Set the sleep mode to initially lock. */
volatile enum sleepmgr_mode mode = SLEEPMGR_ACTIVE;
/* Initialize the pins for input and output. */
board_init();
/* Initialize the clock and disable clock unused modules */
sysclk_init();
/* Initialize the IOPORT */
ioport_init();
delay_init(sysclk_get_cpu_hz());
/* Set the pin sense mode */
ioport_set_pin_sense_mode(BUTTON_PIN, IOPORT_SENSE_LEVEL);
/* Enable external interrupt */
external_interrupt_enable(BUTTON_NUMBER);
/* Turn off the LED */
LED_On(LED_PIN);
/* Initialize the sleep manager, lock initial mode. */
sleepmgr_init();
sleepmgr_lock_mode(mode);
Enable_global_interrupt();
do {
/* Delay for 3 seconds to show the device is awake. */
delay_ms(3000);
/* Turn off the LED and go to sleep. */
LED_Off(LED_PIN);
sleepmgr_enter_sleep();
/* Turn on the LED on wake up */
LED_On(LED_PIN);
/* Unlock current mode, then lock the next one. */
sleepmgr_unlock_mode(mode);
if (++mode < SLEEPMGR_NR_OF_MODES) {
sleepmgr_lock_mode(mode);
} else {
mode = SLEEPMGR_ACTIVE;
sleepmgr_lock_mode(mode);
}
} while (1);
}
/**
* \brief RTC compare ISR
*
* This function updates the sleep mode locks so that the device cycles through
* the different sleep modes.
*/
static void lowpower_interrupt(void)
{
static uint8_t state = 0;
switch (state) {
/* The device starts out in active mode. Go to Idle. */
default:
case 0:
sleepmgr_unlock_mode(SLEEPMGR_ACTIVE);
sleepmgr_lock_mode(SLEEPMGR_IDLE);
++state;
break;
/* Go to extended Standby */
case 1:
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
sleepmgr_lock_mode(SLEEPMGR_ESTDBY);
++state;
break;
/* Go to power save */
case 2:
sleepmgr_unlock_mode(SLEEPMGR_ESTDBY);
sleepmgr_lock_mode(SLEEPMGR_PSAVE);
++state;
break;
/* Go to standby */
case 3:
sleepmgr_unlock_mode(SLEEPMGR_PSAVE);
sleepmgr_lock_mode(SLEEPMGR_STDBY);
++state;
break;
/* Go to power down */
case 4:
sleepmgr_unlock_mode(SLEEPMGR_STDBY);
sleepmgr_lock_mode(SLEEPMGR_PDOWN);
++state;
break;
/* Go back to idle */
case 5:
sleepmgr_unlock_mode(SLEEPMGR_PDOWN);
sleepmgr_lock_mode(SLEEPMGR_IDLE);
state = 1;
break;
}
}
void udd_disable(void)
{
irqflags_t flags;
flags = cpu_irq_save();
udd_detach();
udd_disable_periph_ck();
sysclk_disable_usb();
#ifndef UDD_NO_SLEEP_MGR
sleepmgr_unlock_mode(UDP_SLEEP_MODE_USB_SUSPEND);
#endif
# if UDD_VBUS_IO
udd_vbus_monitor_sleep_mode(false);
# endif
cpu_irq_restore(flags);
}
void udd_disable(void)
{
irqflags_t flags;
#ifdef UHD_ENABLE
# if OTG_ID_IO
if (Is_otg_id_host()) {
// Freeze clock to switch mode
otg_freeze_clock();
udd_detach();
otg_disable();
return; // Host mode running, ignore UDD disable
}
# else
if (Is_otg_host_mode_forced()) {
return; // Host mode running, ignore UDD disable
}
# endif
#endif
flags = cpu_irq_save();
otg_unfreeze_clock();
udd_detach();
#ifndef UDD_NO_SLEEP_MGR
if (udd_b_sleep_initialized) {
udd_b_sleep_initialized = false;
sleepmgr_unlock_mode(UHDP_SLEEP_MODE_USB_SUSPEND);
}
#endif
#ifndef UHD_ENABLE
otg_disable();
sysclk_disable_usb();
pmc_disable_periph_clk(ID_UOTGHS);
#endif
cpu_irq_restore(flags);
}
/** \brief Manages the sleep mode following the USB state
*
* \param new_state New USB state
*/
static void udd_sleep_mode(enum udd_usb_state_enum new_state)
{
enum sleepmgr_mode sleep_mode[] = {
SLEEPMGR_ACTIVE, /* UDD_STATE_OFF (not used) */
SLEEPMGR_IDLE_2, /* UDD_STATE_SUSPEND */
SLEEPMGR_IDLE_1, /* UDD_STATE_SUSPEND_LPM */
SLEEPMGR_IDLE_0, /* UDD_STATE_IDLE */
};
static enum udd_usb_state_enum udd_state = UDD_STATE_OFF;
if (udd_state == new_state) {
return; // No change
}
if (new_state != UDD_STATE_OFF) {
/* Lock new limit */
sleepmgr_lock_mode(sleep_mode[new_state]);
}
if (udd_state != UDD_STATE_OFF) {
/* Unlock old limit */
sleepmgr_unlock_mode(sleep_mode[udd_state]);
}
udd_state = new_state;
}
/**
* \brief Disable the PDCA module
*
* \param pdca Base address of the PDCA module
*/
void pdca_disable(Pdca *pdca)
{
sysclk_disable_peripheral_clock(pdca);
sleepmgr_unlock_mode(SLEEPMGR_BACKUP);
}
void picouart_disable(struct picouart_dev_inst *const dev_inst)
{
dev_inst->dev_ptr->PICOUART_CR = PICOUART_CR_DIS;
sysclk_disable_peripheral_clock(PICOUART);
sleepmgr_unlock_mode(SLEEPMGR_BACKUP);
}
/**
* \brief Disable DMA controller
*/
void dma_disable(void)
{
DMA.CTRL = 0;
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_DMA);
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
}
int main(void)
{
enum sleepmgr_mode current_sleep_mode = SLEEPMGR_ACTIVE;
/*
* Initialize the synchronous clock system to the default configuration
* set in conf_clock.h.
* \note All non-essential peripheral clocks are initially disabled.
*/
sysclk_init();
/*
* Initialize the resources used by this example to the default
* configuration set in conf_board.h
*/
board_init();
/*
* Turn the activity status LED on to inform the user that the device
* is active.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON);
rtt_init(RTT, 32768);
/* Enable RTT interrupt */
NVIC_DisableIRQ(RTT_IRQn);
NVIC_ClearPendingIRQ(RTT_IRQn);
NVIC_SetPriority(RTT_IRQn, 0);
NVIC_EnableIRQ(RTT_IRQn);
rtt_enable_interrupt(RTT, RTT_MR_ALMIEN);
/* Set wakeup source to rtt_alarm */
pmc_set_fast_startup_input(PMC_FSMR_RTTAL);
#if (!SAMG)
supc_set_wakeup_mode(SUPC, SUPC_WUMR_RTTEN_ENABLE);
#endif
/* Initialize the sleep manager, lock initial mode. */
sleepmgr_init();
sleepmgr_lock_mode(current_sleep_mode);
while (1) {
rtt_write_alarm_time(RTT, rtt_read_timer_value(RTT) + SLEEP_TIME);
/*
* Turn the activity status LED off to inform the user that the
* device is in a sleep mode.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_OFF);
/*
* Go to sleep in the deepest allowed sleep mode (i.e. no
* deeper than the currently locked sleep mode).
*/
sleepmgr_enter_sleep();
/*
* Turn the activity status LED on to inform the user that the
* device is active.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON);
/* Unlock the current sleep mode. */
sleepmgr_unlock_mode(current_sleep_mode);
/* Add a 3s delay. */
delay_s(ACTIVE_TIME);
/* Lock the next sleep mode. */
++current_sleep_mode;
if ((current_sleep_mode >= SLEEPMGR_NR_OF_MODES)) {
current_sleep_mode = SLEEPMGR_ACTIVE;
}
sleepmgr_lock_mode(current_sleep_mode);
}
}
int main(void)
{
enum sleepmgr_mode current_sleep_mode = SLEEPMGR_ACTIVE;
uint32_t ast_counter = 0;
/*
* Initialize the synchronous clock system to the default configuration
* set in conf_clock.h.
* \note All non-essential peripheral clocks are initially disabled.
*/
sysclk_init();
/*
* Initialize the resources used by this example to the default
* configuration set in conf_board.h
*/
board_init();
/*
* Turn the activity status LED on to inform the user that the device
* is active.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON);
osc_priv_enable_osc32();
/* Enable the AST clock. */
ast_enable(AST);
/* Initialize the AST in Counter mode. */
struct ast_config ast_conf;
ast_conf.mode = AST_COUNTER_MODE;
ast_conf.osc_type = AST_OSC_1KHZ;
ast_conf.psel = AST_PSEL_32KHZ_1HZ - 6;
ast_conf.counter = ast_counter;
ast_set_config(AST, &ast_conf);
/*
* Configure the AST to wake up the CPU when the counter reaches the
* selected periodic0 value.
*/
ast_write_periodic0_value(AST, AST_PSEL_32KHZ_1HZ - 3);
ast_enable_wakeup(AST, AST_WAKEUP_PER);
ast_enable_event(AST, AST_EVENT_PER);
ast_clear_interrupt_flag(AST, AST_INTERRUPT_PER);
ast_set_callback(AST, AST_INTERRUPT_PER, ast_per_interrupt_callback,
AST_PER_IRQn, 0);
/* AST can wakeup the device */
bpm_enable_wakeup_source(BPM, (1 << BPM_BKUPWEN_AST));
/* Initialize the sleep manager, lock initial mode.*/
sleepmgr_init();
sleepmgr_lock_mode(current_sleep_mode);
while (1) {
/*
* Turn the activity status LED off to inform the user that the
* device is in a sleep mode.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_OFF);
/*
* Go to sleep in the deepest allowed sleep mode (i.e. no
* deeper than the currently locked sleep mode).
*/
sleepmgr_enter_sleep();
/*
* Turn the activity status LED on to inform the user that the
* device is active.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON);
/* Unlock the current sleep mode. */
sleepmgr_unlock_mode(current_sleep_mode);
/* Add a 3s delay. */
delay_s(3);
/* Lock the next sleep mode. */
++current_sleep_mode;
if ((current_sleep_mode >= SLEEPMGR_NR_OF_MODES)) {
current_sleep_mode = SLEEPMGR_ACTIVE;
}
sleepmgr_lock_mode(current_sleep_mode);
}
}
int main(void)
{
enum sleepmgr_mode current_sleep_mode = SLEEPMGR_ACTIVE;
uint32_t ast_counter = 0;
/*
* Initialize the synchronous clock system to the default configuration
* set in conf_clock.h.
* \note All non-essential peripheral clocks are initially disabled.
*/
sysclk_init();
/*
* Initialize the resources used by this example to the default
* configuration set in conf_board.h
*/
board_init();
/*
* Turn the activity status LED on to inform the user that the device
* is active.
*/
gpio_set_pin_low(LED_ACTIVITY_STATUS_PIN);
/*
* Configure pin change interrupt for asynchronous wake-up (required to
* wake up from the STATIC sleep mode) and enable the EIC clock.
*
* First, enable the clock for the EIC module.
*/
sysclk_enable_pba_module(SYSCLK_EIC);
/*
* Map the interrupt line to the GPIO pin with the right peripheral
* function.
*/
gpio_enable_module_pin(WAKE_BUTTON_EIC_PIN, WAKE_BUTTON_EIC_FUNCTION);
/*
* Enable the internal pull-up resistor on that pin (because the EIC is
* configured such that the interrupt will trigger on low-level, see
* eic_options.eic_level).
*/
gpio_enable_pin_pull_up(WAKE_BUTTON_EIC_PIN);
// Init the EIC controller with the options
eic_init(&AVR32_EIC, &eic_options, sizeof(eic_options) /
sizeof(eic_options_t));
// Enable External Interrupt Controller Line
eic_enable_line(&AVR32_EIC, WAKE_BUTTON_EIC_LINE);
// Enable the AST clock.
sysclk_enable_pba_module(SYSCLK_AST);
// Initialize the AST in Counter mode
ast_init_counter(&AVR32_AST, AST_OSC_RC, AST_PSEL_RC_1_76HZ,
ast_counter);
/*
* Configure the AST to wake up the CPU when the counter reaches the
* selected alarm0 value.
*/
AVR32_AST.WER.alarm0 = 1;
// Enable the AST
ast_enable(&AVR32_AST);
// Initialize the sleep manager, lock initial mode.
sleepmgr_init();
sleepmgr_lock_mode(current_sleep_mode);
while (1) {
ast_counter = ast_get_counter_value(&AVR32_AST);
// disable alarm 0
ast_disable_alarm0(&AVR32_AST);
// Set Alarm to current time + (6/1.76) seconds
ast_counter += 6;
ast_set_alarm0_value(&AVR32_AST, ast_counter);
// Enable alarm 0
ast_enable_alarm0(&AVR32_AST);
/*
* Turn the activity status LED off to inform the user that the
* device is in a sleep mode.
*/
gpio_set_pin_high(LED_ACTIVITY_STATUS_PIN);
/*
* Go to sleep in the deepest allowed sleep mode (i.e. no
* deeper than the currently locked sleep mode).
*/
sleepmgr_enter_sleep();
/*
* Turn the activity status LED on to inform the user that the
* device is active.
*/
gpio_set_pin_low(LED_ACTIVITY_STATUS_PIN);
// After wake up, clear the Alarm0
AVR32_AST.SCR.alarm0 = 1;
// Unlock the current sleep mode.
sleepmgr_unlock_mode(current_sleep_mode);
// Add a 3s delay
cpu_delay_ms(3000, sysclk_get_cpu_hz());
// Clear the External Interrupt Line (in case it was raised).
eic_clear_interrupt_line(&AVR32_EIC, WAKE_BUTTON_EIC_LINE);
// Lock the next sleep mode.
++current_sleep_mode;
if ((current_sleep_mode >= SLEEPMGR_NR_OF_MODES)
#if UC3L && (BOARD == UC3L_EK)
/* Note concerning the SHUTDOWN sleep mode: the shutdown sleep
* mode can only be used when the UC3L supply mode is the 3.3V
* Supply Mode with 1.8V Regulated I/O Lines. That is not how
* the UC3L is powered on the ATUC3L-EK so the SHUTDOWN mode
* cannot be used on this board. Thus we skip this sleep mode
* in this example for this board.
*/
|| (current_sleep_mode == SLEEPMGR_SHUTDOWN)
#endif
) {
current_sleep_mode = SLEEPMGR_ACTIVE;
}
sleepmgr_lock_mode(current_sleep_mode);
}
}
/**
* \brief Disable the ACIFC Module.
*
* \param[in] dev_inst Driver structure pointer
*/
void ac_disable(
struct ac_dev_inst *const dev_inst)
{
dev_inst->hw_dev->ACIFC_CTRL &= ~ACIFC_CTRL_EN;
sleepmgr_unlock_mode(SLEEPMGR_BACKUP);
}
/**
* \brief Disable the events module.
*/
void events_disable(void)
{
sysclk_disable_peripheral_clock(PEVC);
sleepmgr_unlock_mode(SLEEPMGR_BACKUP);
}
