int smsc_miibus_readreg(struct device *dev, int phy, int reg) { struct smsc_softc *sc = (struct smsc_softc *)dev; uint32_t addr; uint32_t val = 0; smsc_lock_mii(sc); if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { smsc_warn_printf(sc, "MII is busy\n"); goto done; } addr = (phy << 11) | (reg << 6) | SMSC_MII_READ; smsc_write_reg(sc, SMSC_MII_ADDR, addr); if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) smsc_warn_printf(sc, "MII read timeout\n"); smsc_read_reg(sc, SMSC_MII_DATA, &val); smsc_unlock_mii(sc); done: return (val & 0xFFFF); }
void smsc_miibus_writereg(device_t dev, int phy, int reg, int val) { struct smsc_softc *sc = device_private(dev); uint32_t addr; if (sc->sc_phyno != phy) return; smsc_lock_mii(sc); if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { smsc_warn_printf(sc, "MII is busy\n"); smsc_unlock_mii(sc); return; } smsc_write_reg(sc, SMSC_MII_DATA, val); addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE; smsc_write_reg(sc, SMSC_MII_ADDR, addr); smsc_unlock_mii(sc); if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) smsc_warn_printf(sc, "MII write timeout\n"); }