void __init sun3x_sched_init(irq_handler_t vector) { sun3_disable_interrupts(); /* Pulse enable low to get the clock started */ sun3_disable_irq(5); sun3_enable_irq(5); sun3_enable_interrupts(); }
static void sun3_scsi_reset_boot(struct Scsi_Host *instance) { unsigned long end; NCR5380_local_declare(); NCR5380_setup(instance); /* * Do a SCSI reset to clean up the bus during initialization. No * messing with the queues, interrupts, or locks necessary here. */ printk( "Sun3 SCSI: resetting the SCSI bus..." ); /* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */ sun3_disable_irq( IRQ_SUN3_SCSI ); /* get in phase */ NCR5380_write( TARGET_COMMAND_REG, PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) )); /* assert RST */ NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST ); /* The min. reset hold time is 25us, so 40us should be enough */ udelay( 50 ); /* reset RST and interrupt */ NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE ); NCR5380_read( RESET_PARITY_INTERRUPT_REG ); for( end = jiffies + AFTER_RESET_DELAY; jiffies < end; ) barrier(); /* switch on SCSI IRQ again */ sun3_enable_irq( IRQ_SUN3_SCSI ); printk( " done\n" ); }
static irqreturn_t sun3_int5(int irq, void *dev_id) { unsigned long flags; unsigned int cnt; local_irq_save(flags); #ifdef CONFIG_SUN3 intersil_clear(); #endif sun3_disable_irq(5); sun3_enable_irq(5); #ifdef CONFIG_SUN3 intersil_clear(); #endif xtime_update(1); update_process_times(user_mode(get_irq_regs())); cnt = kstat_irqs_cpu(irq, 0); if (!(cnt % 20)) sun3_leds(led_pattern[cnt % 160 / 20]); local_irq_restore(flags); return IRQ_HANDLED; }
void sun3_disable_interrupts(void) { sun3_disable_irq(0); }
static void sun3_irq_disable(struct irq_data *data) { sun3_disable_irq(data->irq); };