/**
* \brief Test GPBR read/write interfaces.
*
* \param test Current test case.
*/
static void run_gpbr_test(const struct test_case *test)
{
uint32_t ul_read_value = 0;
uint32_t ul_test_page_addr = TEST_PAGE_ADDRESS;
uint32_t *ul_back_mode_flag_addr = (uint32_t *) ul_test_page_addr;
uint32_t ul_normal_mode_flag = NORMAL_MODE_FLAG;
uint32_t ul_backup_mode_flag = BACKUP_MODE_FLAG;
uint8_t uc_write_success_flag = 1;
/* Initialize flash: 6 wait states for flash writing. */
flash_init(FLASH_ACCESS_MODE_128, FLASH_WAIT_STATE_NBR);
/* Unlock flash page. */
flash_unlock(ul_test_page_addr,
ul_test_page_addr + IFLASH_PAGE_SIZE - 1, NULL, NULL);
if ((*ul_back_mode_flag_addr) == BACKUP_MODE_FLAG) {
/* Read the data from GPBR0 */
ul_read_value = gpbr_read(GPBR0);
#if (SAM4S || SAM4E || SAM4N || SAM4C || SAM4CP || SAM4CM || SAMV70 || SAMV71 || SAME70 || SAMS70)
/* Erase flag page */
flash_erase_page(ul_test_page_addr, IFLASH_ERASE_PAGES_8);
/* Clear backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *)&ul_normal_mode_flag,
sizeof(uint32_t), 0) != FLASH_RC_OK) {
uc_write_success_flag = 0;
}
#else
/* Clear backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *)&ul_normal_mode_flag,
sizeof(uint32_t), 1) != FLASH_RC_OK) {
uc_write_success_flag = 0;
}
#endif
/* Return test result */
test_assert_true(test, (ul_read_value == GPBR_UNIT_TEST_CONST_DATA)
&& uc_write_success_flag, "Test GPBR: GPBR write error!");
/* Clear GPBR 0 */
gpbr_write(GPBR0, 0);
return;
}
/* Write the data to the backup register 0 */
gpbr_write(GPBR0, GPBR_UNIT_TEST_CONST_DATA);
/* Enable RTT wake up */
supc_set_wakeup_mode(SUPC, SUPC_WUMR_RTTEN);
/* Configure RTT */
gpbr_test_configure_rtt();
/* Wait for RTT alarm event */
rtt_write_alarm_time(RTT, RTT_WAIT_TIME);
#if (SAM4S || SAM4E || SAM4N || SAM4C || SAM4CP || SAM4CM || SAMV70 || SAMV71 || SAME70 || SAMS70)
/* Erase flag page */
if(flash_erase_page(ul_test_page_addr, IFLASH_ERASE_PAGES_8) != FLASH_RC_OK)
printf("erase page failed!\r\n");
/* Write backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *) & ul_backup_mode_flag,
sizeof(uint32_t), 0) != FLASH_RC_OK) {
/* Flag write failed, return error */
test_assert_true(test, 0, "Test GPBR: GPBR write error!");
}
#else
/* Write backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *) & ul_backup_mode_flag,
sizeof(uint32_t), 1) != FLASH_RC_OK) {
/* Flag write failed, return error */
test_assert_true(test, 0, "Test GPBR: GPBR write error!");
}
#endif
/* Enter backup mode */
pmc_enable_backupmode();
#if (!(SAM4S) && !(SAM4E) && !(SAM4N) && !(SAM4C) && !(SAM4CP) && !(SAM4CM) && !(SAMV70) && !(SAMV71) && !(SAME70) && !(SAMS70))
supc_enable_backup_mode(SUPC);
#endif
/* We should never reach here */
test_assert_true(test, 0, "Test GPBR: GPBR write error!");
}
int main(void)
{
enum sleepmgr_mode current_sleep_mode = SLEEPMGR_ACTIVE;
/*
* Initialize the synchronous clock system to the default configuration
* set in conf_clock.h.
* \note All non-essential peripheral clocks are initially disabled.
*/
sysclk_init();
/*
* Initialize the resources used by this example to the default
* configuration set in conf_board.h
*/
board_init();
/*
* Turn the activity status LED on to inform the user that the device
* is active.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON);
rtt_init(RTT, 32768);
/* Enable RTT interrupt */
NVIC_DisableIRQ(RTT_IRQn);
NVIC_ClearPendingIRQ(RTT_IRQn);
NVIC_SetPriority(RTT_IRQn, 0);
NVIC_EnableIRQ(RTT_IRQn);
rtt_enable_interrupt(RTT, RTT_MR_ALMIEN);
/* Set wakeup source to rtt_alarm */
pmc_set_fast_startup_input(PMC_FSMR_RTTAL);
#if (!SAMG)
supc_set_wakeup_mode(SUPC, SUPC_WUMR_RTTEN_ENABLE);
#endif
/* Initialize the sleep manager, lock initial mode. */
sleepmgr_init();
sleepmgr_lock_mode(current_sleep_mode);
while (1) {
rtt_write_alarm_time(RTT, rtt_read_timer_value(RTT) + SLEEP_TIME);
/*
* Turn the activity status LED off to inform the user that the
* device is in a sleep mode.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_OFF);
/*
* Go to sleep in the deepest allowed sleep mode (i.e. no
* deeper than the currently locked sleep mode).
*/
sleepmgr_enter_sleep();
/*
* Turn the activity status LED on to inform the user that the
* device is active.
*/
ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON);
/* Unlock the current sleep mode. */
sleepmgr_unlock_mode(current_sleep_mode);
/* Add a 3s delay. */
delay_s(ACTIVE_TIME);
/* Lock the next sleep mode. */
++current_sleep_mode;
if ((current_sleep_mode >= SLEEPMGR_NR_OF_MODES)) {
current_sleep_mode = SLEEPMGR_ACTIVE;
}
sleepmgr_lock_mode(current_sleep_mode);
}
}
/**
* \brief Application entry point for RTC tamper example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint32_t ul_read_value[8] = {0, 0 ,0, 0, 0, 0, 0, 0};
uint32_t ul_hour0, ul_minute0, ul_second0;
uint32_t ul_year0, ul_month0, ul_day0, ul_week0;
uint32_t ul_hour1, ul_minute1, ul_second1;
uint32_t ul_year1, ul_month1, ul_day1, ul_week1;
uint32_t tmp_src0, tmp_src1, tmp_cnt;
uint8_t uc_key;
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
puts(STRING_HEADER);
/* Default RTC configuration, 24-hour mode */
rtc_set_hour_mode(RTC, 0);
rtc_set_waveform(RTC, RTC_OUT_CHN, RTC_OUT_SRC);
if(rstc_get_reset_cause(RSTC) == RSTC_SR_RSTTYP_BackupReset) {
/* Read the data from GPBR0 ~ 7 */
ul_read_value[0] = gpbr_read(GPBR0);
ul_read_value[1] = gpbr_read(GPBR1);
ul_read_value[2] = gpbr_read(GPBR2);
ul_read_value[3] = gpbr_read(GPBR3);
ul_read_value[4] = gpbr_read(GPBR4);
ul_read_value[5] = gpbr_read(GPBR5);
ul_read_value[6] = gpbr_read(GPBR6);
ul_read_value[7] = gpbr_read(GPBR7);
if((ul_read_value[0] == 0) &&
(ul_read_value[1] == 0) &&
(ul_read_value[2] == 0) &&
(ul_read_value[3] == 0) &&
(ul_read_value[4] == 0) &&
(ul_read_value[5] == 0) &&
(ul_read_value[6] == 0) &&
(ul_read_value[7] == 0)) {
printf("The backup register is cleared when tamper event happen!\r\n");
} else {
printf("The backup register is not cleared when tamper event happen!\r\n");
}
/* Retrieve tamper date and time */
rtc_get_tamper_time(RTC, &ul_hour0, &ul_minute0, &ul_second0, 0);
rtc_get_tamper_date(RTC, &ul_year0, &ul_month0, &ul_day0, &ul_week0, 0);
rtc_get_tamper_time(RTC, &ul_hour1, &ul_minute1, &ul_second1, 1);
rtc_get_tamper_date(RTC, &ul_year1, &ul_month1, &ul_day1, &ul_week1, 1);
tmp_cnt = rtc_get_tamper_event_counter(RTC);
tmp_src0 = rtc_get_tamper_source(RTC, 0);
tmp_src1 = rtc_get_tamper_source(RTC, 1);
printf("The first tamper event TMP%u happen in %02u:%02u:%02u,%02u/%02u/%04u\r\n",
(unsigned int)tmp_src0, (unsigned int)ul_hour0, (unsigned int)ul_minute0,
(unsigned int)ul_second0, (unsigned int)ul_month0, (unsigned int)ul_day0,
(unsigned int)ul_year0);
printf("The last tamper event TMP%u happen in %02u:%02u:%02u,%02u/%02u/%04u\r\n",
(unsigned int)tmp_src1, (unsigned int)ul_hour1, (unsigned int)ul_minute1,
(unsigned int)ul_second1, (unsigned int)ul_month1, (unsigned int)ul_day1,
(unsigned int)ul_year1);
printf("The tamper event counter is %u \r\n", (unsigned int)tmp_cnt);
}
printf("Press any key to Enter Backup Mode!\r\n");
while (uart_read(CONSOLE_UART, &uc_key));
/* Write the data to the backup register GPBR0 ~ 7 */
gpbr_write(GPBR0, GPBR_CONST_DATA);
gpbr_write(GPBR1, GPBR_CONST_DATA);
gpbr_write(GPBR2, GPBR_CONST_DATA);
gpbr_write(GPBR3, GPBR_CONST_DATA);
gpbr_write(GPBR4, GPBR_CONST_DATA);
gpbr_write(GPBR5, GPBR_CONST_DATA);
gpbr_write(GPBR6, GPBR_CONST_DATA);
gpbr_write(GPBR7, GPBR_CONST_DATA);
/* Enable TMP0 and TMP2 low power debouncer and clear GPBR when event happen */
supc_set_wakeup_mode(SUPC, SUPC_WUMR_LPDBCEN0_ENABLE |
SUPC_WUMR_LPDBCCLR_ENABLE | SUPC_WUMR_LPDBCEN2_ENABLE |
SUPC_WUMR_LPDBC_2_RTCOUT0);
/* Enable TMP0 and TMP2 wake-up input and set input type*/
supc_set_wakeup_inputs(SUPC, SUPC_WUIR_WKUPEN0_ENABLE |
SUPC_WUIR_WKUPEN14_ENABLE,
SUPC_WUIR_WKUPT0_LOW | SUPC_WUIR_WKUPT14_LOW);
printf("Enter Backup Mode!\r\n");
printf("Please press button TMP0 or TMP2 to wake up!\r\n\r\n");
/* Ensure TX is done before enter backup mode */
while (!uart_is_tx_empty(CONSOLE_UART)) {
}
/* Enter backup mode */
pmc_enable_backupmode();
while (1) {
}
}
