/*! \brief Enable the USART system clock in SPI master mode. * * \param p_usart Pointer to Base address of the USART instance. * */ void usart_spi_init(volatile avr32_usart_t *p_usart) { #if (defined(AVR32_USART0_ADDRESS)) if ((uint32_t)p_usart == AVR32_USART0_ADDRESS) { sysclk_enable_pba_module(SYSCLK_USART0); } #endif #if (defined(AVR32_USART1_ADDRESS)) if ((uint32_t)p_usart == AVR32_USART1_ADDRESS) { #if UC3C sysclk_enable_pbc_module(SYSCLK_USART1); #else sysclk_enable_pba_module(SYSCLK_USART1); #endif } #endif #if (defined(AVR32_USART2_ADDRESS)) if ((uint32_t)p_usart == AVR32_USART2_ADDRESS) { sysclk_enable_pba_module(SYSCLK_USART2); } #endif #if (defined(AVR32_USART3_ADDRESS)) if ((uint32_t)p_usart == AVR32_USART3_ADDRESS) { sysclk_enable_pba_module(SYSCLK_USART3); } #endif }
/** * \brief Touch Library & Sensors Intialization * - Register the CAT interrupt with priority level 3 * - Initialize the touch library * - Intilialize the Autonomous touch sensor * * \retval STATUS_OK Configuration success * \retval ERR_INVALID_ARG Error in configuration parameters */ static status_code_t touch_api_init() { touch_ret_t touch_ret = TOUCH_SUCCESS; /* Enable CAT PBA clock */ sysclk_enable_pba_module(SYSCLK_CAT); /* Disable global interrupts */ cpu_irq_disable(); /* * Initialize the interrupt vectors * Note: This function does nothing for IAR as the interrupts are *handled * by the IAR compiler itself. It provides an abstraction between GCC & * IAR compiler to use interrupts. * Refer function implementation in interrupt_avr32.h */ irq_initialize_vectors(); /* * Register the Touch Library CAT interrupt handler to the interrupt * controller. * Note: The Touch Library CAT interrupt level for the case * of IAR is fixed to Interrupt level 3. This function does nothing for * IAR as the interrupts are handled by the IAR compiler itself. It * provides an abstraction between GCC & IAR compiler to use interrupts. * Refer function implementation in interrupt_avr32.h */ irq_register_handler(&touch_acq_done_irq, AVR32_CAT_IRQ, 3); /* Enable global interrupt */ cpu_irq_enable(); /* Initialize touch library and CAT module for Autonomous QTouch * operation. */ touch_ret = touch_at_sensor_init(&touch_config); /* Check API Error return code. */ if (touch_ret != TOUCH_SUCCESS) { return ERR_INVALID_ARG; } /* * Enable Autonomous QTouch sensor for continuous acquisition. IN_TOUCH * or OUT_OF_TOUCH status is continuously updated until the sensor is * disabled using the touch_at_sensor_disable() API. */ touch_ret = touch_at_sensor_enable(touch_at_status_change_interrupt_callback); /* Check API Error return code. */ if (touch_ret != TOUCH_SUCCESS) { return ERR_INVALID_ARG; } return STATUS_OK; } /* End of touch_api_init() */
extern void init_spi (void) { sysclk_enable_pba_module(SYSCLK_SPI); static const gpio_map_t SPI_GPIO_MAP = { {SPI_SCK_PIN, SPI_SCK_FUNCTION }, {SPI_MISO_PIN, SPI_MISO_FUNCTION}, {SPI_MOSI_PIN, SPI_MOSI_FUNCTION}, {SPI_NPCS0_PIN, SPI_NPCS0_FUNCTION }, {SPI_NPCS1_PIN, SPI_NPCS1_FUNCTION }, }; // Assign GPIO to SPI. gpio_enable_module(SPI_GPIO_MAP, sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0])); spi_options_t spiOptions = { .reg = DAC_SPI, .baudrate = 4000000, .bits = 8, .trans_delay = 0, .spck_delay = 0, .stay_act = 1, .spi_mode = 1, .modfdis = 1 }; // Initialize as master. spi_initMaster(SPI, &spiOptions); // Set SPI selection mode: variable_ps, pcs_decode, delay. spi_selectionMode(SPI, 0, 0, 0); // Enable SPI module. spi_enable(SPI); // spi_setupChipReg( SPI, &spiOptions, FPBA_HZ ); spi_setupChipReg(SPI, &spiOptions, sysclk_get_pba_hz() ); // add ADC chip register spiOptions.reg = ADC_SPI; spiOptions.baudrate = 20000000; spiOptions.bits = 16; spiOptions.spi_mode = 2; spiOptions.spck_delay = 0; spiOptions.trans_delay = 5; spiOptions.stay_act = 0; spiOptions.modfdis = 0; spi_setupChipReg( SPI, &spiOptions, FPBA_HZ ); // spi_enable(SPI); }
/** * \brief Autonomous QTouch status change interrupt callback function. * This callback function is called by the Touch library in the * CAT Autonomous QTouch status change Interrupt context, each time * there is a status change in the Autonomous Touch sensor. * * \param p_at_status: Autonomous QTouch status. * p_at_status->status_change: Autonomous QTouch status change. * p_at_status->base_count: Autonomous QTouch base count value. * p_at_status->current_count: Autonomous QTouch current count value. * \note 1. CAUTION - This callback function is called in the CAT Autonomous * QTouch Status change INTERRUPT SERVICE ROUTINE by the Touch Library. * 2. The Autonomous QTouch Status change callback is called both for * an IN_TOUCH status change and an OUT_OF_TOUCH status change. */ void touch_at_status_change_interrupt_callback(touch_at_status *p_at_status) { /* Enable GPIO clock after waking from sleep mode */ sysclk_enable_pba_module(SYSCLK_GPIO); if (p_at_status->status_change == IN_TOUCH) { autonomous_qtouch_in_touch = 1u; #if DEF_TOUCH_QDEBUG_ENABLE == 0 /* Turn ON LED0 once Autonomous QTouch sense is detected. */ gpio_clr_gpio_pin(STATUS_LED); #endif } else { autonomous_qtouch_in_touch = 0u; #if DEF_TOUCH_QDEBUG_ENABLE == 0 /* Turn ON LED0 once Autonomous QTouch sense is detected. */ gpio_set_gpio_pin(STATUS_LED); #endif } } /* End of touch_at_status_change_interrupt_callback() */
/*! \brief Enable an EIC interrupt line. * * This routine maps a GPIO pin and peripheral function to a specified EIC line. * * \param eic_line Line number to enable * \param eic_pin GPIO module pin * \param eic_func GPIO module function * \param eic_irq IRQ of the interrupt handler * \param eic_handler Interrupt handler to register */ static void eic_irq_connect(uint32_t eic_line, uint32_t eic_pin, uint32_t eic_func, uint32_t eic_irq, __int_handler eic_handler) { eic_options_t const eic_options = { .eic_line = eic_line, .eic_mode = EIC_MODE_EDGE_TRIGGERED, .eic_edge = EIC_EDGE_RISING_EDGE, .eic_level = EIC_LEVEL_HIGH_LEVEL, .eic_filter = EIC_FILTER_ENABLED, .eic_async = EIC_ASYNCH_MODE }; sysclk_enable_pba_module(SYSCLK_EIC); gpio_enable_module_pin(eic_pin, eic_func); irq_register_handler(eic_handler, eic_irq, 0); eic_init(&AVR32_EIC, &eic_options, 1); eic_enable_line(&AVR32_EIC, eic_line); eic_enable_interrupt_line(&AVR32_EIC, eic_line); }
int main(void) { enum sleepmgr_mode current_sleep_mode = SLEEPMGR_ACTIVE; uint32_t ast_counter = 0; /* * Initialize the synchronous clock system to the default configuration * set in conf_clock.h. * \note All non-essential peripheral clocks are initially disabled. */ sysclk_init(); /* * Initialize the resources used by this example to the default * configuration set in conf_board.h */ board_init(); /* * Turn the activity status LED on to inform the user that the device * is active. */ gpio_set_pin_low(LED_ACTIVITY_STATUS_PIN); /* * Configure pin change interrupt for asynchronous wake-up (required to * wake up from the STATIC sleep mode) and enable the EIC clock. * * First, enable the clock for the EIC module. */ sysclk_enable_pba_module(SYSCLK_EIC); /* * Map the interrupt line to the GPIO pin with the right peripheral * function. */ gpio_enable_module_pin(WAKE_BUTTON_EIC_PIN, WAKE_BUTTON_EIC_FUNCTION); /* * Enable the internal pull-up resistor on that pin (because the EIC is * configured such that the interrupt will trigger on low-level, see * eic_options.eic_level). */ gpio_enable_pin_pull_up(WAKE_BUTTON_EIC_PIN); // Init the EIC controller with the options eic_init(&AVR32_EIC, &eic_options, sizeof(eic_options) / sizeof(eic_options_t)); // Enable External Interrupt Controller Line eic_enable_line(&AVR32_EIC, WAKE_BUTTON_EIC_LINE); // Enable the AST clock. sysclk_enable_pba_module(SYSCLK_AST); // Initialize the AST in Counter mode ast_init_counter(&AVR32_AST, AST_OSC_RC, AST_PSEL_RC_1_76HZ, ast_counter); /* * Configure the AST to wake up the CPU when the counter reaches the * selected alarm0 value. */ AVR32_AST.WER.alarm0 = 1; // Enable the AST ast_enable(&AVR32_AST); // Initialize the sleep manager, lock initial mode. sleepmgr_init(); sleepmgr_lock_mode(current_sleep_mode); while (1) { ast_counter = ast_get_counter_value(&AVR32_AST); // disable alarm 0 ast_disable_alarm0(&AVR32_AST); // Set Alarm to current time + (6/1.76) seconds ast_counter += 6; ast_set_alarm0_value(&AVR32_AST, ast_counter); // Enable alarm 0 ast_enable_alarm0(&AVR32_AST); /* * Turn the activity status LED off to inform the user that the * device is in a sleep mode. */ gpio_set_pin_high(LED_ACTIVITY_STATUS_PIN); /* * Go to sleep in the deepest allowed sleep mode (i.e. no * deeper than the currently locked sleep mode). */ sleepmgr_enter_sleep(); /* * Turn the activity status LED on to inform the user that the * device is active. */ gpio_set_pin_low(LED_ACTIVITY_STATUS_PIN); // After wake up, clear the Alarm0 AVR32_AST.SCR.alarm0 = 1; // Unlock the current sleep mode. sleepmgr_unlock_mode(current_sleep_mode); // Add a 3s delay cpu_delay_ms(3000, sysclk_get_cpu_hz()); // Clear the External Interrupt Line (in case it was raised). eic_clear_interrupt_line(&AVR32_EIC, WAKE_BUTTON_EIC_LINE); // Lock the next sleep mode. ++current_sleep_mode; if ((current_sleep_mode >= SLEEPMGR_NR_OF_MODES) #if UC3L && (BOARD == UC3L_EK) /* Note concerning the SHUTDOWN sleep mode: the shutdown sleep * mode can only be used when the UC3L supply mode is the 3.3V * Supply Mode with 1.8V Regulated I/O Lines. That is not how * the UC3L is powered on the ATUC3L-EK so the SHUTDOWN mode * cannot be used on this board. Thus we skip this sleep mode * in this example for this board. */ || (current_sleep_mode == SLEEPMGR_SHUTDOWN) #endif ) { current_sleep_mode = SLEEPMGR_ACTIVE; } sleepmgr_lock_mode(current_sleep_mode); } }
/** * \brief Enable a peripheral's clock from its base address. * * Enables the clock to a peripheral, given its base address. If the peripheral * has an associated clock on the HSB bus, this will be enabled also. * * \param module Pointer to the module's base address. */ void sysclk_enable_peripheral_clock(const volatile void *module) { switch ((uintptr_t)module) { #if !SAM4LS case AESA_ADDR: sysclk_enable_hsb_module(SYSCLK_AESA_HSB); break; #endif case IISC_ADDR: sysclk_enable_pba_module(SYSCLK_IISC); break; case SPI_ADDR: sysclk_enable_pba_module(SYSCLK_SPI); break; case TC0_ADDR: sysclk_enable_pba_module(SYSCLK_TC0); sysclk_enable_pba_divmask(PBA_DIVMASK_TIMER_CLOCK2 | PBA_DIVMASK_TIMER_CLOCK3 | PBA_DIVMASK_TIMER_CLOCK4 | PBA_DIVMASK_TIMER_CLOCK5 ); break; case TC1_ADDR: sysclk_enable_pba_module(SYSCLK_TC1); sysclk_enable_pba_divmask(PBA_DIVMASK_TIMER_CLOCK2 | PBA_DIVMASK_TIMER_CLOCK3 | PBA_DIVMASK_TIMER_CLOCK4 | PBA_DIVMASK_TIMER_CLOCK5 ); break; case TWIM0_ADDR: sysclk_enable_pba_module(SYSCLK_TWIM0); break; case TWIS0_ADDR: sysclk_enable_pba_module(SYSCLK_TWIS0); break; case TWIM1_ADDR: sysclk_enable_pba_module(SYSCLK_TWIM1); break; case TWIS1_ADDR: sysclk_enable_pba_module(SYSCLK_TWIS1); break; case USART0_ADDR: sysclk_enable_pba_module(SYSCLK_USART0); sysclk_enable_pba_divmask(PBA_DIVMASK_CLK_USART); break; case USART1_ADDR: sysclk_enable_pba_module(SYSCLK_USART1); sysclk_enable_pba_divmask(PBA_DIVMASK_CLK_USART); break; case USART2_ADDR: sysclk_enable_pba_module(SYSCLK_USART2); sysclk_enable_pba_divmask(PBA_DIVMASK_CLK_USART); break; case USART3_ADDR: sysclk_enable_pba_module(SYSCLK_USART3); sysclk_enable_pba_divmask(PBA_DIVMASK_CLK_USART); break; case ADCIFE_ADDR: sysclk_enable_pba_module(SYSCLK_ADCIFE); break; case DACC_ADDR: sysclk_enable_pba_module(SYSCLK_DACC); break; case ACIFC_ADDR: sysclk_enable_pba_module(SYSCLK_ACIFC); break; case GLOC_ADDR: sysclk_enable_pba_module(SYSCLK_GLOC); break; case ABDACB_ADDR: sysclk_enable_pba_module(SYSCLK_ABDACB); break; case TRNG_ADDR: sysclk_enable_pba_module(SYSCLK_TRNG); break; case PARC_ADDR: sysclk_enable_pba_module(SYSCLK_PARC); break; case CATB_ADDR: sysclk_enable_pba_module(SYSCLK_CATB); break; case TWIM2_ADDR: sysclk_enable_pba_module(SYSCLK_TWIM2); break; case TWIM3_ADDR: sysclk_enable_pba_module(SYSCLK_TWIM3); break; #if !SAM4LS case LCDCA_ADDR: sysclk_enable_pba_module(SYSCLK_LCDCA); break; #endif case HFLASHC_ADDR: sysclk_enable_hsb_module(SYSCLK_HFLASHC_DATA); sysclk_enable_pbb_module(SYSCLK_HFLASHC_REGS); break; case HCACHE_ADDR: sysclk_enable_hsb_module(SYSCLK_HRAMC1_DATA); sysclk_enable_pbb_module(SYSCLK_HRAMC1_REGS); break; case HMATRIX_ADDR: sysclk_enable_pbb_module(SYSCLK_HMATRIX); break; case PDCA_ADDR: sysclk_enable_hsb_module(SYSCLK_PDCA_HSB); sysclk_enable_pbb_module(SYSCLK_PDCA_PB); break; case CRCCU_ADDR: sysclk_enable_hsb_module(SYSCLK_CRCCU_DATA); sysclk_enable_pbb_module(SYSCLK_CRCCU_REGS); break; case USBC_ADDR: sysclk_enable_hsb_module(SYSCLK_USBC_DATA); sysclk_enable_pbb_module(SYSCLK_USBC_REGS); break; case PEVC_ADDR: sysclk_enable_pbb_module(SYSCLK_PEVC); break; case PM_ADDR: sysclk_enable_pbc_module(SYSCLK_PM); break; case CHIPID_ADDR: sysclk_enable_pbc_module(SYSCLK_CHIPID); break; case SCIF_ADDR: sysclk_enable_pbc_module(SYSCLK_SCIF); break; case FREQM_ADDR: sysclk_enable_pbc_module(SYSCLK_FREQM); break; case GPIO_ADDR: sysclk_enable_pbc_module(SYSCLK_GPIO); break; case BPM_ADDR: sysclk_enable_pbd_module(SYSCLK_BPM); break; case BSCIF_ADDR: sysclk_enable_pbd_module(SYSCLK_BSCIF); break; case AST_ADDR: sysclk_enable_pbd_module(SYSCLK_AST); break; case WDT_ADDR: sysclk_enable_pbd_module(SYSCLK_WDT); break; case EIC_ADDR: sysclk_enable_pbd_module(SYSCLK_EIC); break; case PICOUART_ADDR: sysclk_enable_pbd_module(SYSCLK_PICOUART); break; default: Assert(false); return; } }
int main(void) { enum sleepmgr_mode current_sleep_mode = SLEEPMGR_ACTIVE; uint32_t ast_counter = 0; /* * Initialize the synchronous clock system to the default configuration * set in conf_clock.h. * \note All non-essential peripheral clocks are initially disabled. */ sysclk_init(); /* * Initialize the resources used by this example to the default * configuration set in conf_board.h */ board_init(); /* * Turn the activity status LED on to inform the user that the device * is active. */ ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON); osc_priv_enable_osc32(); /* Enable the AST clock. */ sysclk_enable_pba_module(SYSCLK_AST); /* Initialize the AST in Counter mode. */ ast_init_counter(AST, AST_OSC_1KHZ, AST_PSEL_32KHZ_1HZ - 6, ast_counter); /* * Configure the AST to wake up the CPU when the counter reaches the * selected periodic0 value. */ ast_set_periodic0_value(AST,AST_PSEL_32KHZ_1HZ - 3); ast_enable_periodic_interrupt(AST,0); ast_enable_periodic_async_wakeup(AST,0); ast_enable_periodic0(AST); ast_clear_periodic_status_flag(AST,0); NVIC_ClearPendingIRQ(AST_PER_IRQn); NVIC_EnableIRQ(AST_PER_IRQn); /* Enable the AST. */ ast_enable(AST); /* AST can wakeup the device */ bpm_enable_wakeup_source(BPM, (1 << BPM_BKUPWEN_AST)); // Initialize the sleep manager, lock initial mode. sleepmgr_init(); sleepmgr_lock_mode(current_sleep_mode); while (1) { /* * Turn the activity status LED off to inform the user that the * device is in a sleep mode. */ ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_OFF); /* * Go to sleep in the deepest allowed sleep mode (i.e. no * deeper than the currently locked sleep mode). */ sleepmgr_enter_sleep(); /* * Turn the activity status LED on to inform the user that the * device is active. */ ioport_set_pin_level(LED_ACTIVITY_STATUS_PIN, LED_STATUS_ON); /* Unlock the current sleep mode. */ sleepmgr_unlock_mode(current_sleep_mode); /* Add a 3s delay. */ delay_s(3); /* Lock the next sleep mode. */ ++current_sleep_mode; if ((current_sleep_mode >= SLEEPMGR_NR_OF_MODES)) { current_sleep_mode = SLEEPMGR_ACTIVE; } sleepmgr_lock_mode(current_sleep_mode); } }
/** * \brief Initializes the ACIFB module with trigger * - Start the GCLK for ACIFB * - Initialize the trigger mode & compare interrupts for ACIFB * * \retval STATUS_OK Configuration OK * \retval ERR_TIMEOUT Timeout on configuring ACIFB module * \retval ERR_BUSY ACIFB module unable to configure the trigger */ static status_code_t ac_init() { /* struct genclk_config gcfg; */ uint32_t div = sysclk_get_pba_hz() / AC_GCLK_FREQUENCY; scif_gc_setup(AC_GCLK_ID, AC_GCLK_SRC, AVR32_GC_DIV_CLOCK, div); /* Now enable the generic clock */ scif_gc_enable(AC_GCLK_ID); /* GPIO pin/acifb - function map. */ static const gpio_map_t ACIFB_GPIO_MAP = { {EXAMPLE_ACIFBP_PIN, EXAMPLE_ACIFBP_FUNCTION}, {EXAMPLE_ACIFBN_PIN, EXAMPLE_ACIFBN_FUNCTION}, }; /* ACIFB Configuration */ const acifb_t acifb_opt = { .sut = 6, /* Resolution mode */ .actest = TESTMODE_OFF, .eventen = true }; /* ACIFB Channel Configuration */ const acifb_channel_t acifb_channel_opt = { /* Filter length */ .filter_len = 0, /* Hysteresis value */ .hysteresis_value = 0, /* Output event when ACOUT is zero? */ .event_negative = false, /* Output event when ACOUT is one? */ .event_positive = false, /* Set the positive input */ .positive_input = PI_ACP, /* Set the negative input */ .negative_input = NI_ACN, /* Set the comparator mode */ .mode = MODE_EVENT_TRIGGERED, /* Interrupt settings */ .interrupt_settings = IS_VINP_LT_VINN, /* Analog comparator channel number */ .ac_n = EXAMPLE_ACIFB_CHANNEL }; /* Enable Analog Comparator clock */ sysclk_enable_pba_module(SYSCLK_ACIFB); /* Disable pullup on ACIFB channel input pins */ gpio_disable_pin_pull_up(EXAMPLE_ACIFBP_PIN); gpio_disable_pin_pull_up(EXAMPLE_ACIFBN_PIN); /* Enable the ACIFB pins */ gpio_enable_module(ACIFB_GPIO_MAP, sizeof(ACIFB_GPIO_MAP) / sizeof(ACIFB_GPIO_MAP[0])); /* Configure the ACIFB peripheral */ acifb_setup_and_enable(acifb, &acifb_opt); /* Configure the ACIFB channel with interrupt & trigger */ acifb_channels_setup(acifb, &acifb_channel_opt, AC_NB_CHANNELS); /* Disable global interrupts */ cpu_irq_disable(); /* * Initialize the interrupt vectors * Note: This function adds nothing for IAR as the interrupts are * handled by the IAR compiler itself. It provides an abstraction * between GCC & IAR compiler to use interrupts. * Refer function implementation in interrupt_avr32.h */ irq_initialize_vectors(); /* * Register the ACIFB interrupt handler * Note: This function adds nothing for IAR as the interrupts are * handled by the IAR compiler itself. It provides an abstraction * between GCC & IAR compiler to use interrupts. * Refer function implementation in interrupt_avr32.h */ irq_register_handler(&ACIFB_interrupt_handler, AVR32_ACIFB_IRQ, AC_INTERRUPT_PRIORITY); /* Enable Analog Comparator Channel interrupt */ acifb_enable_comparison_interrupt(acifb, EXAMPLE_ACIFB_CHANNEL); /* Enable global interrupts */ cpu_irq_enable(); return STATUS_OK; } /* End of ac_init() */ /** * \brief Asynchronous Timer Initialization * - Start the 32KHz Oscillator * - Initializes the AST module with periodic trigger events * * \retval STATUS_OK Configuration OK * \retval ERR_BUSY Error in configuring the AST module */ static status_code_t ast_init() { /* Initial Count value to write in AST */ unsigned long ast_counter = 0; /* Set the prescaler to set a periodic trigger from AST */ avr32_ast_pir0_t pir = { .insel = AST_TRIGGER_PRESCALER }; /* Set the OSC32 parameters */ scif_osc32_opt_t osc32_opt = { .mode = SCIF_OSC_MODE_2PIN_CRYSTAL_HICUR, .startup = OSC32_STARTUP_8192, .pinsel = BOARD_OSC32_PINSEL, .en1k = false, .en32k = true }; /* Enable the 32KHz Oscillator */ scif_start_osc32(&osc32_opt, true); /* Enable the Peripheral Event System Clock */ sysclk_enable_hsb_module(SYSCLK_EVENT); /* Enable PBA clock for AST clock to switch its source */ sysclk_enable_pba_module(SYSCLK_AST); /* Initialize the AST in counter mode */ if (!ast_init_counter(&AVR32_AST, AST_CLOCK_SOURCE, AST_PRESCALER, ast_counter)) { return ERR_BUSY; } /* Initialize the periodic value register with the prescaler */ ast_set_periodic0_value(&AVR32_AST, pir); /* Enable the AST periodic event */ ast_enable_periodic0(&AVR32_AST); /* Clear All AST Interrupt request and clear SR */ ast_clear_all_status_flags(&AVR32_AST); /* Enable the AST */ ast_enable(&AVR32_AST); /* Disable PBA clock for AST after switching its source to OSC32 */ sysclk_disable_pba_module(SYSCLK_AST); return STATUS_OK; } /* End of ast_init() */ /** * \brief Low Power Configuration * Initializes the power saving measures to reduce power consumption * - Enable pull-ups on GPIO pins * - Disable the clocks to unwanted modules * - Disable internal voltage regulator when in 1.8V supply mode */ static void power_save_measures_init() { uint8_t i; uint32_t gpio_mask[AVR32_GPIO_PORT_LENGTH] = {0}; /* * Enable internal pull-ups on all unused GPIO pins * Note: Pull-ups on Oscillator or JTAG pins can be enabled only if they * are not used as an oscillator or JTAG pin respectively. */ for (i = 0; i < (sizeof(gpio_used_pins) / sizeof(uint32_t)); i++) { gpio_mask[gpio_used_pins[i] >> 5] |= 1 << (gpio_used_pins[i] & 0x1F); } for (i = 0; i < AVR32_GPIO_PORT_LENGTH; i++) { gpio_configure_group(i, ~(gpio_mask[i]), GPIO_PULL_UP | GPIO_DIR_INPUT); } /* Disable OCD clock which is not disabled by sysclk service */ sysclk_disable_cpu_module(SYSCLK_OCD); #if POWER_SUPPLY_MODE_1_8V /* * When using 1.8V Single supply mode, the Voltage Regulator can be * shut-down using the code below, in-order to save power. * See Voltage Regulator Calibration Register in datasheet for more *info. * CAUTION: When using 3.3V Single supply mode, the Voltage Regulator * cannot be shut-down and the application will hang in this loop. */ uint32_t tmp = (AVR32_SCIF.vregcr); tmp &= (~(1 << 5 | 1 << 18)); AVR32_SCIF.unlock = 0xAA000000 | AVR32_SCIF_VREGCR; AVR32_SCIF.vregcr = tmp; /* Wait until internal voltage regulator is disabled. */ while ((AVR32_SCIF.vregcr & 0x00040020)) { } #endif } /* End of power_save_measures_init() */
/** * \brief Main Application Routine * - Initialize the system clocks * - Initialize the sleep manager * - Initialize the power save measures * - Initialize the ACIFB module * - Initialize the AST to trigger ACIFB at regular intervals * - Go to STATIC sleep mode and wake up on a touch status change */ int main(void) { /* Switch on the STATUS LED */ gpio_clr_gpio_pin(STATUS_LED); /* Switch off the error LED. */ gpio_set_gpio_pin(ERROR_LED); /* * Initialize the system clock. * Note: Clock settings are specified in conf_clock.h */ sysclk_init(); /* * Initialize the sleep manager. * Note: CONFIG_SLEEPMGR_ENABLE should have been defined in conf_sleepmgr.h */ sleepmgr_init(); /* Lock required sleep mode. */ sleepmgr_lock_mode(SLEEPMGR_STATIC); /* Initialize the delay routines */ delay_init(sysclk_get_cpu_hz()); /* Initialize the power saving features */ power_save_measures_init(); /* Switch off the error LED. */ gpio_set_gpio_pin(ERROR_LED); #if DEBUG_MESSAGES /* Enable the clock to USART interface */ sysclk_enable_peripheral_clock(DBG_USART); /* Initialize the USART interface to print trace messages */ init_dbg_rs232(sysclk_get_pba_hz()); print_dbg("\r Sleepwalking with ACIFB Module in UC3L \n"); print_dbg("\r Initializing ACIFB Module..... \n"); #endif /* Initialize the Analog Comparator peripheral */ if (ac_init() != STATUS_OK) { #if DEBUG_MESSAGES /* Error initializing the ACIFB peripheral */ print_dbg("\r Error initializing Analog Comparator module \n"); #endif while (1) { delay_ms(LED_DELAY); gpio_tgl_gpio_pin(ERROR_LED); } } #if DEBUG_MESSAGES print_dbg("\r ACIFB Module initialized. \n"); print_dbg("\r Initializing AST Module..... \n"); #endif /* Initialize the AST peripheral */ if (ast_init() != STATUS_OK) { #if DEBUG_MESSAGES print_dbg("\r Error initializing AST module \n"); #endif /* Error initializing the AST peripheral */ while (1) { delay_ms(LED_DELAY); gpio_tgl_gpio_pin(ERROR_LED); } } #if DEBUG_MESSAGES print_dbg("\r AST Module initialized. \n"); #endif /* Application routine */ while (1) { /* Enable Asynchronous wake-up for ACIFB */ pm_asyn_wake_up_enable(AVR32_PM_AWEN_ACIFBWEN_MASK); #if DEBUG_MESSAGES print_dbg("\r Going to STATIC sleep mode \n"); print_dbg( "\r Wake up only when input is higher than threshold \n"); #endif /* Switch off the status LED */ gpio_set_gpio_pin(STATUS_LED); /* Disable GPIO clock before entering sleep mode */ sysclk_disable_pba_module(SYSCLK_GPIO); AVR32_INTC.ipr[0]; /* Enter STATIC sleep mode */ sleepmgr_enter_sleep(); /* Enable GPIO clock after waking from sleep mode */ sysclk_enable_pba_module(SYSCLK_GPIO); /* Switch on the status LED */ gpio_clr_gpio_pin(STATUS_LED); #if DEBUG_MESSAGES print_dbg("\r Output higher than threshold \n"); print_dbg("\n"); #else /* LED on for few ms */ delay_ms(LED_DELAY); #endif /* Clear the wake up & enable it to enter sleep mode again */ pm_asyn_wake_up_disable(AVR32_PM_AWEN_ACIFBWEN_MASK); /* Clear All AST Interrupt request and clear SR */ ast_clear_all_status_flags(&AVR32_AST); } return 0; } /* End of main() */
// initialize application timer extern void init_tc (void) { volatile avr32_tc_t *tc = APP_TC; // waveform options static const tc_waveform_opt_t waveform_opt = { .channel = APP_TC_CHANNEL, // channel .bswtrg = TC_EVT_EFFECT_NOOP, // software trigger action on TIOB .beevt = TC_EVT_EFFECT_NOOP, // external event action .bcpc = TC_EVT_EFFECT_NOOP, // rc compare action .bcpb = TC_EVT_EFFECT_NOOP, // rb compare .aswtrg = TC_EVT_EFFECT_NOOP, // soft trig on TIOA .aeevt = TC_EVT_EFFECT_NOOP, // etc .acpc = TC_EVT_EFFECT_NOOP, .acpa = TC_EVT_EFFECT_NOOP, // Waveform selection: Up mode with automatic trigger(reset) on RC compare. .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, .enetrg = false, // external event trig .eevt = 0, // extern event select .eevtedg = TC_SEL_NO_EDGE, // extern event edge .cpcdis = false, // counter disable when rc compare .cpcstop = false, // counter stopped when rc compare .burst = false, .clki = false, // Internal source clock 5, connected to fPBA / 128. .tcclks = TC_CLOCK_SOURCE_TC5 }; // Options for enabling TC interrupts static const tc_interrupt_t tc_interrupt = { .etrgs = 0, .ldrbs = 0, .ldras = 0, .cpcs = 1, // Enable interrupt on RC compare alone .cpbs = 0, .cpas = 0, .lovrs = 0, .covfs = 0 }; // Initialize the timer/counter. tc_init_waveform(tc, &waveform_opt); // set timer compare trigger. // we want it to overflow and generate an interrupt every 1 ms // so (1 / fPBA / 128) * RC = 0.001 // so RC = fPBA / 128 / 1000 // tc_write_rc(tc, APP_TC_CHANNEL, (FPBA_HZ / 128000)); tc_write_rc(tc, APP_TC_CHANNEL, (FPBA_HZ / 128000)); // configure the timer interrupt tc_configure_interrupts(tc, APP_TC_CHANNEL, &tc_interrupt); // Start the timer/counter. tc_start(tc, APP_TC_CHANNEL); } extern void init_spi (void) { sysclk_enable_pba_module(SYSCLK_SPI); static const gpio_map_t SPI_GPIO_MAP = { {SPI_SCK_PIN, SPI_SCK_FUNCTION }, {SPI_MISO_PIN, SPI_MISO_FUNCTION}, {SPI_MOSI_PIN, SPI_MOSI_FUNCTION}, {SPI_NPCS0_PIN, SPI_NPCS0_FUNCTION }, {SPI_NPCS1_PIN, SPI_NPCS1_FUNCTION }, {SPI_NPCS2_PIN, SPI_NPCS2_FUNCTION }, }; // Assign GPIO to SPI. gpio_enable_module(SPI_GPIO_MAP, sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0])); spi_options_t spiOptions = { .reg = DAC_SPI, .baudrate = 2000000, .bits = 8, .trans_delay = 0, .spck_delay = 0, .stay_act = 1, .spi_mode = 1, .modfdis = 1 }; // Initialize as master. spi_initMaster(SPI, &spiOptions); // Set SPI selection mode: variable_ps, pcs_decode, delay. spi_selectionMode(SPI, 0, 0, 0); // Enable SPI module. spi_enable(SPI); // spi_setupChipReg( SPI, &spiOptions, FPBA_HZ ); spi_setupChipReg(SPI, &spiOptions, sysclk_get_pba_hz() ); // add ADC chip register spiOptions.reg = ADC_SPI; spiOptions.baudrate = 20000000; spiOptions.bits = 16; spiOptions.spi_mode = 2; spiOptions.spck_delay = 0; spiOptions.trans_delay = 5; spiOptions.stay_act = 0; spiOptions.modfdis = 0; spi_setupChipReg( SPI, &spiOptions, FPBA_HZ ); // add OLED chip register spiOptions.reg = OLED_SPI; spiOptions.baudrate = 40000000; spiOptions.bits = 8; spiOptions.spi_mode = 3; spiOptions.spck_delay = 0; spiOptions.trans_delay = 0; spiOptions.stay_act = 1; spiOptions.modfdis = 1; spi_setupChipReg( SPI, &spiOptions, FPBA_HZ ); } // initialize USB host stack void init_usb_host (void) { uhc_start(); } // initialize i2c void init_i2c_master(void) { twi_options_t opt; int status; static const gpio_map_t TWI_GPIO_MAP = { {AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION}, {AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION} }; gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0])); // options settings opt.pba_hz = FOSC0; opt.speed = TWI_SPEED; opt.chip = 0x50; // initialize TWI driver with options // status = twi_master_init(&AVR32_TWI, &opt); status = twi_master_init(TWI, &opt); /* // check init result if (status == TWI_SUCCESS) print_dbg("\r\ni2c init"); else print_dbg("\r\ni2c init FAIL"); */ } void init_i2c_slave(void) { twi_options_t opt; twi_slave_fct_t twi_slave_fct; int status; static const gpio_map_t TWI_GPIO_MAP = { {AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION}, {AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION} }; gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0])); // options settings opt.pba_hz = FOSC0; opt.speed = TWI_SPEED; opt.chip = 0x50; // initialize TWI driver with options twi_slave_fct.rx = &twi_slave_rx; twi_slave_fct.tx = &twi_slave_tx; twi_slave_fct.stop = &twi_slave_stop; status = twi_slave_init(&AVR32_TWI, &opt, &twi_slave_fct ); /* // check init result if (status == TWI_SUCCESS) print_dbg("\r\ni2c init"); else print_dbg("\r\ni2c init FAIL"); */ }
int main(void) { sysclk_init(); int i=0; // board_init(); sysclk_enable_pba_module(SYSCLK_SPI); // spi_reset(SPI_EXAMPLE); // spi_set_master_mode(SPI_EXAMPLE); // spi_disable_modfault(SPI_EXAMPLE); // spi_disable_loopback(SPI_EXAMPLE); // spi_set_chipselect(SPI_EXAMPLE,(1 << AVR32_SPI_MR_PCS_SIZE) - 1); // spi_disable_variable_chipselect(SPI_EXAMPLE); // spi_disable_chipselect_decoding(SPI_EXAMPLE); // spi_set_delay(SPI_EXAMPLE,0); // spi_set_chipselect_delay_bct(SPI_EXAMPLE,0,0); // spi_set_chipselect_delay_bs(SPI_EXAMPLE,0,0); // spi_set_bits_per_transfer(SPI_EXAMPLE,0, 8); // spi_set_baudrate_register(SPI_EXAMPLE,0, getBaudDiv(1000000, sysclk_get_peripheral_bus_hz(SPI_EXAMPLE))); // spi_enable_active_mode(SPI_EXAMPLE,0); // spi_set_mode(SPI_EXAMPLE,0,SPI_MODE_0); static const gpio_map_t SPI_GPIO_MAP = { {AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION }, {AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION}, {AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION}, {AT45DBX_SPI_NPCS0_PIN, AT45DBX_SPI_NPCS0_FUNCTION }, // {AT45DBX_SPI_NPCS1_PIN, AT45DBX_SPI_NPCS1_FUNCTION }, }; // Assign GPIO to SPI. gpio_enable_module(SPI_GPIO_MAP, sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0])); spi_options_t spiOptions = { .reg = 0, .baudrate = 1000000, .bits = 8, .trans_delay = 0, .spck_delay = 0, .stay_act = 1, .spi_mode = 0, .modfdis = 1 }; // Initialize as master. spi_initMaster(SPI_EXAMPLE, &spiOptions); // Set SPI selection mode: variable_ps, pcs_decode, delay. spi_selectionMode(SPI_EXAMPLE, 0, 0, 0); // Enable SPI module. spi_enable(SPI_EXAMPLE); // spi_setupChipReg( SPI, &spiOptions, FPBA_HZ ); spi_setupChipReg(SPI_EXAMPLE, &spiOptions, sysclk_get_pba_hz() ); spi_enable(SPI_EXAMPLE); while (true) { i++; delay_ms(10); // status = spi_at45dbx_mem_check(); spi_selectChip(SPI_EXAMPLE,0); spi_put(SPI_EXAMPLE,i); spi_unselectChip(SPI_EXAMPLE,0); } }
/** * \brief Initializes the ADCIFB module with trigger * - Initialize the trigger mode & compare interrupts for ADCIFB * * \retval STATUS_OK Configuration OK * \retval ERR_TIMEOUT Timeout on configuring ADCIFB module * \retval ERR_BUSY ADCIFB module unable to configure the trigger */ static status_code_t adc_init() { /* GPIO pin/adc - function map. */ static const gpio_map_t ADCIFB_GPIO_MAP = { {EXAMPLE_ADCIFB_PIN, EXAMPLE_ADCIFB_FUNCTION} }; /* ADCIFB Configuration */ adcifb_opt_t adcifb_opt = { /* Resolution mode */ .resolution = AVR32_ADCIFB_ACR_RES_10BIT, /* Channels Sample & Hold Time in [0,15] */ .shtim = ADC_SAMPLE_HOLD_TIME, /* ADC Clock Prescaler */ .ratio_clkadcifb_clkadc = (sysclk_get_pba_hz()) / ADC_FREQUENCY, .startup = ADC_STARTUP_TIME, /* ADCIFB Sleep Mode enabled */ .sleep_mode_enable = true }; /* Disable pull up on ADCIFB channel input pin */ gpio_disable_pin_pull_up(EXAMPLE_ADCIFB_PIN); /* Enable the ADC pins */ gpio_enable_module(ADCIFB_GPIO_MAP, sizeof(ADCIFB_GPIO_MAP) / sizeof(ADCIFB_GPIO_MAP[0])); /* Enable ADCIFB clock */ sysclk_enable_pba_module(SYSCLK_ADCIFB); /* Configure the ADCIFB peripheral */ if (adcifb_configure(adcifb, &adcifb_opt)) { /* Error configuring the ADCIFB */ return ERR_TIMEOUT; } /* Configure the trigger for ADCIFB peripheral */ if (adcifb_configure_trigger(adcifb, AVR32_ADCIFB_TRGR_TRGMOD_EVT, 0)) { /* Error configuring the trigger for ADCIFB */ return ERR_BUSY; } /* Enable ADCIFB Channel 0 */ adcifb_channels_enable(adcifb, EXAMPLE_ADCIFB_CHANNEL); /* Disable global interrupts */ cpu_irq_disable(); /* * Initialize the interrupt vectors * Note: This function adds nothing for IAR as the interrupts are * handled by the IAR compiler itself. It provides an abstraction * between GCC & IAR compiler to use interrupts. * Refer function implementation in interrupt_avr32.h */ irq_initialize_vectors(); /* * Register the ADCIFB interrupt handler * Note: This function adds nothing for IAR as the interrupts are * handled by the IAR compiler itself. It provides an abstraction * between GCC & IAR compiler to use interrupts. * Refer function implementation in interrupt_avr32.h */ irq_register_handler(&ADCIFB_interrupt_handler, AVR32_ADCIFB_IRQ, ADC_INTERRUPT_PRIORITY); /* * Set the threshold value in CVR.LV register to generate interrupt * when the value detected is above the threshold. * 1.500 V with 10-bit resolution */ adcifb_set_high_compare_value(adcifb, ADC_COMPARE_VALUE); /* Enable the Analog Compare option in ADCIFB */ adcifb_enable_analog_compare_mode(adcifb); /* Enable the data ready interrupt for ADCIFB */ adcifb_enable_compare_gt_interrupt(adcifb); return STATUS_OK; } /* End of adc_init() */ /** * \brief Asynchronous Timer Initialization * - Start the 32KHz Oscillator * - Initializes the AST module with periodic trigger events * * \retval STATUS_OK Configuration OK * \retval ERR_TIMEOUT Error in configuring the AST module */ static status_code_t ast_init() { /* Initial Count value to write in AST */ unsigned long ast_counter = 0; /* Set the prescaler to set a periodic trigger from AST */ avr32_ast_pir0_t pir = { .insel = AST_TRIGGER_PRESCALER }; /* Set the OSC32 parameters */ scif_osc32_opt_t osc32_opt = { .mode = SCIF_OSC_MODE_2PIN_CRYSTAL_HICUR, .startup = OSC32_STARTUP_8192, .pinsel = BOARD_OSC32_PINSEL, .en1k = false, .en32k = true }; /* Enable the 32KHz Oscillator */ scif_start_osc32(&osc32_opt, true); /* Enable the Peripheral Event System Clock */ sysclk_enable_hsb_module(SYSCLK_EVENT); /* Enable PBA clock for AST clock to switch its source */ sysclk_enable_pba_module(SYSCLK_AST); /* Initialize the AST in counter mode */ if (!ast_init_counter(&AVR32_AST, AST_CLOCK_SOURCE, AST_PRESCALER, ast_counter)) { return ERR_TIMEOUT; } /* Initialize the periodic value register with the prescaler */ ast_set_periodic0_value(&AVR32_AST, pir); /* Enable the AST periodic event */ ast_enable_periodic0(&AVR32_AST); /* Clear All AST Interrupt request and clear SR */ ast_clear_all_status_flags(&AVR32_AST); /* Enable the AST */ ast_enable(&AVR32_AST); /* Disable PBA clock for AST after switching its source to OSC32 */ sysclk_disable_pba_module(SYSCLK_AST); return STATUS_OK; } /* End of ast_init() */ /** * \brief Low Power Configuration * Initializes the power saving measures to reduce power consumption * - Enable pullups on GPIO pins * - Disable the clocks to unused modules * - Disable internal voltage regulator when in 1.8V supply mode */ static void power_save_measures_init() { uint8_t i; uint32_t gpio_mask[AVR32_GPIO_PORT_LENGTH] = {0}; /* * Enable internal pull-ups on all unused GPIO pins * Note: Pull-ups on Oscillator or JTAG pins can be enabled only if they * are not used as an oscillator or JTAG pin respectively. */ for (i = 0; i < (sizeof(gpio_used_pins) / sizeof(uint32_t)); i++) { gpio_mask[gpio_used_pins[i] >> 5] |= 1 << (gpio_used_pins[i] & 0x1F); } for (i = 0; i < AVR32_GPIO_PORT_LENGTH; i++) { gpio_configure_group(i, ~(gpio_mask[i]), GPIO_PULL_UP | GPIO_DIR_INPUT); } /* Disable OCD clock which is not disabled by sysclk service */ sysclk_disable_cpu_module(SYSCLK_OCD); #if POWER_SUPPLY_MODE_1_8V /* * When using 1.8V Single supply mode, the Voltage Regulator can be * shut-down using the code below, in-order to save power. * See Voltage Regulator Calibration Register in datasheet for more *info. * CAUTION: When using 3.3V Single supply mode, the Voltage Regulator * cannot be shut-down and the application will hang in this loop. */ uint32_t tmp = (AVR32_SCIF.vregcr); tmp &= (~(1 << 5 | 1 << 18)); AVR32_SCIF.unlock = 0xAA000000 | AVR32_SCIF_VREGCR; AVR32_SCIF.vregcr = tmp; /* Wait until internal voltage regulator is disabled. */ while ((AVR32_SCIF.vregcr & 0x00040020)) { } #endif } /* End of power_save_measures_init() */
static status_code_t ast_init() { /* Initial Count value to write in AST */ unsigned long ast_counter = 0; /* Set the prescaler to set a periodic trigger from AST */ avr32_ast_pir0_t pir = { .insel = AST_TRIGGER_PRESCALER }; /* Set the OSC32 parameters */ scif_osc32_opt_t osc32_opt = { #if BOARD_OSC32_IS_XTAL .mode = SCIF_OSC_MODE_2PIN_CRYSTAL_HICUR, #else .mode = SCIF_OSC_MODE_EXT_CLK, #endif .startup = OSC32_STARTUP_8192, .pinsel = BOARD_OSC32_PINSEL, .en1k = false, .en32k = true }; /* Enable the 32KHz Oscillator */ scif_start_osc32(&osc32_opt, true); /* Enable the Peripheral Event System Clock */ sysclk_enable_hsb_module(SYSCLK_EVENT); /* Enable PBA clock for AST clock to switch its source */ sysclk_enable_pba_module(SYSCLK_AST); /* Initialize the AST in counter mode */ if (!ast_init_counter(&AVR32_AST, AST_CLOCK_SOURCE, AST_PRESCALER, ast_counter)) { return ERR_BUSY; /* Check AST timer */ } /* Initialize the periodic value register with the prescaler */ ast_set_periodic0_value(&AVR32_AST, pir); /* Enable the AST periodic event */ ast_enable_periodic0(&AVR32_AST); /* Clear All AST Interrupt request and clear SR */ ast_clear_all_status_flags(&AVR32_AST); /* Enable the AST */ ast_enable(&AVR32_AST); /* Disable PBA clock for AST after switching its source to OSC32 */ sysclk_disable_pba_module(SYSCLK_AST); return STATUS_OK; } /* End of ast_init() */ #endif /** * \brief Low Power Configuration * Initializes the power saving measures to reduce power consumption * - Enable pull ups on GPIO pins * - Disable the clocks to unwanted modules * - Disable internal voltage regulator when in 1.8V supply mode */ void power_save_measures_init() { uint8_t i; uint32_t gpio_mask[AVR32_GPIO_PORT_LENGTH] = {0}; /* * Enable internal pull-ups on all unused GPIO pins * Note: Pull-ups on Oscillator or JTAG pins can be enabled only if they * are not used as an oscillator or JTAG pin respectively. */ for (i = 0; i < (sizeof(gpio_used_pins) / sizeof(uint32_t)); i++) { gpio_mask[gpio_used_pins[i] >> 5] |= 1 << (gpio_used_pins[i] & 0x1F); } for (i = 0; i < AVR32_GPIO_PORT_LENGTH; i++) { gpio_configure_group(i, gpio_mask[i], GPIO_PULL_UP | GPIO_DIR_INPUT); } /* Disable OCD clock which is not disabled by sysclk service */ sysclk_disable_cpu_module(SYSCLK_OCD); #if POWER_SUPPLY_MODE_1_8V /* * When using 1.8V Single supply mode, the Voltage Regulator can be * shut-down using the code below, in-order to save power. * See Voltage Regulator Calibration Register in datasheet for more *info. * CAUTION: When using 3.3V Single supply mode, the Voltage Regulator * cannot be shut-down and the application will hang in this loop. */ uint32_t tmp = (AVR32_SCIF.vregcr); tmp &= (~(1 << 5)); AVR32_SCIF.unlock = 0xAA000000 | AVR32_SCIF_VREGCR; AVR32_SCIF.vregcr = tmp; /* Wait until internal voltage regulator is disabled. */ while ((AVR32_SCIF.vregcr & 0x20)) { } #endif } /* End of power_save_measures_init() */
/** * \brief Application main loop. */ int main(void) { uint32_t state = 0; /** * \note the call to sysclk_init() will disable all non-vital * peripheral clocks, except for the peripheral clocks explicitly * enabled in conf_clock.h. */ sysclk_init(); /** * Enable the clock to the selected example GPIO peripheral module. */ sysclk_enable_pba_module(SYSCLK_GPIO); // Pull-up is enabled for all used pins gpio_enable_pin_pull_up(GPIO_PIN_EXAMPLE_1); gpio_enable_pin_pull_up(GPIO_PIN_EXAMPLE_2); gpio_enable_pin_pull_up(GPIO_PIN_EXAMPLE_3); // Disable all interrupts cpu_irq_disable(); INTC_init_interrupts(); // Register GPIO Pin Change Interrupt INTC_register_interrupt(&gpio_pin_change_interrupt_handler, AVR32_GPIO_IRQ_0, AVR32_INTC_INT0); // Enable pin change interrupt for GPIO_PIN_EXAMPLE_2 gpio_enable_pin_interrupt(GPIO_PIN_EXAMPLE_2, GPIO_PIN_CHANGE); // Enable all interrupts cpu_irq_enable(); // Based on the variable, GPIO_PIN_EXAMPLE_1 will be changed. while (1) { switch (state) { case 0: // Access with GPIO driver gpio.c with clear and set access. gpio_clr_gpio_pin(GPIO_PIN_EXAMPLE_1); state++; break; case 1: gpio_set_gpio_pin(GPIO_PIN_EXAMPLE_1); state++; break; case 2: // Note that it is also possible to use the GPIO toggle feature. gpio_tgl_gpio_pin(GPIO_PIN_EXAMPLE_1); state++; break; default: gpio_tgl_gpio_pin(GPIO_PIN_EXAMPLE_1); state = 0; break; } // Check GPIO_PIN_EXAMPLE_1 value to modify GPIO_PIN_EXAMPLE_2. if (gpio_get_pin_value(GPIO_PIN_EXAMPLE_1) == 0) gpio_clr_gpio_pin(GPIO_PIN_EXAMPLE_2); else gpio_set_gpio_pin(GPIO_PIN_EXAMPLE_2); } while (true) { cpu_relax(); } }