void adc_configure_ain_pin(uint32_t pin)
{
#define PIN_INVALID_ADC_AIN 0xFFFFUL
/* Pinmapping table for AINxx -> GPIO pin number */
const uint32_t pinmapping[] = {
#if (SAMD20E | SAMD21E)
PIN_PA02B_ADC_AIN0, PIN_PA03B_ADC_AIN1,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA04B_ADC_AIN4, PIN_PA05B_ADC_AIN5,
PIN_PA06B_ADC_AIN6, PIN_PA07B_ADC_AIN7,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA08B_ADC_AIN16, PIN_PA09B_ADC_AIN17,
PIN_PA10B_ADC_AIN18, PIN_PA11B_ADC_AIN19,
#elif (SAMD20G | SAMD21G)
PIN_PA02B_ADC_AIN0, PIN_PA03B_ADC_AIN1,
PIN_PB08B_ADC_AIN2, PIN_PB09B_ADC_AIN3,
PIN_PA04B_ADC_AIN4, PIN_PA05B_ADC_AIN5,
PIN_PA06B_ADC_AIN6, PIN_PA07B_ADC_AIN7,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PB02B_ADC_AIN10, PIN_PB03B_ADC_AIN11,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA08B_ADC_AIN16, PIN_PA09B_ADC_AIN17,
PIN_PA10B_ADC_AIN18, PIN_PA11B_ADC_AIN19,
#elif (SAMD20J | SAMD21J)
PIN_PA02B_ADC_AIN0, PIN_PA03B_ADC_AIN1,
PIN_PB08B_ADC_AIN2, PIN_PB09B_ADC_AIN3,
PIN_PA04B_ADC_AIN4, PIN_PA05B_ADC_AIN5,
PIN_PA06B_ADC_AIN6, PIN_PA07B_ADC_AIN7,
PIN_PB00B_ADC_AIN8, PIN_PB01B_ADC_AIN9,
PIN_PB02B_ADC_AIN10, PIN_PB03B_ADC_AIN11,
PIN_PB04B_ADC_AIN12, PIN_PB05B_ADC_AIN13,
PIN_PB06B_ADC_AIN14, PIN_PB07B_ADC_AIN15,
PIN_PA08B_ADC_AIN16, PIN_PA09B_ADC_AIN17,
PIN_PA10B_ADC_AIN18, PIN_PA11B_ADC_AIN19,
#elif SAMR21E
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA06B_ADC_AIN6, PIN_PA07B_ADC_AIN7,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA08B_ADC_AIN16, PIN_PA09B_ADC_AIN17,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
#elif SAMR21G
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA04B_ADC_AIN4, PIN_PA05B_ADC_AIN5,
PIN_PA06B_ADC_AIN6, PIN_PA07B_ADC_AIN7,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PB02B_ADC_AIN10, PIN_PB03B_ADC_AIN11,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA08B_ADC_AIN16, PIN_PA09B_ADC_AIN17,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
#elif (SAMD10C | SAMD11C)
PIN_PA02B_ADC_AIN0, PIN_INVALID_ADC_AIN,
PIN_PA04B_ADC_AIN2, PIN_PA05B_ADC_AIN3,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_PA14B_ADC_AIN6, PIN_PA15B_ADC_AIN7,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
#elif (SAMD10DS | SAMD11DS)
PIN_PA02B_ADC_AIN0, PIN_INVALID_ADC_AIN,
PIN_PA04B_ADC_AIN2, PIN_PA05B_ADC_AIN3,
PIN_PA06B_ADC_AIN4, PIN_PA07B_ADC_AIN5,
PIN_PA14B_ADC_AIN6, PIN_PA15B_ADC_AIN7,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
#elif (SAMD10DM | SAMD11DM)
PIN_PA02B_ADC_AIN0, PIN_PA03B_ADC_AIN1,
PIN_PA04B_ADC_AIN2, PIN_PA05B_ADC_AIN3,
PIN_PA06B_ADC_AIN4, PIN_PA07B_ADC_AIN5,
PIN_PA14B_ADC_AIN6, PIN_PA15B_ADC_AIN7,
PIN_PA10B_ADC_AIN8, PIN_PA11B_ADC_AIN9,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
PIN_INVALID_ADC_AIN, PIN_INVALID_ADC_AIN,
#else
# error ADC pin mappings are not defined for this device.
#endif
};
uint32_t pin_map_result = PIN_INVALID_ADC_AIN;
if (pin <= ADC_EXTCHANNEL_MSB) {
pin_map_result = pinmapping[pin >> ADC_INPUTCTRL_MUXPOS_Pos];
Assert(pin_map_result != PIN_INVALID_ADC_AIN);
struct system_pinmux_config config;
system_pinmux_get_config_defaults(&config);
/* Analog functions are all on MUX setting B */
config.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
config.mux_position = 1;
system_pinmux_pin_set_config(pin_map_result, &config);
}
/**
* \brief Initializes a hardware TC module instance.
*
* Enables the clock and initializes the TC module, based on the given
* configuration values.
*
* \param[in,out] module_inst Pointer to the software module instance struct
* \param[in] hw Pointer to the TC hardware module
* \param[in] config Pointer to the TC configuration options struct
*
* \return Status of the initialization procedure.
*
* \retval STATUS_OK The module was initialized successfully
* \retval STATUS_BUSY Hardware module was busy when the
* initialization procedure was attempted
* \retval STATUS_INVALID_ARG An invalid configuration option or argument
* was supplied
* \retval STATUS_ERR_DENIED Hardware module was already enabled, or the
* hardware module is configured in 32 bit
* slave mode
*/
enum status_code tc_init(
struct tc_module *const module_inst,
Tc *const hw,
const struct tc_config *const config)
{
/* Sanity check arguments */
Assert(hw);
Assert(module_inst);
Assert(config);
/* Temporary variable to hold all updates to the CTRLA
* register before they are written to it */
uint16_t ctrla_tmp = 0;
/* Temporary variable to hold all updates to the CTRLBSET
* register before they are written to it */
uint8_t ctrlbset_tmp = 0;
/* Temporary variable to hold all updates to the CTRLC
* register before they are written to it */
uint8_t ctrlc_tmp = 0;
/* Temporary variable to hold TC instance number */
uint8_t instance = _tc_get_inst_index(hw);
/* Array of GLCK ID for different TC instances */
uint8_t inst_gclk_id[] = TC_INST_GCLK_ID;
/* Array of PM APBC mask bit position for different TC instances */
uint16_t inst_pm_apbmask[] = TC_INST_PM_APBCMASK;
struct system_pinmux_config pin_config;
struct system_gclk_chan_config gclk_chan_config;
#if TC_ASYNC == true
/* Initialize parameters */
for (uint8_t i = 0; i < TC_CALLBACK_N; i++) {
module_inst->callback[i] = NULL;
}
module_inst->register_callback_mask = 0x00;
module_inst->enable_callback_mask = 0x00;
/* Register this instance for callbacks*/
_tc_instances[instance] = module_inst;
#endif
/* Associate the given device instance with the hardware module */
module_inst->hw = hw;
/* Check if odd numbered TC modules are being configured in 32-bit
* counter size. Only even numbered counters are allowed to be
* configured in 32-bit counter size.
*/
if ((config->counter_size == TC_COUNTER_SIZE_32BIT) &&
((instance + TC_INSTANCE_OFFSET) & 0x01)) {
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
/* Make the counter size variable in the module_inst struct reflect
* the counter size in the module
*/
module_inst->counter_size = config->counter_size;
if (hw->COUNT8.CTRLA.reg & TC_CTRLA_SWRST) {
/* We are in the middle of a reset. Abort. */
return STATUS_BUSY;
}
if (hw->COUNT8.STATUS.reg & TC_STATUS_SLAVE) {
/* Module is used as a slave */
return STATUS_ERR_DENIED;
}
if (hw->COUNT8.CTRLA.reg & TC_CTRLA_ENABLE) {
/* Module must be disabled before initialization. Abort. */
return STATUS_ERR_DENIED;
}
/* Set up the TC PWM out pin for channel 0 */
if (config->pwm_channel[0].enabled) {
system_pinmux_get_config_defaults(&pin_config);
pin_config.mux_position = config->pwm_channel[0].pin_mux;
pin_config.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
system_pinmux_pin_set_config(
config->pwm_channel[0].pin_out, &pin_config);
}
/* Set up the TC PWM out pin for channel 1 */
if (config->pwm_channel[1].enabled) {
system_pinmux_get_config_defaults(&pin_config);
pin_config.mux_position = config->pwm_channel[1].pin_mux;
pin_config.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
system_pinmux_pin_set_config(
config->pwm_channel[1].pin_out, &pin_config);
}
/* Enable the user interface clock in the PM */
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC,
inst_pm_apbmask[instance]);
/* Enable the slave counter if counter_size is 32 bit */
if ((config->counter_size == TC_COUNTER_SIZE_32BIT))
{
/* Enable the user interface clock in the PM */
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC,
inst_pm_apbmask[instance + 1]);
}
/* Setup clock for module */
system_gclk_chan_get_config_defaults(&gclk_chan_config);
gclk_chan_config.source_generator = config->clock_source;
system_gclk_chan_set_config(inst_gclk_id[instance], &gclk_chan_config);
system_gclk_chan_enable(inst_gclk_id[instance]);
/* Set ctrla register */
ctrla_tmp =
(uint32_t)config->counter_size |
(uint32_t)config->wave_generation |
(uint32_t)config->reload_action |
(uint32_t)config->clock_prescaler;
if (config->run_in_standby) {
ctrla_tmp |= TC_CTRLA_RUNSTDBY;
}
/* Write configuration to register */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CTRLA.reg = ctrla_tmp;
/* Set ctrlb register */
if (config->oneshot) {
ctrlbset_tmp = TC_CTRLBSET_ONESHOT;
}
if (config->count_direction) {
ctrlbset_tmp |= TC_CTRLBSET_DIR;
}
/* Clear old ctrlb configuration */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CTRLBCLR.reg = 0xFF;
/* Check if we actually need to go into a wait state. */
if (ctrlbset_tmp) {
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Write configuration to register */
hw->COUNT8.CTRLBSET.reg = ctrlbset_tmp;
}
/* Set ctrlc register*/
ctrlc_tmp = config->waveform_invert_output;
for (uint8_t i = 0; i < NUMBER_OF_COMPARE_CAPTURE_CHANNELS; i++) {
if (config->enable_capture_on_channel[i] == true) {
ctrlc_tmp |= (TC_CTRLC_CPTEN(1) << i);
}
}
/* Write configuration to register */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CTRLC.reg = ctrlc_tmp;
/* Write configuration to register */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Switch for TC counter size */
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.COUNT.reg =
config->counter_8_bit.value;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.PER.reg =
config->counter_8_bit.period;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CC[0].reg =
config->counter_8_bit.compare_capture_channel[0];
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CC[1].reg =
config->counter_8_bit.compare_capture_channel[1];
return STATUS_OK;
case TC_COUNTER_SIZE_16BIT:
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT16.COUNT.reg
= config->counter_16_bit.value;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT16.CC[0].reg =
config->counter_16_bit.compare_capture_channel[0];
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT16.CC[1].reg =
config->counter_16_bit.compare_capture_channel[1];
return STATUS_OK;
case TC_COUNTER_SIZE_32BIT:
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT32.COUNT.reg
= config->counter_32_bit.value;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT32.CC[0].reg =
config->counter_32_bit.compare_capture_channel[0];
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT32.CC[1].reg =
config->counter_32_bit.compare_capture_channel[1];
return STATUS_OK;
}
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
/**
* \brief Initialize the DAC device struct.
*
* Use this function to initialize the Digital to Analog Converter. Resets the
* underlying hardware module and configures it.
*
* \note The DAC channel must be configured separately.
*
* \param[out] module_inst Pointer to the DAC software instance struct
* \param[in] module Pointer to the DAC module instance
* \param[in] config Pointer to the config struct, created by the user
* application
*
* \return Status of initialization.
* \retval STATUS_OK Module initiated correctly
* \retval STATUS_ERR_DENIED If module is enabled
* \retval STATUS_BUSY If module is busy resetting
*/
enum status_code dac_init(
struct dac_module *const module_inst,
Dac *const module,
struct dac_config *const config)
{
/* Sanity check arguments */
Assert(module_inst);
Assert(module);
Assert(config);
/* Initialize device instance */
module_inst->hw = module;
/* Turn on the digital interface clock */
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_DAC);
/* Check if module is enabled. */
if (module->CTRLA.reg & DAC_CTRLA_ENABLE) {
return STATUS_ERR_DENIED;
}
/* Check if reset is in progress. */
if (module->CTRLA.reg & DAC_CTRLA_SWRST) {
return STATUS_BUSY;
}
/* Configure GCLK channel and enable clock */
struct system_gclk_chan_config gclk_chan_conf;
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
gclk_chan_conf.source_generator = config->clock_source;
system_gclk_chan_set_config(DAC_GCLK_ID, &gclk_chan_conf);
system_gclk_chan_enable(DAC_GCLK_ID);
/* MUX the DAC VOUT pin */
struct system_pinmux_config pin_conf;
system_pinmux_get_config_defaults(&pin_conf);
/* Set up the DAC VOUT0 pin */
pin_conf.mux_position = MUX_PA02B_DAC_VOUT0;
pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
system_pinmux_pin_set_config(PIN_PA02B_DAC_VOUT0, &pin_conf);
/* Set up the DAC VOUT1 pin */
pin_conf.mux_position = MUX_PA05B_DAC_VOUT1;
pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
system_pinmux_pin_set_config(PIN_PA05B_DAC_VOUT1, &pin_conf);
/* Write configuration to module */
_dac_set_config(module_inst, config);
/* Store reference selection for later use */
module_inst->reference = config->reference;
#if DAC_CALLBACK_MODE == true
for (uint8_t i = 0; i < DAC_CHANNEL_N; i++) {
for (uint8_t j = 0; j < DAC_CALLBACK_N; j++) {
module_inst->callback[i][j] = NULL;
}
};
_dac_instances[0] = module_inst;
#endif
return STATUS_OK;
}
void serial_init(serial_t *obj, PinName tx, PinName rx)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
if (g_sys_init == 0) {
system_init();
g_sys_init = 1;
}
struct system_gclk_chan_config gclk_chan_conf;
UARTName uart;
uint32_t gclk_index;
uint32_t pm_index;
uint32_t sercom_index = 0;
uint32_t muxsetting = 0;
get_default_serial_values(obj);
pSERIAL_S(obj)->pins[USART_TX_INDEX] = tx;
pSERIAL_S(obj)->pins[USART_RX_INDEX] = rx;
pSERIAL_S(obj)->pins[USART_RXFLOW_INDEX] = NC;
pSERIAL_S(obj)->pins[USART_TXFLOW_INDEX] = NC;
muxsetting = serial_find_mux_settings(obj); // getting mux setting from pins
sercom_index = pinmap_merge_sercom(tx, rx); // same variable sercom_index reused for optimization
if (sercom_index == (uint32_t)NC) {
/*expecting a valid value for sercom index*/
return;
}
sercom_index &= 0x0F;
uart = (UARTName)pinmap_peripheral_sercom(NC, sercom_index);
pUSART_S(obj) = (Sercom *)uart;
/* Disable USART module */
disable_usart(obj);
#if (SAML21) || (SAMC20) || (SAMC21)
#if (SAML21)
if (sercom_index == 5) {
pm_index = MCLK_APBDMASK_SERCOM5_Pos;
gclk_index = SERCOM5_GCLK_ID_CORE;
} else {
pm_index = sercom_index + MCLK_APBCMASK_SERCOM0_Pos;
gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
}
#else
pm_index = sercom_index + MCLK_APBCMASK_SERCOM0_Pos;
gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
#endif
#else
pm_index = sercom_index + PM_APBCMASK_SERCOM0_Pos;
gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
#endif
if (_USART(obj).CTRLA.reg & SERCOM_USART_CTRLA_SWRST) {
return; /* The module is busy resetting itself */
}
if (_USART(obj).CTRLA.reg & SERCOM_USART_CTRLA_ENABLE) {
return; /* Check the module is enabled */
}
/* Turn on module in PM */
#if (SAML21)
if (sercom_index == 5) {
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBD, 1 << pm_index);
} else {
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, 1 << pm_index);
}
#else
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, 1 << pm_index);
#endif
/* Set up the GCLK for the module */
gclk_chan_conf.source_generator = GCLK_GENERATOR_0;
system_gclk_chan_set_config(gclk_index, &gclk_chan_conf);
system_gclk_chan_enable(gclk_index);
sercom_set_gclk_generator(GCLK_GENERATOR_0, false);
pSERIAL_S(obj)->mux_setting = muxsetting;
/* Set configuration according to the config struct */
usart_set_config_default(obj);
struct system_pinmux_config pin_conf;
pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
pin_conf.powersave = false;
/* Configure the SERCOM pins according to the user configuration */
for (uint8_t pad = 0; pad < 4; pad++) {
uint32_t current_pin = pSERIAL_S(obj)->pins[pad];
if (current_pin != (uint32_t)NC) {
pin_conf.mux_position = pinmap_function_sercom((PinName)current_pin, sercom_index);
if ((uint8_t)NC != pin_conf.mux_position) {
system_pinmux_pin_set_config(current_pin, &pin_conf);
}
}
}
if (uart == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
/* Wait until synchronization is complete */
usart_syncing(obj);
/* Enable USART module */
enable_usart(obj);
}
/** Set up the measurement and comparison timer events.
* - Configure the reference timer to generate an event upon comparison
* match with channel 0.
* - Configure the measurement timer to trigger a capture when an event is
* received.
*/
static void setup_tc_events(void)
{
/* Enable incoming events on on measurement timer */
struct tc_events events_calib = { .on_event_perform_action = true };
tc_enable_events(&tc_calib, &events_calib);
/* Generate events from the reference timer on channel 0 compare match */
struct tc_events events_comp = { .generate_event_on_compare_channel[0] = true };
tc_enable_events(&tc_comp, &events_comp);
tc_enable(&tc_calib);
tc_enable(&tc_comp);
}
/** Set up the event system, linking the measurement and comparison timers so
* that events generated from the reference timer are linked to the measurement
* timer.
*/
static void setup_events(struct events_resource *event)
{
struct events_config config;
events_get_config_defaults(&config);
/* The event channel detects rising edges of the reference timer output
* event */
config.edge_detect = EVENTS_EDGE_DETECT_RISING;
config.path = EVENTS_PATH_SYNCHRONOUS;
config.generator = CONF_EVENT_GENERATOR_ID;
events_allocate(event, &config);
events_attach_user(event, CONF_EVENT_USED_ID);
}
/** Set up the USART for transmit-only communication at a fixed baud rate. */
static void setup_usart_channel(void)
{
struct usart_config cdc_uart_config;
usart_get_config_defaults(&cdc_uart_config);
/* Configure the USART settings and initialize the standard I/O library */
cdc_uart_config.mux_setting = EDBG_CDC_SERCOM_MUX_SETTING;
cdc_uart_config.pinmux_pad0 = EDBG_CDC_SERCOM_PINMUX_PAD0;
cdc_uart_config.pinmux_pad1 = EDBG_CDC_SERCOM_PINMUX_PAD1;
cdc_uart_config.pinmux_pad2 = EDBG_CDC_SERCOM_PINMUX_PAD2;
cdc_uart_config.pinmux_pad3 = EDBG_CDC_SERCOM_PINMUX_PAD3;
cdc_uart_config.baudrate = 115200;
stdio_serial_init(&usart_edbg, EDBG_CDC_MODULE, &cdc_uart_config);
usart_enable(&usart_edbg);
}
/** Set up the clock output pin so that the current system clock frequency can
* be monitored via an external frequency counter or oscilloscope. */
static void setup_clock_out_pin(void)
{
struct system_pinmux_config pin_mux;
system_pinmux_get_config_defaults(&pin_mux);
/* MUX out the system clock to a I/O pin of the device */
pin_mux.mux_position = CONF_CLOCK_PIN_MUX;
system_pinmux_pin_set_config(CONF_CLOCK_PIN_OUT, &pin_mux);
}
/** Retrieves the current system clock frequency, computed from the reference
* clock.
*
* \return Current system clock frequency in Hz.
*/
static uint32_t get_osc_frequency(void)
{
/* Clear any existing match status on the measurement timer */
tc_clear_status(&tc_comp, TC_STATUS_CHANNEL_0_MATCH);
/* Restart both measurement and reference timers */
tc_start_counter(&tc_calib);
tc_start_counter(&tc_comp);
/* Wait for the measurement timer to signal a compare match */
while (!(tc_get_status(&tc_comp) & TC_STATUS_CHANNEL_0_MATCH)) {
/* Wait for channel 0 match */
}
/* Compute the real clock frequency from the measurement timer count and
* reference count */
uint64_t tmp = tc_get_capture_value(&tc_calib, TC_COMPARE_CAPTURE_CHANNEL_0);
return ((tmp * REFERENCE_CLOCK_HZ) >> CALIBRATION_RESOLUTION);
}
int main(void)
{
struct events_resource event;
/* System initialization */
system_init();
delay_init();
/* Module initialization */
setup_tc_channels();
setup_tc_events();
setup_events(&event);
setup_clock_out_pin();
/* Init the variables with default calibration settings */
uint8_t frange_cal = SYSCTRL->OSC8M.bit.FRANGE;
uint8_t temp_cal = SYSCTRL->OSC8M.bit.CALIB >> TEMP_CAL_OFFSET;
uint8_t comm_cal = SYSCTRL->OSC8M.bit.CALIB & COMM_CAL_MAX;
/* Set the calibration test range */
uint8_t frange_cal_min = max((frange_cal - CONF_FRANGE_CAL), FRANGE_CAL_MIN);
uint8_t frange_cal_max = min((frange_cal + CONF_FRANGE_CAL), FRANGE_CAL_MAX);
uint8_t temp_cal_min = max((temp_cal - CONF_TEMP_CAL), TEMP_CAL_MIN);
uint8_t temp_cal_max = min((temp_cal + CONF_TEMP_CAL), TEMP_CAL_MAX);
/* Variables to track the previous and best calibration settings */
uint16_t comm_best = 0;
uint8_t frange_best = 0;
uint32_t freq_best = 0;
uint32_t freq_before = get_osc_frequency();
/* Run calibration loop */
for (frange_cal = frange_cal_min; frange_cal <= frange_cal_max; frange_cal++) {
for (temp_cal = temp_cal_min; temp_cal <= temp_cal_max; temp_cal++) {
for (comm_cal = COMM_CAL_MIN; comm_cal <= COMM_CAL_MAX; comm_cal++) {
/* Set the test calibration values */
system_clock_source_write_calibration(
SYSTEM_CLOCK_SOURCE_OSC8M, (temp_cal << 7) | comm_cal, frange_cal);
/* Wait for stabilization */
delay_cycles(1000);
/* Compute the deltas of the current and best system clock
* frequencies, save current settings if they are closer to the
* ideal frequency than the previous best values
*/
uint32_t freq_current = get_osc_frequency();
if (abs(freq_current - TARGET_FREQUENCY) < abs(freq_best - TARGET_FREQUENCY)) {
freq_best = freq_current;
comm_best = comm_cal;
frange_best = frange_cal;
port_pin_set_output_level(LED_0_PIN, LED_0_ACTIVE);
} else {
port_pin_set_output_level(LED_0_PIN, !LED_0_ACTIVE);
}
}
}
}
/* Set the found best calibration values */
system_clock_source_write_calibration(
SYSTEM_CLOCK_SOURCE_OSC8M, (temp_cal << 7) | comm_best, frange_best);
/* Setup USART module to output results */
setup_usart_channel();
/* Write previous and current frequency and new calibration settings to the
* USART
*/
printf("Freq Before: %lu\r\n", freq_before);
printf("Freq Best: %lu\r\n", freq_best);
printf("Freq Range: %u\r\n", frange_best);
printf("Calib Value: 0x%x\r\n", (temp_cal << 7) | comm_best);
/* Rapidly flash the board LED to signal the calibration completion */
while (1) {
port_pin_toggle_output_level(LED_0_PIN);
delay_ms(200);
}
}
