static int mv88e1xxx_autoneg_enable(struct cphy *cphy) { mv88e1xxx_crossover_set(cphy, CROSSOVER_AUTO); /* restart autoneg for change to take effect */ return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, BMCR_ANENABLE | BMCR_ANRESTART); }
static int aq100x_autoneg_enable(struct cphy *phy) { int err = aq100x_power_down(phy, 0); if (!err) err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0, BMCR_ANENABLE | BMCR_ANRESTART); return err; }
static int tn1010_autoneg_restart(struct cphy *phy) { int err; err = tn1010_power_down(phy, 0); if (!err) err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0, BMCR_ANRESTART); return err; }
static int ael1002_power_down(struct cphy *phy, int enable) { int err; err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable); if (!err) err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, BMCR_PDOWN, enable ? BMCR_PDOWN : 0); return err; }
static int mv88e1xxx_downshift_set(struct cphy *cphy, int downshift_enable) { /* * Set the downshift counter to 2 so we try to establish Gb link * twice before downshifting. */ return t3_mdio_change_bits(cphy, 0, MV88E1XXX_EXT_SPECIFIC_CNTRL, V_DOWNSHIFT_ENABLE | V_DOWNSHIFT_CNT(M_DOWNSHIFT_CNT), downshift_enable ? V_DOWNSHIFT_ENABLE | V_DOWNSHIFT_CNT(2) : 0); }
static int aq100x_advertise(struct cphy *phy, unsigned int advertise_map) { unsigned int adv; int err; adv = 0; if (advertise_map & ADVERTISED_10000baseT_Full) adv |= ADV_10G_FULL; err = t3_mdio_change_bits(phy, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, ADV_10G_FULL, adv); if (err) return err; adv = 0; if (advertise_map & ADVERTISED_1000baseT_Full) adv |= ADV_1G_FULL; if (advertise_map & ADVERTISED_1000baseT_Half) adv |= ADV_1G_HALF; err = t3_mdio_change_bits(phy, MDIO_MMD_AN, AQ_1G_CTRL, ADV_1G_FULL | ADV_1G_HALF, adv); if (err) return err; adv = 0; if (advertise_map & ADVERTISED_100baseT_Half) adv |= ADVERTISE_100HALF; if (advertise_map & ADVERTISED_100baseT_Full) adv |= ADVERTISE_100FULL; if (advertise_map & ADVERTISED_Pause) adv |= ADVERTISE_PAUSE_CAP; if (advertise_map & ADVERTISED_Asym_Pause) adv |= ADVERTISE_PAUSE_ASYM; err = t3_mdio_change_bits(phy, MDIO_MMD_AN, MDIO_AN_ADVERTISE, 0xfe0, adv); return err; }
static int ael1002_reset(struct cphy *phy, int wait) { int err; if ((err = ael1002_power_down(phy, 0)) || (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) || (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) || (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) || (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) || (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN, 0, 1 << 5))) return err; return 0; }
static int set_phy_regs(struct cphy *phy, const struct reg_val *rv) { int err; for (err = 0; rv->mmd_addr && !err; rv++) { if (rv->clear_bits == 0xffff) err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr, rv->set_bits); else err = t3_mdio_change_bits(phy, rv->mmd_addr, rv->reg_addr, rv->clear_bits, rv->set_bits); } return err; }
static int vsc8211_autoneg_restart(struct cphy *cphy) { return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, BMCR_ANRESTART); }
static int tn1010_power_down(struct cphy *phy, int enable) { return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, BMCR_PDOWN, enable ? BMCR_PDOWN : 0); }
int t3_aq100x_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr, const struct mdio_ops *mdio_ops) { unsigned int v, v2, gpio, wait; int err; cphy_init(phy, adapter, phy_addr, &aq100x_ops, mdio_ops, SUPPORTED_1000baseT_Full | SUPPORTED_10000baseT_Full | SUPPORTED_TP | SUPPORTED_Autoneg | SUPPORTED_AUI, "1000/10GBASE-T"); /* * The PHY has been out of reset ever since the system powered up. So * we do a hard reset over here. */ gpio = phy_addr ? F_GPIO10_OUT_VAL : F_GPIO6_OUT_VAL; t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, 0); msleep(1); t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, gpio); /* * Give it enough time to load the firmware and get ready for mdio. */ msleep(1000); wait = 500; /* in 10ms increments */ do { err = mdio_read(phy, MDIO_DEV_VEND1, MII_BMCR, &v); if (err || v == 0xffff) { /* Allow prep_adapter to succeed when ffff is read */ CH_WARN(adapter, "PHY%d: reset failed (0x%x, 0x%x).\n", phy_addr, err, v); goto done; } v &= AQ_RESET; if (v) msleep(10); } while (v && --wait); if (v) { CH_WARN(adapter, "PHY%d: reset timed out (0x%x).\n", phy_addr, v); goto done; /* let prep_adapter succeed */ } /* Datasheet says 3s max but this has been observed */ wait = (500 - wait) * 10 + 1000; if (wait > 3000) CH_WARN(adapter, "PHY%d: reset took %ums\n", phy_addr, wait); /* Firmware version check. */ (void) mdio_read(phy, MDIO_DEV_VEND1, AQ_FW_VERSION, &v); if (v != 101) CH_WARN(adapter, "PHY%d: unsupported firmware %d\n", phy_addr, v); /* * The PHY should start in really-low-power mode. Prepare it for normal * operations. */ err = mdio_read(phy, MDIO_DEV_VEND1, MII_BMCR, &v); if (err) return err; if (v & AQ_LOWPOWER) { err = t3_mdio_change_bits(phy, MDIO_DEV_VEND1, MII_BMCR, AQ_LOWPOWER, 0); if (err) return err; msleep(10); } else CH_WARN(adapter, "PHY%d does not start in low power mode.\n", phy_addr); /* * Verify XAUI settings, but let prep succeed no matter what. */ v = v2 = 0; mdio_read(phy, MDIO_DEV_XGXS, AQ_XAUI_RX_CFG, &v); mdio_read(phy, MDIO_DEV_XGXS, AQ_XAUI_TX_CFG, &v2); if (v != 0x1b || v2 != 0x1b) CH_WARN(adapter, "PHY%d: incorrect XAUI settings (0x%x, 0x%x).\n", phy_addr, v, v2); done: return err; }
static int aq100x_set_loopback(struct cphy *phy, int mmd, int dir, int enable) { return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, BMCR_LOOPBACK, enable ? BMCR_LOOPBACK : 0); }
int t3_aq100x_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr, const struct mdio_ops *mdio_ops) { unsigned int v, v2, gpio, wait; int err; cphy_init(phy, adapter, phy_addr, &aq100x_ops, mdio_ops, SUPPORTED_1000baseT_Full | SUPPORTED_10000baseT_Full | SUPPORTED_TP | SUPPORTED_Autoneg | SUPPORTED_AUI, "1000/10GBASE-T"); gpio = phy_addr ? F_GPIO10_OUT_VAL : F_GPIO6_OUT_VAL; t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, 0); msleep(1); t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, gpio); msleep(1000); wait = 500; do { err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); if (err || v == 0xffff) { CH_WARN(adapter, "PHY%d: reset failed (0x%x, 0x%x).\n", phy_addr, err, v); goto done; } v &= AQ_RESET; if (v) msleep(10); } while (v && --wait); if (v) { CH_WARN(adapter, "PHY%d: reset timed out (0x%x).\n", phy_addr, v); goto done; } wait = (500 - wait) * 10 + 1000; if (wait > 3000) CH_WARN(adapter, "PHY%d: reset took %ums\n", phy_addr, wait); t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_FW_VERSION, &v); if (v != 101) CH_WARN(adapter, "PHY%d: unsupported firmware %d\n", phy_addr, v); err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); if (err) return err; if (v & AQ_LOWPOWER) { err = t3_mdio_change_bits(phy, MDIO_MMD_VEND1, MDIO_CTRL1, AQ_LOWPOWER, 0); if (err) return err; msleep(10); } else CH_WARN(adapter, "PHY%d does not start in low power mode.\n", phy_addr); v = v2 = 0; t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_RX_CFG, &v); t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_TX_CFG, &v2); if (v != 0x1b || v2 != 0x1b) CH_WARN(adapter, "PHY%d: incorrect XAUI settings (0x%x, 0x%x).\n", phy_addr, v, v2); done: return err; }
static int mv88e1xxx_set_loopback(struct cphy *cphy, int mmd, int dir, int on) { return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_LOOPBACK, on ? BMCR_LOOPBACK : 0); }
static int vsc8211_power_down(struct cphy *cphy, int enable) { return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN, enable ? BMCR_PDOWN : 0); }
static int aq100x_power_down(struct cphy *phy, int off) { return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, BMCR_PDOWN, off ? BMCR_PDOWN : 0); }
static int mv88e1xxx_crossover_set(struct cphy *cphy, int crossover) { return t3_mdio_change_bits(cphy, 0, MV88E1XXX_SPECIFIC_CNTRL, V_PSCR_MDI_XOVER_MODE(M_PSCR_MDI_XOVER_MODE), V_PSCR_MDI_XOVER_MODE(crossover)); }