コード例 #1
0
int main(void)
{
	/* Usual initializations */
	board_init();
	sysclk_init();
	sleepmgr_init();
	irq_initialize_vectors();
	cpu_irq_enable();

	/* Unmask clock for TCC4 */
	tc45_enable(&TCC4);

	/* Configure TC in normal mode */
	tc45_set_wgm(&TCC4, TC45_WG_NORMAL);

	/* Configure period equal to resolution to obtain 1Hz */
	tc45_write_period(&TCC4, TIMER_EXAMPLE_RESOLUTION);

	/* Configure CCA to occur at the middle of TC period */
	tc45_write_cc(&TCC4, TC45_CCA, TIMER_EXAMPLE_RESOLUTION / 2);

	/* Configure CCB to occur at the quarter of TC period */
	tc45_write_cc(&TCC4, TC45_CCB, TIMER_EXAMPLE_RESOLUTION / 4);

	/* Enable both CCA and CCB channels */
	tc45_enable_cc_channels(&TCC4, TC45_CCACOMP);
	tc45_enable_cc_channels(&TCC4, TC45_CCBCOMP);

	/*
	 * Configure interrupts callback functions for TCC4
	 * overflow interrupt, CCA interrupt and CCB interrupt
	 */
	tc45_set_overflow_interrupt_callback(&TCC4,
			example_ovf_interrupt_callback);
	tc45_set_cca_interrupt_callback(&TCC4,
			example_cca_interrupt_callback);
	tc45_set_ccb_interrupt_callback(&TCC4,
			example_ccb_interrupt_callback);

	/*
	 * Enable TC interrupts (overflow, CCA and CCB)
	 */
	tc45_set_overflow_interrupt_level(&TCC4, TC45_INT_LVL_LO);
	tc45_set_cca_interrupt_level(&TCC4, TC45_INT_LVL_LO);
	tc45_set_ccb_interrupt_level(&TCC4, TC45_INT_LVL_LO);

	/*
	 * Run TCC4 
	 */
	tc45_set_resolution(&TCC4, TIMER_EXAMPLE_RESOLUTION);

	do {
		/* Go to sleep, everything is handled by interrupts. */
		sleepmgr_enter_sleep();
	} while (1);
}
コード例 #2
0
int main(void)
{
	/* Usual initializations */
	board_init();
	sysclk_init();
	sleepmgr_init();
	irq_initialize_vectors();
	cpu_irq_enable();
        
	/*
	 * Configure TCC4 to generate 50ms overflow interrupt
	 * using 500kHz (2us) resolution clock (50ms = 25000 * 2us)
	 */
	/* Unmask clock for TCC4 */
	tc45_enable(&TCC4);
	/* Enable overflow interrupt */
	tc45_set_overflow_interrupt_level(&TCC4, TC45_INT_LVL_LO);
	/* Configure TC in normal mode */
	tc45_set_wgm(&TCC4, TC45_WG_NORMAL);
	/* Configure call back interrupt */
	tc45_set_overflow_interrupt_callback(&TCC4,
			example_overflow_interrupt_callback);
	/* Configure TC period and resolution */
	tc45_write_period(&TCC4, 25000);
	tc45_set_resolution(&TCC4, 500000);

	/*
	 * Configure TCD5 to generate 2ms Single Slope PWM
	 */
	/* Unmask clock for TCD5 */
	tc45_enable(&TCD5);
	/* Configure TC in PWM Single Slope PWM */
	tc45_set_wgm(&TCD5, TC45_WG_SS);
	/* Use the max period (2MHz / FFFFh = 30Hz) */
	tc45_write_period(&TCC4, 0xFFFF);
	/* Initialize and enable Channel A */
	tc45_write_cc(&TCD5, TC45_CCA, 0);
	tc45_enable_cc_channels(&TCD5, TC45_CCACOMP);
	/* Run TC at 2MHz clock resolution (CPU frequency 32MHz) */
	tc45_set_resolution(&TCD5, 20000000);

	do {
		/* Go to sleep, everything is handled by interrupts. */
		sleepmgr_enter_sleep();
	} while (1);
}
コード例 #3
0
/**
 * \brief This function configure and start timer1,which is TC4
 *  - Enable timer-1
 *  - Configure as pulse-width capture event action with event channel 1
 *    as event selection
 *  - Configure clock source as system clock with prescalar 1 and start on
 *    next event
 *  - Enable capture channel A
 */
void rtccalib_config_start_timer_one(void)
{
	/* Enable Timer-1 */
	tc45_enable(&TIMER1_FOR_CALIB);

	/* Configure event action as pulse-width capture with event channel 1
	 * as event selection */
	tc45_set_input_capture(&TIMER1_FOR_CALIB, TC45_EVSEL_CH1_gc,
			TC45_EVACT_PWF_gc);

	/* Configure timer-1 clock source */
	tc45_write_clock_source(&TIMER1_FOR_CALIB, TC45_CLKSEL_DIV1_gc);

	/* Configure to start on next event */
	tc45_set_evstart(&TIMER1_FOR_CALIB);

	/* Enable capture channel A */
	tc45_enable_cc_channels(&TIMER1_FOR_CALIB, TC45_CCACAPT);
}
コード例 #4
0
int main(void)
{
	uint8_t otmx_mode_index = 0;
	bool btn_released = true;

	/* Usual initializations */
	board_init();
	sysclk_init();
	sleepmgr_init();
	irq_initialize_vectors();
	cpu_irq_enable();

	/* Enables the Timers defined in conf_example.h : TCC4 (1) and TCC5 (2)
	 *in this example */
	tc45_enable(&TCC4);
	tc45_enable(&TCC5);

	/* Configures the interrupt level of CCA and CCB modules of the 2
	 *Timers: low */
	tc45_set_cca_interrupt_level(&TCC4, TC45_INT_LVL_LO);
	tc45_set_ccb_interrupt_level(&TCC4, TC45_INT_LVL_LO);
	tc45_set_cca_interrupt_level(&TCC5, TC45_INT_LVL_LO);
	tc45_set_ccb_interrupt_level(&TCC5, TC45_INT_LVL_LO);

	/* Declares the interrupt functions which will be called when CCA and
	 * CCB
	 * interrupts will occur */
	tc45_set_cca_interrupt_callback(&TCC4,
			example_cca_tcc4_interrupt_callback);
	tc45_set_ccb_interrupt_callback(&TCC4,
			example_ccb_tcc4_interrupt_callback);
	tc45_set_cca_interrupt_callback(&TCC5,
			example_cca_tcc5_interrupt_callback);
	tc45_set_ccb_interrupt_callback(&TCC5,
			example_ccb_tcc5_interrupt_callback);

	/* Configures the Timer periods*/
	tc45_write_period(&TCC4, TIMER_TCC4_PERIOD);
	tc45_write_period(&TCC5, TIMER_TCC5_PERIOD);

	/* Configures the CCA and CCB levels*/
	tc45_write_cc(&TCC4, TC45_CCA, TIMER_TCC4_PERIOD / 2);
	tc45_write_cc(&TCC4, TC45_CCB, TIMER_TCC4_PERIOD / 2);
	tc45_write_cc(&TCC5, TC45_CCA, TIMER_TCC5_PERIOD / 4);
	tc45_write_cc(&TCC5, TC45_CCB, TIMER_TCC5_PERIOD / 4);

	/* Enables the CCA and CCB channels*/
	tc45_enable_cc_channels(&TCC4, TC45_CCACOMP);
	tc45_enable_cc_channels(&TCC4, TC45_CCBCOMP);
	tc45_enable_cc_channels(&TCC5, TC45_CCACOMP);
	tc45_enable_cc_channels(&TCC5, TC45_CCBCOMP);

	/* Configures the waveform genertaor in Dual Slope mode and Top*/
	tc45_set_wgm(&TCC4, TC45_WG_DS_T);
	tc45_set_wgm(&TCC5, TC45_WG_DS_T);

	tc45_set_resolution(&TCC4, TIMER_TCC4_TCC5_RESOLUTION);
	tc45_set_resolution(&TCC5, TIMER_TCC4_TCC5_RESOLUTION);

	 while (1) {
		/* Go to sleep, everything is handled by interrupts. */
		sleepmgr_enter_sleep();

		/* Configures the Output Matrix mode */
		if (gpio_pin_is_high(GPIO_PUSH_BUTTON_0)) {
			/* button released */
			btn_released = true;
			continue;
		}

		/* button pressed */
		if (!btn_released) {
			/* Wait release of button */
			continue;
		}
		btn_released = false;

		/* Change OTMX mode */
		otmx_mode_index++;
		switch (otmx_mode_index) {
		case 0:
			tc45_wex_set_otmx(&WEXC, WEX_OTMX_DEFAULT);
			break;

		case 1:
			tc45_wex_set_otmx(&WEXC, WEX_OTMX_1);
			break;

		case 2:
			tc45_wex_set_otmx(&WEXC, WEX_OTMX_2);
			break;

		case 3:
			tc45_wex_set_otmx(&WEXC, WEX_OTMX_3);
			break;

		case 4:
			tc45_wex_set_otmx(&WEXC, WEX_OTMX_4);
			break;

		default:
			otmx_mode_index = -1;
			break;
		}
	}
}