static int tegra_max98088_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_card *card = codec->card;
struct tegra_max98088 *machine = snd_soc_card_get_drvdata(card);
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
#endif
int srate, mclk, sample_size, i2s_daifmt;
int err;
struct clk *clk;
int rate;
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
sample_size = 16;
break;
default:
return -EINVAL;
}
srate = params_rate(params);
switch (srate) {
case 8000:
case 16000:
case 24000:
case 32000:
case 48000:
case 64000:
case 96000:
mclk = 12288000;
break;
case 11025:
case 22050:
case 44100:
case 88200:
mclk = 11289600;
break;
default:
mclk = 12000000;
break;
}
#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
clk = clk_get_sys(NULL, "cdev1");
#else
clk = clk_get_sys("extern1", NULL);
#endif
if (IS_ERR(clk)) {
dev_err(card->dev, "Can't retrieve clk cdev1\n");
err = PTR_ERR(clk);
return err;
}
rate = clk_get_rate(clk);
printk("extern1 rate=%d\n",rate);
#if TEGRA30_I2S_MASTER_PLAYBACK
i2s_daifmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
SND_SOC_DAIFMT_CBS_CFS;
#else
i2s_daifmt = SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF |
SND_SOC_DAIFMT_CBM_CFM;
mclk = rate;
#endif
err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
if (err < 0) {
if (!(machine->util_data.set_mclk % mclk))
mclk = machine->util_data.set_mclk;
else {
dev_err(card->dev, "Can't configure clocks\n");
return err;
}
}
tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
err = snd_soc_dai_set_fmt(codec_dai,i2s_daifmt);
if (err < 0) {
dev_err(card->dev, "codec_dai fmt not set\n");
return err;
}
err = snd_soc_dai_set_fmt(cpu_dai, i2s_daifmt);
if (err < 0) {
dev_err(card->dev, "cpu_dai fmt not set\n");
return err;
}
err = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,
SND_SOC_CLOCK_IN);
if (err < 0) {
dev_err(card->dev, "codec_dai clock not set\n");
return err;
}
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
tegra_max98088_set_dam_cif(i2s->dam_ifc, srate,
params_channels(params), sample_size, 0, 0, 0, 0);
#endif
return 0;
}
static int tegra_aic326x_voice_call_hw_params(
struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_card *card = codec->card;
struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
struct tegra_asoc_platform_data *pdata = machine->pdata;
int srate, mclk, rate, i2s_daifmt;
int err, pcmdiv, vxclkdiv;
srate = params_rate(params);
mclk = tegra_aic326x_get_mclk(srate);
if (mclk < 0)
return mclk;
i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
i2s_daifmt |= pdata->i2s_param[VOICE_CODEC].is_i2s_master ?
SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
switch (pdata->i2s_param[VOICE_CODEC].i2s_mode) {
case TEGRA_DAIFMT_I2S:
i2s_daifmt |= SND_SOC_DAIFMT_I2S;
break;
case TEGRA_DAIFMT_DSP_A:
i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
break;
case TEGRA_DAIFMT_DSP_B:
i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
break;
case TEGRA_DAIFMT_LEFT_J:
i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
break;
case TEGRA_DAIFMT_RIGHT_J:
i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
break;
default:
dev_err(card->dev,
"Can't configure i2s format\n");
return -EINVAL;
}
err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
if (err < 0) {
if (!(machine->util_data.set_mclk % mclk))
mclk = machine->util_data.set_mclk;
else {
dev_err(card->dev, "Can't configure clocks\n");
return err;
}
}
tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
rate = clk_get_rate(machine->util_data.clk_cdev1);
err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
if (err < 0) {
dev_err(card->dev, "codec_dai fmt not set\n");
return err;
}
err = snd_soc_dai_set_pll(codec_dai, 0, AIC3262_PLL_CLKIN_MCLK1 , rate,
params_rate(params));
if (err < 0) {
dev_err(card->dev, "codec_dai PLL clock not set\n");
return err;
}
if (!machine_is_tegra_enterprise()) {
if (params_rate(params) == 8000) {
/* Change these Settings for 8KHz*/
pcmdiv = 1;
/* BB expecting 2048Khz bclk */
vxclkdiv = 27;
} else if (params_rate(params) == 16000) {
pcmdiv = 1;
/* BB expecting 2048Khz bclk */
vxclkdiv = 27;
} else {
dev_err(card->dev, "codec_dai unsupported voice rate\n");
return -EINVAL;
}
}
//snd_soc_dai_set_clkdiv(codec_dai, ASI2_BCLK_N, vxclkdiv);
//snd_soc_dai_set_clkdiv(codec_dai, ASI2_WCLK_N, pcmdiv);
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
/* codec configuration */
machine->codec_info[VOICE_CODEC].rate = params_rate(params);
machine->codec_info[VOICE_CODEC].channels = params_channels(params);
#endif
machine->is_device_bt = 0;
return 0;
}
static int tegra_aic326x_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_card *card = codec->card;
struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
struct tegra_asoc_platform_data *pdata = machine->pdata;
int srate, mclk, sample_size, i2s_daifmt;
int err, rate;
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
sample_size = 16;
break;
default:
return -EINVAL;
}
srate = params_rate(params);
mclk = tegra_aic326x_get_mclk(srate);
if (mclk < 0)
return mclk;
i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
i2s_daifmt |= pdata->i2s_param[HIFI_CODEC].is_i2s_master ?
SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
switch (pdata->i2s_param[HIFI_CODEC].i2s_mode) {
case TEGRA_DAIFMT_I2S :
i2s_daifmt |= SND_SOC_DAIFMT_I2S;
break;
case TEGRA_DAIFMT_DSP_A :
i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
break;
case TEGRA_DAIFMT_DSP_B :
i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
break;
case TEGRA_DAIFMT_LEFT_J :
i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
break;
case TEGRA_DAIFMT_RIGHT_J :
i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
break;
default :
dev_err(card->dev, "Can't configure i2s format\n");
return -EINVAL;
}
err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
if (err < 0) {
if (!(machine->util_data.set_mclk % mclk))
mclk = machine->util_data.set_mclk;
else {
dev_err(card->dev, "Can't configure clocks\n");
return err;
}
}
tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
rate = clk_get_rate(machine->util_data.clk_cdev1);
err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
if (err < 0) {
dev_err(card->dev, "codec_dai fmt not set\n");
return err;
}
err = snd_soc_dai_set_fmt(cpu_dai, i2s_daifmt);
if (err < 0) {
dev_err(card->dev, "cpu_dai fmt not set\n");
return err;
}
err = snd_soc_dai_set_pll(codec_dai, 0, AIC3262_PLL_CLKIN_MCLK1 , rate,
params_rate(params));
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
err = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAP_SEL_DAC1,
TEGRA20_DAS_DAP_ID_1);
if (err < 0) {
dev_err(card->dev, "failed to set dap-dac path\n");
return err;
}
err = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_1,
TEGRA20_DAS_DAP_SEL_DAC1);
if (err < 0) {
dev_err(card->dev, "failed to set dac-dap path\n");
return err;
}
#endif
return 0;
}
static int tegra_aic326x_bt_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_card *card = rtd->card;
struct tegra_aic326x *machine = snd_soc_card_get_drvdata(card);
struct tegra_asoc_platform_data *pdata = machine->pdata;
int err, srate, mclk, min_mclk, sample_size, i2s_daifmt;
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai);
#endif
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
sample_size = 16;
break;
default:
return -EINVAL;
}
srate = params_rate(params);
mclk = tegra_aic326x_get_mclk(srate);
if (mclk < 0)
return mclk;
min_mclk = 64 * srate;
err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
if (err < 0) {
if (!(machine->util_data.set_mclk % min_mclk))
mclk = machine->util_data.set_mclk;
else {
dev_err(card->dev, "Can't configure clocks\n");
return err;
}
}
tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
i2s_daifmt |= pdata->i2s_param[BT_SCO].is_i2s_master ?
SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
switch (pdata->i2s_param[BT_SCO].i2s_mode) {
case TEGRA_DAIFMT_I2S :
i2s_daifmt |= SND_SOC_DAIFMT_I2S;
break;
case TEGRA_DAIFMT_DSP_A :
i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
break;
case TEGRA_DAIFMT_DSP_B :
i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
break;
case TEGRA_DAIFMT_LEFT_J :
i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
break;
case TEGRA_DAIFMT_RIGHT_J :
i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
break;
default :
dev_err(card->dev, "Can't configure i2s format\n");
return -EINVAL;
}
err = snd_soc_dai_set_fmt(rtd->cpu_dai, i2s_daifmt);
if (err < 0) {
dev_err(rtd->codec->card->dev, "cpu_dai fmt not set\n");
return err;
}
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
err = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAP_SEL_DAC2,
TEGRA20_DAS_DAP_ID_4);
if (err < 0) {
dev_err(card->dev, "failed to set dac-dap path\n");
return err;
}
err = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_4,
TEGRA20_DAS_DAP_SEL_DAC2);
if (err < 0) {
dev_err(card->dev, "failed to set dac-dap path\n");
return err;
}
#else
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && i2s->is_dam_used)
tegra_aic326x_set_dam_cif(i2s->dam_ifc, params_rate(params),
params_channels(params), sample_size, 0, 0, 0, 0);
#endif
return 0;
}
static int tegra_p1852_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_card *card = codec->card;
struct tegra_p1852 *machine = snd_soc_card_get_drvdata(card);
int srate, mclk;
int i2s_daifmt = 0;
int err;
struct tegra_p1852_platform_data *pdata;
int codec_id = codec_dai->id;
pdata = machine->pdata;
srate = params_rate(params);
switch (srate) {
case 64000:
case 88200:
case 96000:
mclk = 128 * srate;
break;
default:
mclk = 256 * srate;
break;
}
err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
if (err < 0) {
if (!(machine->util_data.set_mclk % mclk))
mclk = machine->util_data.set_mclk;
else {
dev_err(card->dev, "Can't configure clocks\n");
return err;
}
}
tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
if (pdata->codec_info[codec_id].master)
i2s_daifmt |= SND_SOC_DAIFMT_CBM_CFM;
else
i2s_daifmt |= SND_SOC_DAIFMT_CBS_CFS;
switch (pdata->codec_info[codec_id].i2s_format) {
case format_tdm:
i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
break;
case format_i2s:
i2s_daifmt |= SND_SOC_DAIFMT_I2S;
break;
case format_rjm:
i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
break;
case format_ljm:
i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
break;
default:
break;
}
err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
if (err < 0)
dev_info(card->dev, "codec_dai fmt not set\n");
err = snd_soc_dai_set_fmt(cpu_dai, i2s_daifmt);
if (err < 0) {
dev_err(card->dev, "cpu_dai fmt not set\n");
return err;
}
err = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,
SND_SOC_CLOCK_IN);
if (err < 0)
dev_info(card->dev, "codec_dai clock not set\n");
return 0;
}
