void platform_cpu_die(unsigned int cpu)
{
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
/* Flush the L1 data cache. */
flush_cache_all();
/* Place the current CPU in reset. */
tegra2_hotplug_shutdown();
#else
/* Disable GIC CPU interface for this CPU. */
tegra_gic_cpu_disable();
/* Tegra3 enters LPx states via WFI - do not propagate legacy IRQs
to CPU core to avoid fall through WFI; then GIC output will be
enabled, however at this time - CPU is dying - no interrupt should
have affinity to this CPU. */
tegra_gic_pass_through_disable();
/* Flush the L1 data cache. */
flush_cache_all();
/* Shut down the current CPU. */
tegra3_hotplug_shutdown();
#endif
/* Should never return here. */
BUG();
}
/*
* platform-specific code to shutdown a CPU
*
* Called with IRQs disabled
*/
void tegra_cpu_die(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
/* Disable GIC CPU interface for this CPU. */
tegra_gic_cpu_disable(false);
#endif
/* Flush the L1 data cache. */
tegra_flush_l1_cache();
/* Shut down the current CPU. */
tegra_hotplug_shutdown();
/* Clock gate the CPU */
tegra_wait_cpu_in_reset(cpu);
tegra_disable_cpu_clock(cpu);
/* Should never return here. */
BUG();
}
