/* * Let's power down on idle, but only if we are really * idle, because once we start down the path of * going idle we continue to do idle even if we get * a clock tick interrupt . . */ void omap_pm_idle(void) { int (*func_ptr)(void) = 0; unsigned int mask32 = 0; /* * If the DSP is being used let's just idle the CPU, the overhead * to wake up from Big Sleep is big, milliseconds versus micro * seconds for wait for interrupt. */ local_irq_disable(); local_fiq_disable(); if (need_resched()) { local_fiq_enable(); local_irq_enable(); return; } mask32 = omap_readl(ARM_SYSST); /* * Since an interrupt may set up a timer, we don't want to * reprogram the hardware timer with interrupts enabled. * Re-enable interrupts only after returning from idle. */ timer_dyn_reprogram(); if ((mask32 & DSP_IDLE) == 0) { __asm__ volatile ("mcr p15, 0, r0, c7, c0, 4"); } else {
static void magus_pm_idle(void) { int do_sleep; void (*magus_idle_loop_suspend_ptr) (void); local_irq_disable(); local_fiq_disable(); if (need_resched()) { local_fiq_enable(); local_irq_enable(); return; } /* * Since an interrupt may set up a timer, we don't want to * reprogram the hardware timer with interrupts enabled. * Re-enable interrupts only after returning from idle. */ timer_dyn_reprogram(); do_sleep = 0; while (enable_dyn_sleep) { do_sleep = 1; break; } if(do_sleep){ stat_idle_times ++; /*saving portion of SRAM to be used by suspend function. */ memcpy(saved_sram, (void *)SRAM_VA, magus_idle_loop_suspend_sz); /*make sure SRAM copy gets physically written into SDRAM. SDRAM will be placed into self-refresh during power down */ flush_cache_all(); /*copy suspend function into SRAM */ memcpy((void *)SRAM_VA, magus_idle_loop_suspend, magus_idle_loop_suspend_sz); /*do suspend */ magus_idle_loop_suspend_ptr = (void *)SRAM_VA; magus_idle_loop_suspend_ptr(); //omap2_sram_idle(); /*restoring portion of SRAM that was used by suspend function */ memcpy((void *)SRAM_VA, saved_sram, magus_idle_loop_suspend_sz); local_fiq_enable(); local_irq_enable(); return; } local_fiq_enable(); local_irq_enable(); }
void omap2_pm_idle(void) { local_irq_disable(); local_fiq_disable(); if (need_resched() || need_resched_delayed()) { local_fiq_enable(); local_irq_enable(); return; } /* * Since an interrupt may set up a timer, we don't want to * reprogram the hardware timer with interrupts enabled. * Re-enable interrupts only after returning from idle. */ timer_dyn_reprogram(); omap2_sram_idle(); local_fiq_enable(); local_irq_enable(); }
/* * Let's power down on idle, but only if we are really * idle, because once we start down the path of * going idle we continue to do idle even if we get * a clock tick interrupt . . */ void omap_pm_idle(void) { unsigned int mask32 = 0; /* * If the DSP is being used let's just idle the CPU, the overhead * to wake up from Big Sleep is big, milliseconds versus micro * seconds for wait for interrupt. */ local_irq_disable(); local_fiq_disable(); if (need_resched()) { local_fiq_enable(); local_irq_enable(); return; } mask32 = omap_readl(ARM_SYSST); /* * Prevent the ULPD from entering low power state by setting * POWER_CTRL_REG:4 = 0 */ omap_writew(omap_readw(ULPD_POWER_CTRL) & ~ULPD_DEEP_SLEEP_TRANSITION_EN, ULPD_POWER_CTRL); /* * Since an interrupt may set up a timer, we don't want to * reprogram the hardware timer with interrupts enabled. * Re-enable interrupts only after returning from idle. */ timer_dyn_reprogram(); if ((mask32 & DSP_IDLE) == 0) { __asm__ volatile ("mcr p15, 0, r0, c7, c0, 4"); } else
/* * Let's power down on idle, but only if we are really * idle, because once we start down the path of * going idle we continue to do idle even if we get * a clock tick interrupt . . */ void omap_pm_idle(void) { extern __u32 arm_idlect1_mask; __u32 use_idlect1 = arm_idlect1_mask; int do_sleep = 0; local_irq_disable(); local_fiq_disable(); if (need_resched()) { local_fiq_enable(); local_irq_enable(); return; } /* * Since an interrupt may set up a timer, we don't want to * reprogram the hardware timer with interrupts enabled. * Re-enable interrupts only after returning from idle. */ timer_dyn_reprogram(); #ifdef CONFIG_OMAP_MPU_TIMER #warning Enable 32kHz OS timer in order to allow sleep states in idle use_idlect1 = use_idlect1 & ~(1 << 9); #else while (enable_dyn_sleep) { #ifdef CONFIG_CBUS_TAHVO_USB extern int vbus_active; /* Clock requirements? */ if (vbus_active) break; #endif do_sleep = 1; break; } #endif #ifdef CONFIG_OMAP_DM_TIMER use_idlect1 = omap_dm_timer_modify_idlect_mask(use_idlect1); #endif if (omap_dma_running()) use_idlect1 &= ~(1 << 6); /* We should be able to remove the do_sleep variable and multiple * tests above as soon as drivers, timer and DMA code have been fixed. * Even the sleep block count should become obsolete. */ if ((use_idlect1 != ~0) || !do_sleep) { __u32 saved_idlect1 = omap_readl(ARM_IDLECT1); if (cpu_is_omap15xx()) use_idlect1 &= OMAP1510_BIG_SLEEP_REQUEST; else use_idlect1 &= OMAP1610_IDLECT1_SLEEP_VAL; omap_writel(use_idlect1, ARM_IDLECT1); __asm__ volatile ("mcr p15, 0, r0, c7, c0, 4"); omap_writel(saved_idlect1, ARM_IDLECT1); local_fiq_enable(); local_irq_enable(); return; }