int arch_cpu_init(void)
{
struct pci_controller *hose;
int ret;
post_code(POST_CPU_INIT);
#ifdef CONFIG_SYS_X86_TSC_TIMER
timer_set_base(rdtsc());
#endif
ret = x86_cpu_init_f();
if (ret)
return ret;
ret = pci_early_init_hose(&hose);
if (ret)
return ret;
/*
* Quark SoC has some non-standard BARs (excluding PCI standard BARs)
* which need be initialized with suggested values
*/
quark_setup_bars();
/* Turn on legacy segments (A/B/E/F) decode to system RAM */
quark_enable_legacy_seg();
unprotect_spi_flash();
return 0;
}
int arch_cpu_init(void)
{
int ret;
post_code(POST_CPU_INIT);
#ifdef CONFIG_SYS_X86_TSC_TIMER
timer_set_base(rdtsc());
#endif
ret = x86_cpu_init_f();
if (ret)
return ret;
/*
* Quark SoC does not support MSR MTRRs. Fixed and variable range MTRRs
* are accessed indirectly via the message port and not the traditional
* MSR mechanism. Only UC, WT and WB cache types are supported.
*/
quark_setup_mtrr();
/*
* Quark SoC has some non-standard BARs (excluding PCI standard BARs)
* which need be initialized with suggested values
*/
quark_setup_bars();
/*
* Initialize PCIe controller
*
* Quark SoC holds the PCIe controller in reset following a power on.
* U-Boot needs to release the PCIe controller from reset. The PCIe
* controller (D23:F0/F1) will not be visible in PCI configuration
* space and any access to its PCI configuration registers will cause
* system hang while it is held in reset.
*/
quark_pcie_early_init();
/* Initialize USB2 PHY */
quark_usb_early_init();
/* Initialize thermal sensor */
quark_thermal_early_init();
/* Turn on legacy segments (A/B/E/F) decode to system RAM */
quark_enable_legacy_seg();
unprotect_spi_flash();
return 0;
}
int arch_cpu_init(void)
{
int ret;
post_code(POST_CPU_INIT);
#ifdef CONFIG_SYS_X86_TSC_TIMER
timer_set_base(rdtsc());
#endif
ret = x86_cpu_init_f();
if (ret)
return ret;
return 0;
}
int arch_cpu_init(void)
{
struct pci_controller *hose;
int ret;
post_code(POST_CPU_INIT);
#ifdef CONFIG_SYS_X86_TSC_TIMER
timer_set_base(rdtsc());
#endif
ret = x86_cpu_init_f();
if (ret)
return ret;
ret = pci_early_init_hose(&hose);
if (ret)
return ret;
unprotect_spi_flash();
return 0;
}
static void timer_reg_cb(uint32_t addr, uint32_t len)
{
(void)len;
timer_set_base(addr);
}
/*
---------------------------------------
文件处理回调
---------------------------------------
*/
static bool_t hasher (void_t *param, sSEARCHa *info)
{
sHASH hash;
/* 过滤掉两个生成的文件 */
if (str_cmpA(info->name, "__hash__.old") == 0 ||
str_cmpA(info->name, "__hash__.txt") == 0)
return (TRUE);
/* 显示文件名和大小字节数 */
printf("%s (%" CR_FSZ "u Bytes) ", info->name, info->size);
/* 根据内存大小选择读取方式 */
timer_set_base(s_profile);
if (info->size == 0)
{
/* 空文件 */
hash_init(&hash);
hash_update(&hash, NULL, 0);
hash_finish(param, info->size, info->name, &hash);
}
else if (info->size <= s_total)
{
sVFILE file;
void_t *data;
/* 内存映射 */
data = file_mappingA(info->name, &file);
if (data == NULL)
goto _read_it;
hash_init(&hash);
hash_update(&hash, data, (leng_t)info->size);
hash_finish(param, info->size, info->name, &hash);
file_release(&file);
}
else
{
fraw_t file;
leng_t rest;
fsize_t blks;
_read_it: /* 分块读取 */
file = file_raw_openA(info->name, CR_FO_RO | CR_FO_SEQ);
if (file == NULL)
goto _failure;
/* 文件很大, 只能分块读取 */
if (s_rdata == NULL)
s_rdata = mem_malloc(FREAD_BLOCK);
rest = ( leng_t)(info->size % FREAD_BLOCK);
blks = (fsize_t)(info->size / FREAD_BLOCK);
for (hash_init(&hash); blks != 0; blks--) {
if (file_raw_read(s_rdata, FREAD_BLOCK, file) != FREAD_BLOCK) {
file_raw_close(file);
goto _failure;
}
hash_update(&hash, s_rdata, FREAD_BLOCK);
}
if (rest != 0) {
if (file_raw_read(s_rdata, rest, file) != rest) {
file_raw_close(file);
goto _failure;
}
hash_update(&hash, s_rdata, rest);
}
hash_finish(param, info->size, info->name, &hash);
file_raw_close(file);
}
fp32_t time;
time = timer_get_delta(s_profile);
time *= 1.024f;
printf(" %.2f KB/S\n", info->size / time);
return (TRUE);
_failure:
printf(" [FAILED]\n");
return (TRUE);
}
