int snd_init_firmware(const char *filename) { file_t f; size_t sz; uint8 *buff; f = fs_open(filename, O_RDONLY); if(f < 0) { ds_printf("DS_ERROR: Can't open firmware %s\n", filename); return -1; } sz = fs_total(f); ds_printf("DS_PROCESS: Loading firmware %s (%d bytes) into SPU RAM\n", filename, sz); buff = (uint8*)malloc(sz); fs_read(f, buff, sz); fs_close(f); spu_disable(); spu_memset(0, 0, AICA_RAM_START); spu_memload(0, buff, sz); /* Enable the AICA and give it a few ms to start up */ spu_enable(); timer_spin_sleep(10); /* Initialize the RAM allocator */ snd_mem_init(AICA_RAM_START); return 0; }
/* Initialize driver; note that this replaces the AICA program so that if you had anything else going on, it's gone now! */ int snd_init() { int amt; /* Finish loading the stream driver */ if (!initted) { spu_disable(); spu_memset(0, 0, AICA_RAM_START); amt = snd_stream_drv_end - snd_stream_drv; if (amt % 4) amt = (amt + 4) & ~3; printf("snd_init(): loading %d bytes into SPU RAM\n", amt); spu_memload(0, snd_stream_drv, amt); /* Enable the AICA and give it a few ms to start up */ spu_enable(); timer_spin_sleep(10); /* Initialize the RAM allocator */ snd_mem_init(AICA_RAM_START); /* Setup semaphores */ sem_qram = sem_create(1); } initted = 1; return 0; }
/* Send a command (including unlock) */ static void send_cmd(bflash_dev_t *dev, uint16 cmd) { if(dev->unlock[0] == ADDR_UNLOCK_1_JEDEC) { // int old = irq_disable(); switch(cmd) { case CMD_MANUFACTURER_UNLOCK_DATA: send_unlock_jedec(dev); flashport[dev->unlock[0]] = cmd; timer_spin_sleep(10); // Same as jedec_delay(10000); break; case CMD_RESET_DATA: send_unlock_jedec(dev); flashport[dev->unlock[0]] = cmd; jedec_delay(40); case CMD_PROGRAM_UNLOCK_DATA: send_unlock(dev); flashport[dev->unlock[0]] = cmd; default: send_unlock_jedec(dev); flashport[dev->unlock[0]] = cmd; jedec_delay(10); break; } // irq_restore(old); } else { send_unlock(dev); flashport[dev->unlock[0]] = cmd; } }
int sdc_init(void) { int i; uint8 n, ty = 0, ocr[4]; if(initted) return 0; if(spi_init(0)) { return -1; } timer_spin_sleep(20); SELECT(); /* 80 dummy clocks */ for (n = 10; n; n--) (void)spi_slow_sr_byte(0xff); if (send_slow_cmd(CMD0, 0) == 1) { /* Enter Idle state */ #ifdef SD_DEBUG dbglog(DBG_DEBUG, "%s: Enter Idle state\n", __func__); #endif timer_spin_sleep(20); // thd_sleep(100); i = 0; if (send_slow_cmd(CMD8, 0x1AA) == 1) { /* SDC Ver2+ */ for (n = 0; n < 4; n++) ocr[n] = spi_slow_sr_byte(0xff); if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */ do { /* ACMD41 with HCS bit */ if (send_slow_cmd(CMD55, 0) <= 1 && send_slow_cmd(CMD41, 1UL << 30) == 0) break; ++i; } while (i < 300000); if (i < 300000 && send_slow_cmd(CMD58, 0) == 0) { /* Check CCS bit */ for (n = 0; n < 4; n++) ocr[n] = spi_slow_sr_byte(0xff); ty = (ocr[0] & 0x40) ? 6 : 2; } } } else { /* SDC Ver1 or MMC */ ty = (send_slow_cmd(CMD55, 0) <= 1 && send_slow_cmd(CMD41, 0) <= 1) ? 2 : 1; /* SDC : MMC */ do { if (ty == 2) { if (send_slow_cmd(CMD55, 0) <= 1 && send_slow_cmd(CMD41, 0) == 0) /* ACMD41 */ break; } else { if (send_slow_cmd(CMD1, 0) == 0) { /* CMD1 */ is_mmc = 1; break; } } ++i; } while (i < 300000); if (!(i < 300000) || send_slow_cmd(CMD16, 512) != 0) /* Select R/W block length */ ty = 0; } } send_slow_cmd(CMD59, 1); // crc check #ifdef SD_DEBUG dbglog(DBG_DEBUG, "%s: card type = 0x%02x\n", __func__, ty & 0xff); #endif if(!(ty & 4)) { byte_mode = 1; } DESELECT(); (void)spi_slow_sr_byte(0xff); /* Idle (Release DO) */ if (ty) { /* Initialization succeded */ // sdc_print_ident(); initted = 1; return 0; } /* Initialization failed */ sdc_shutdown(); return -1; }
static void guard_irq_handler(irq_t source, irq_context_t *context) { dbglog(DBG_INFO, "\n=============== CATCHING EXCEPTION ===============\n"); irq_context_t *irq_ctx = irq_get_context(); if (source == EXC_FPU) { /* Display user friendly informations */ export_sym_t * symb; symb = export_lookup_by_addr(irq_ctx->pc); if (symb) { dbglog(DBG_INFO, "FPU EXCEPTION PC = %s + 0x%08x (0x%08x)\n", symb->name, ((int)irq_ctx->pc) - ((int)symb->ptr), (int)irq_ctx->pc); } /* skip the offending FPU instruction */ int *ptr = (int *)&irq_ctx->r[0x40/4]; *ptr += 4; return; } /* Display user friendly informations */ export_sym_t * symb; int i; uint32 *stk = (uint32 *)irq_ctx->r[15]; for (i = 15; i >= 0; i--) { if((stk[i] < 0x8c000000) || (stk[i] > 0x8d000000) || !(symb = export_lookup_by_addr(stk[i])) || ((int)stk[i] - ((int)symb->ptr) > 0x800)) { dbglog(DBG_INFO, "STACK#%2d = 0x%08x\n", i, (int)stk[i]); } else { dbglog(DBG_INFO, "STACK#%2d = 0x%08x (%s + 0x%08x)\n", i, (int)stk[i], symb->name, (int)stk[i] - ((int)symb->ptr)); } } symb = export_lookup_by_addr(irq_ctx->pc); if (symb && (int)stk[i] - ((int)symb->ptr) < 0x800) { dbglog(DBG_INFO, " PC = %s + 0x%08x (0x%08x)\n", symb->name, ((int)irq_ctx->pc) - ((int)symb->ptr), (int)irq_ctx->pc); } else { dbglog(DBG_INFO, " PC = 0x%08x\n", (int)irq_ctx->pc); } symb = export_lookup_by_addr(irq_ctx->pr); if (symb && (int)stk[i] - ((int)symb->ptr) < 0x800) { dbglog(DBG_INFO, " PR = %s + 0x%08x (0x%08x)\n", symb->name, ((int)irq_ctx->pr) - ((int)symb->ptr), (int)irq_ctx->pr); } else { dbglog(DBG_INFO, " PR = 0x%08x\n", (int)irq_ctx->pr); } uint32 *regs = irq_ctx->r; dbglog(DBG_INFO, " R0-R3 = %08lx %08lx %08lx %08lx\n", regs[0], regs[1], regs[2], regs[3]); dbglog(DBG_INFO, " R4-R7 = %08lx %08lx %08lx %08lx\n", regs[4], regs[5], regs[6], regs[7]); dbglog(DBG_INFO, " R8-R11 = %08lx %08lx %08lx %08lx\n", regs[8], regs[9], regs[10], regs[11]); dbglog(DBG_INFO, " R12-R15 = %08lx %08lx %08lx %08lx\n", regs[12], regs[13], regs[14], regs[15]); //arch_stk_trace_at(regs[14], 0); for (i = 0; exceptions_code[i].code; i++) { if (exceptions_code[i].code == source) { dbglog(DBG_INFO, " EVENT = %s (0x%08x)\n", exceptions_code[i].name, (int)source); break; } } expt_quard_stack_t *s = NULL; s = (expt_quard_stack_t *) kthread_getspecific(expt_key); if (s && s->pos >= 0) { // Simulate a call to longjmp by directly changing stored // context of the exception irq_ctx->pc = (uint32)longjmp; irq_ctx->r[4] = (uint32)s->jump[s->pos]; irq_ctx->r[5] = (uint32)(void *) -1; } else { //malloc_stats(); //texture_memstats(); /* not handled --> panic !! */ //irq_dump_regs(0, source); dbgio_set_dev_fb(); vid_clear(0, 0, 0); ConsoleInformation *con = GetConsole(); for(i = 16; i > 0; i--) { dbglog(DBG_INFO, "%s\n", con->ConsoleLines[i]); } dbglog(DBG_ERROR, "Unhandled Exception. Reboot after 10 seconds."); //panic("Unhandled IRQ/Exception"); timer_spin_sleep(10000); arch_reboot(); // asic_sys_reset(); } }