static int tps65218_gpio_set_single_ended(struct gpio_chip *gc, unsigned offset, enum single_ended_mode mode) { struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc); struct tps65218 *tps65218 = tps65218_gpio->tps65218; switch (offset) { case 0: case 2: /* GPO1 is hardwired to be open drain */ if (mode == LINE_MODE_OPEN_DRAIN) return 0; return -ENOTSUPP; case 1: /* GPO2 is push-pull by default, can be set as open drain. */ if (mode == LINE_MODE_OPEN_DRAIN) return tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1, TPS65218_CONFIG1_GPO2_BUF, TPS65218_PROTECT_L1); if (mode == LINE_MODE_PUSH_PULL) return tps65218_set_bits(tps65218, TPS65218_REG_CONFIG1, TPS65218_CONFIG1_GPO2_BUF, TPS65218_CONFIG1_GPO2_BUF, TPS65218_PROTECT_L1); return -ENOTSUPP; default: break; } return -ENOTSUPP; }
static int tps65218_pmic_set_suspend_enable(struct regulator_dev *dev) { struct tps65218 *tps = rdev_get_drvdata(dev); unsigned int rid = rdev_get_id(dev); if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) return -EINVAL; return tps65218_clear_bits(tps, dev->desc->bypass_reg, dev->desc->bypass_mask, TPS65218_PROTECT_L1); }
static int tps65218_pmic_disable(struct regulator_dev *dev) { struct tps65218 *tps = rdev_get_drvdata(dev); int rid = rdev_get_id(dev); if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) return -EINVAL; /* Disable the regulator and password protection is level 1 */ return tps65218_clear_bits(tps, dev->desc->enable_reg, dev->desc->enable_mask, TPS65218_PROTECT_L1); }
static void tps65218_gpio_set(struct gpio_chip *gc, unsigned offset, int value) { struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc); struct tps65218 *tps65218 = tps65218_gpio->tps65218; if (value) tps65218_set_bits(tps65218, TPS65218_REG_ENABLE2, TPS65218_ENABLE2_GPIO1 << offset, TPS65218_ENABLE2_GPIO1 << offset, TPS65218_PROTECT_L1); else tps65218_clear_bits(tps65218, TPS65218_REG_ENABLE2, TPS65218_ENABLE2_GPIO1 << offset, TPS65218_PROTECT_L1); }
static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset) { struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc); struct tps65218 *tps65218 = tps65218_gpio->tps65218; int ret; if (gpiochip_line_is_open_source(gc, offset)) { dev_err(gc->parent, "can't work as open source\n"); return -EINVAL; } switch (offset) { case 0: if (!gpiochip_line_is_open_drain(gc, offset)) { dev_err(gc->parent, "GPO1 works only as open drain\n"); return -EINVAL; } /* Disable sequencer for GPO1 */ ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7, TPS65218_SEQ7_GPO1_SEQ_MASK, TPS65218_PROTECT_L1); if (ret) return ret; /* Setup GPO1 */ ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1, TPS65218_CONFIG1_IO1_SEL, TPS65218_PROTECT_L1); if (ret) return ret; break; case 1: /* Setup GPO2 */ ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1, TPS65218_CONFIG1_IO1_SEL, TPS65218_PROTECT_L1); if (ret) return ret; break; case 2: if (!gpiochip_line_is_open_drain(gc, offset)) { dev_err(gc->parent, "GPO3 works only as open drain\n"); return -EINVAL; } /* Disable sequencer for GPO3 */ ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7, TPS65218_SEQ7_GPO3_SEQ_MASK, TPS65218_PROTECT_L1); if (ret) return ret; /* Setup GPO3 */ ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG2, TPS65218_CONFIG2_DC12_RST, TPS65218_PROTECT_L1); if (ret) return ret; break; default: return -EINVAL; } return 0; }