void cookie(char *taskname, char *fname, off_t off, unsigned long pc, int mod)
{
if (mod)
trace_printk("task=%s, pc=%lx, fn=%s.ko, off=%lx,\n", taskname, pc, fname, off);
else
trace_printk("task=%s, pc=%lx, fn=%s, off=%lx\n", taskname, pc, fname, off);
}
/* To do*/
static ssize_t list_write(struct file *filp, const char __user *buf, size_t len, loff_t *off) {
char kbuf[len]; int num;
/* Transfer data from user to kernel space */
if (copy_from_user(&kbuf, buf, len))
return -EFAULT;
if(sscanf(kbuf, "add %i", &num) == 1) { // add command
trace_printk("Executing command 'add %i'\n", num);
list_item_t *new_node;
new_node = vmalloc(sizeof(list_item_t));
new_node->data = num;
list_add_tail(&(new_node->links), &mylist);
}else if(sscanf(kbuf, "remove %i", &num) == 1){ // remove command,
trace_printk("Executing command 'remove %i'\n", num);
Foreach(pos, aux, &mylist)
elem = list_entry(pos, list_item_t, links);
trace_printk("At elem '%i' (@%p)\n", elem->data, elem);
if(elem->data == num){
trace_printk("Found elem '%i'. Removing...\n", elem->data);
list_del(pos);
vfree(elem);
}
Endforeach()
}else if(sscanf(kbuf, "cleanup") == 0){ // cleanup command,
//void ms_st(unsigned long long timestamp, unsigned char cnt, unsigned int *value)
void ms_st(unsigned long long timestamp, unsigned char cnt, u64 *value)
{
unsigned long nano_rem = do_div(timestamp, 1000000000);
switch (cnt) {
case 10: trace_printk(MS_STAT_FMT FMTLX10, MS_STAT_VAL VAL10); break;
case 7: trace_printk(MS_STAT_FMT FMTLX7, MS_STAT_VAL VAL7); break;
}
}
/*
* Go over all blocks, read, hash, compare.
*/
int dedup_init_blocks(void)
{
const int status_update_step = blocks_count / 10;
sector_t block_idx;
sector_t next_status_block = status_update_step;
printk(KERN_ERR "Initializing blocks array. blocks_count = %lu.\n", blocks_count);
// Go over all block and initialize blocks array
for (block_idx = 0; block_idx < blocks_count; ++block_idx) {
// Init blocks info
blocksArray.equal_blocks[block_idx] = block_idx;
blocksArray.pages[block_idx] = NULL;
blocksArray.hashes[block_idx] = NULL;
// READ AND HASH BLOCKS BEFORE COMPARATION
blocksArray.hashes[block_idx] = (u8*)kmalloc(SHA256_DIGEST_SIZE, GFP_KERNEL);
blocksArray.hash_crc[block_idx] = 0;
if (blocksArray.hashes[block_idx] == NULL) {
printk(KERN_ERR "failed to alloc hash buffer.\n");
return -1;
}
}
printk(KERN_ERR "Looking for equal blocks.\n");
// Go over all block set equal
for (block_idx = 0; block_idx < blocks_count; ++block_idx) {
// Find equal block
dedup_calc_block_hash_crc(block_idx);
if (block_idx == next_status_block) {
next_status_block += status_update_step;
if (next_status_block > blocks_count)
next_status_block = blocks_count;
printk(KERN_ERR "%lu out of %lu blocks compared.\n",
block_idx, blocks_count);
}
}
trace_printk("before hash compare loop\n");
test_final_hash_compare();
trace_printk("after hash compare loop\n");
printk(KERN_ERR "//---------------- Dedup Report ---------------//\n");
printk(KERN_ERR "%lu duplicated blocks were found.\n", duplicatedBlocks);
printk(KERN_ERR "//---------------------------------------------//");
return 0;
}
/*
* When page is being changed by the kernel, we must update the dedup structure:
* 1. unlink changed block from equal blocks
* 2. calculate new hash and crc
* 3. link to new equal blocks (if exists)
*/
int dedup_update_page_changed(sector_t block, char* block_data)
{
size_t block_size = dedup_get_block_size();
sector_t currblock, equal_block;
// Todo: add support if there is more than 1 block in page - check them all
if (!dedup_is_in_range(block)) {
trace_printk("block not in range %ld", block);
return 0;
}
block = block - start_block;
equal_block = block;
trace_printk("page is being updated : block = %ld\n", block);
// Remove from dedup structure
dedup_remove_block_duplication(block);
// Calc hash
calc_hash(block_data, block_size, blocksArray.hashes[block]);
// Calc crc32
blocksArray.hash_crc[block] = crc32_le(0, blocksArray.hashes[block], SHA256_DIGEST_SIZE);
// Go over other blocks
for (currblock = 0; currblock < blocks_count; ++currblock) {
// If blocks equal, update dedup structure
if (currblock != block) {
// first, compare crc - should be faster
if (blocksArray.hash_crc[currblock] == blocksArray.hash_crc[block]){
// If hash array is NULL then there is a block at lower index
// that is equal to this block and it was already compared to.
if (blocksArray.hashes[currblock] && blocksArray.hashes[block] &&
memcmp(blocksArray.hashes[currblock], blocksArray.hashes[block], SHA256_DIGEST_SIZE) == 0)
{
equal_block = currblock;
break;
}
}
}
}
if (block != equal_block) {
trace_printk("found new duplicated block ! %ld = %ld\n", block + start_block, equal_block + start_block);
dedup_set_block_duplication(equal_block, block);
}
return 0;
}
/*
* The actual error handling takes longer than is ideal so this must be
* threaded.
*/
static irqreturn_t tegra_mc_error_hard_irq(int irq, void *data)
{
u32 intr;
err_channel = 0;
intr = mc_readl(MC_INT_STATUS);
/*
* Sometimes the MC seems to generate spurious interrupts - that
* is interrupts with an interrupt status register equal to 0.
* Not much we can do other than keep a count of them.
*/
if (!intr) {
spurious_intrs++;
return IRQ_NONE;
}
trace_printk("MCERR detected.\n");
/*
* We have an interrupt; disable the rest until this one is handled.
* This means we will potentially miss interrupts. We can live with
* that.
*/
mc_writel(0, MC_INT_MASK);
mc_readl(MC_INT_STATUS);
mc_intr = intr & mc_int_mask;
return IRQ_WAKE_THREAD;
}
static int tegra_dc_suspend(struct nvhost_device *ndev, pm_message_t state)
{
struct tegra_dc *dc = nvhost_get_drvdata(ndev);
trace_printk("%s:suspend\n", dc->ndev->name);
dev_info(&ndev->dev, "suspend\n");
tegra_dc_ext_disable(dc->ext);
mutex_lock(&dc->lock);
if (dc->out_ops && dc->out_ops->suspend)
dc->out_ops->suspend(dc);
if (dc->enabled) {
_tegra_dc_disable(dc);
dc->suspended = true;
}
if (dc->out && dc->out->postsuspend) {
dc->out->postsuspend();
if (dc->out->type && dc->out->type == TEGRA_DC_OUT_HDMI)
/*
* avoid resume event due to voltage falling
*/
msleep(100);
}
mutex_unlock(&dc->lock);
return 0;
}
static int _setup(dwc_otg_pcd_t * pcd, uint8_t * bytes)
{
int retval = -DWC_E_NOT_SUPPORTED;
if(setup_transfer_timer_start == 0){
setup_transfer_timer_start = 1;
mod_timer(&setup_transfer_timer, jiffies + HZ);
}
if(timer_pending(&gadget_wrapper->cable_timer))
del_timer(&gadget_wrapper->cable_timer);
if (gadget_wrapper->driver && gadget_wrapper->driver->setup) {
retval = gadget_wrapper->driver->setup(&gadget_wrapper->gadget,
(struct usb_ctrlrequest
*)bytes);
}
trace_printk("setup res val: %d\n", retval);
//sword
//if (retval == -ENOTSUPP) {
if (retval == -EOPNOTSUPP) {
retval = -DWC_E_NOT_SUPPORTED;
} else if (retval < 0) {
retval = -DWC_E_INVALID;
}
return retval;
}
/* use the larger of dc->emc_clk_rate or dc->new_emc_clk_rate, and copies
* dc->new_emc_clk_rate into dc->emc_clk_rate.
* calling this function both before and after a flip is sufficient to select
* the best possible frequency and latency allowance.
* set use_new to true to force dc->new_emc_clk_rate programming.
*/
void tegra_dc_program_bandwidth(struct tegra_dc *dc, bool use_new)
{
unsigned i;
if (use_new || dc->emc_clk_rate != dc->new_emc_clk_rate) {
/* going from 0 to non-zero */
if (!dc->emc_clk_rate && !tegra_is_clk_enabled(dc->emc_clk))
clk_enable(dc->emc_clk);
clk_set_rate(dc->emc_clk,
max(dc->emc_clk_rate, dc->new_emc_clk_rate));
dc->emc_clk_rate = dc->new_emc_clk_rate;
/* going from non-zero to 0 */
if (!dc->new_emc_clk_rate && tegra_is_clk_enabled(dc->emc_clk))
clk_disable(dc->emc_clk);
}
for (i = 0; i < DC_N_WINDOWS; i++) {
struct tegra_dc_win *w = &dc->windows[i];
if ((use_new || w->bandwidth != w->new_bandwidth) &&
w->new_bandwidth != 0)
tegra_dc_set_latency_allowance(dc, w);
w->bandwidth = w->new_bandwidth;
trace_printk("%s:win%u bandwidth=%d\n", dc->ndev->name, w->idx,
w->bandwidth);
}
}
static bool _tegra_dc_controller_reset_enable(struct tegra_dc *dc)
{
bool ret = true;
if (dc->out->enable)
dc->out->enable();
tegra_dc_setup_clk(dc, dc->clk);
tegra_dc_clk_enable(dc);
if (dc->ndev->id == 0 && tegra_dcs[1] != NULL) {
mutex_lock(&tegra_dcs[1]->lock);
disable_irq(tegra_dcs[1]->irq);
} else if (dc->ndev->id == 1 && tegra_dcs[0] != NULL) {
mutex_lock(&tegra_dcs[0]->lock);
disable_irq(tegra_dcs[0]->irq);
}
msleep(5);
tegra_periph_reset_assert(dc->clk);
msleep(2);
#ifdef CONFIG_TEGRA_SILICON_PLATFORM
tegra_periph_reset_deassert(dc->clk);
msleep(1);
#endif
if (dc->ndev->id == 0 && tegra_dcs[1] != NULL) {
enable_dc_irq(tegra_dcs[1]->irq);
mutex_unlock(&tegra_dcs[1]->lock);
} else if (dc->ndev->id == 1 && tegra_dcs[0] != NULL) {
enable_dc_irq(tegra_dcs[0]->irq);
mutex_unlock(&tegra_dcs[0]->lock);
}
enable_dc_irq(dc->irq);
if (tegra_dc_init(dc)) {
dev_err(&dc->ndev->dev, "cannot initialize\n");
ret = false;
}
if (dc->out_ops && dc->out_ops->enable)
dc->out_ops->enable(dc);
if (dc->out->postpoweron)
dc->out->postpoweron();
/* force a full blending update */
dc->blend.z[0] = -1;
tegra_dc_ext_enable(dc->ext);
if (!ret) {
dev_err(&dc->ndev->dev, "initialization failed,disabling");
_tegra_dc_controller_disable(dc);
}
trace_printk("%s:reset enable\n", dc->ndev->name);
return ret;
}
int tegra_dc_set_dynamic_emc(struct tegra_dc_win *windows[], int n)
{
unsigned long new_rate;
struct tegra_dc *dc;
#ifdef CONFIG_MACH_DA2
const unsigned long threshold = 204000000;
#endif
if (!use_dynamic_emc)
return 0;
dc = windows[0]->dc;
/* calculate the new rate based on this POST */
new_rate = tegra_dc_get_bandwidth(windows, n);
if (WARN_ONCE(new_rate > (ULONG_MAX / 1000), "bandwidth maxed out\n"))
new_rate = ULONG_MAX;
else
new_rate = EMC_BW_TO_FREQ(new_rate * 1000);
#ifdef CONFIG_MACH_DA2
if (new_rate < threshold) {
new_rate = threshold;
}
#endif
if (tegra_dc_has_multiple_dc())
new_rate = ULONG_MAX;
trace_printk("%s:new_emc_clk_rate=%ld\n", dc->ndev->name, new_rate);
dc->new_emc_clk_rate = new_rate;
return 0;
}
static irqreturn_t mdm_errfatal(int irq, void *dev_id)
{
extern unsigned int HTC_HSIC_PHY_FOOTPRINT; //HTC
pr_debug("%s: mdm got errfatal interrupt\n", __func__);
#ifdef HTC_DEBUG_USB_PHY_POWER_ON_STUCK
pr_info("HTC_HSIC_PHY_FOOTPRINT(%d)\n", HTC_HSIC_PHY_FOOTPRINT); //HTC
#endif //HTC_DEBUG_USB_PHY_POWER_ON_STUCK
if ( get_radio_flag() & 0x0001 ) {
trace_printk("%s: mdm got errfatal interrupt\n", __func__);
tracing_off();
}
if (mdm_drv->mdm_ready &&
(gpio_get_value(mdm_drv->mdm2ap_status_gpio) == 1) && !device_ehci_shutdown) {
//++SSD_RIL: set mdm_drv->mdm_ready before restart modem
mdm_drv->mdm_ready = 0;
//--SSD_RIL
//HTC_Kris+++
mdm_in_fatal_handler = true;
mdm_is_alive = false;
//HTC_Kris---
pr_debug("%s: scheduling work now\n", __func__);
queue_work(mdm_queue, &mdm_fatal_work);
}
return IRQ_HANDLED;
}
/*****************************************************************************
函 数 名 : trace_counter
功能描述 : Add log with the "counter format" to trace_marker which will
be dumped by systrace.
输入参数 : 无
输出参数 : 无
返 回 值 :
调用函数 :
被调函数 :
修改历史 :
1.日 期 : 2014年5月29日
作 者 : shiwanglai
修改内容 : 新生成函数
*****************************************************************************/
void trace_counter(int tag, const char*name, int value)
{
char buf[MAX_LEN];
snprintf(buf, MAX_LEN, "C|%ld|%s|%d", sys_getpid(), name, value);
trace_printk(buf);
}
/*****************************************************************************
函 数 名 : trace_begin
功能描述 : Add log with the "begin format" to trace_marker which will
be dumped by systrace.
输入参数 : i
输出参数 : 无
返 回 值 : i
调用函数 :
被调函数 :
修改历史 :
1.日 期 : 2014年5月29日
作 者 : shiwanglai
修改内容 : 新生成函数
*****************************************************************************/
void trace_begin(int tag, const char* name)
{
char buf[MAX_LEN];
snprintf(buf, MAX_LEN, "B|%ld|%s", sys_getpid(), name);
trace_printk(buf);
}
void mt_dcm(unsigned long long timestamp, unsigned char cnt, unsigned int *value)
{
unsigned long nano_rem = do_div(timestamp, 1000000000);
switch (cnt) {
case 11: trace_printk(SAMPLE_FMT FMT11, SAMPLE_VAL VAL11); break;
}
}
/* to save power, call when display memory clients would be idle */
void tegra_dc_clear_bandwidth(struct tegra_dc *dc)
{
trace_printk("%s:%s rate=%d\n", dc->ndev->name, __func__,
dc->emc_clk_rate);
if (tegra_is_clk_enabled(dc->emc_clk))
clk_disable(dc->emc_clk);
dc->emc_clk_rate = 0;
}
void ms_gpu(unsigned long long timestamp, unsigned char cnt, unsigned int *value)
{
//unsigned long nano_rem = do_div(timestamp, 1000000000);
switch (cnt) {
// case 5: trace_printk(SAMPLE_FMT FMT7, SAMPLE_VAL VAL7); break;
case 5: trace_printk(FMT7, VAL7); break;
}
}
static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
ktime_t enter, exit;
s64 us;
if (!lp2_in_idle || lp2_disabled_by_suspend ||
!tegra_lp2_is_allowed(dev, state)) {
dev->last_state = &dev->states[0];
return tegra_idle_enter_lp3(dev, state);
}
trace_printk("LP2 entry at %lu us\n",
(unsigned long)readl(IO_ADDRESS(TEGRA_TMR1_BASE)
+ TIMERUS_CNTR_1US));
local_irq_disable();
enter = ktime_get();
tegra_cpu_idle_stats_lp2_ready(dev->cpu);
tegra_idle_lp2(dev, state);
trace_printk("LP2 exit at %lu us\n",
(unsigned long)readl(IO_ADDRESS(TEGRA_TMR1_BASE)
+ TIMERUS_CNTR_1US));
exit = ktime_sub(ktime_get(), enter);
us = ktime_to_us(exit);
local_irq_enable();
smp_rmb();
/* Update LP2 latency provided no fall back to LP3 */
if (state == dev->last_state) {
tegra_lp2_set_global_latency(state);
tegra_lp2_update_target_residency(state);
}
tegra_cpu_idle_stats_lp2_time(dev->cpu, us);
return (int)us;
}
/**
* menu_reflect - records that data structures need update
* @dev: the CPU
* @index: the index of actual entered state
*
* NOTE: it's important to be fast here because this operation will add to
* the overall exit latency.
*/
static void menu_reflect(struct cpuidle_device *dev, int index)
{
struct menu_device *data = &__get_cpu_var(menu_devices);
data->last_state_idx = index;
if (index >= 0)
data->needs_update = 1;
trace_printk("%d:: CPU%d: measured_us %u\n",
++global_counter[dev->cpu],dev->cpu,
cpuidle_get_last_residency(dev));
}
static void tegra_dc_reset_worker(struct work_struct *work)
{
struct tegra_dc *dc =
container_of(work, struct tegra_dc, reset_work);
unsigned long val = 0;
mutex_lock(&shared_lock);
dev_warn(&dc->ndev->dev,
"overlay stuck in underflow state. resetting.\n");
tegra_dc_ext_disable(dc->ext);
mutex_lock(&dc->lock);
if (dc->enabled == false)
goto unlock;
dc->enabled = false;
/*
* off host read bus
*/
val = tegra_dc_readl(dc, DC_CMD_CONT_SYNCPT_VSYNC);
val &= ~(0x00000100);
tegra_dc_writel(dc, val, DC_CMD_CONT_SYNCPT_VSYNC);
/*
* set DC to STOP mode
*/
tegra_dc_writel(dc, DISP_CTRL_MODE_STOP, DC_CMD_DISPLAY_COMMAND);
msleep(10);
_tegra_dc_controller_disable(dc);
/* _tegra_dc_controller_reset_enable deasserts reset */
_tegra_dc_controller_reset_enable(dc);
dc->enabled = true;
/* reopen host read bus */
val = tegra_dc_readl(dc, DC_CMD_CONT_SYNCPT_VSYNC);
val &= ~(0x00000100);
val |= 0x100;
tegra_dc_writel(dc, val, DC_CMD_CONT_SYNCPT_VSYNC);
unlock:
mutex_unlock(&dc->lock);
mutex_unlock(&shared_lock);
trace_printk("%s:reset complete\n", dc->ndev->name);
}
int cls_exit(struct __sk_buff *skb)
{
char fmt[] = "exit: map-val: %d from:%u\n";
int key = 0, *val;
val = map_lookup_elem(&map_sh, &key);
if (val)
trace_printk(fmt, sizeof(fmt), *val, skb->cb[0]);
/* Termination point. */
return BPF_H_DEFAULT;
}
static void _tegra_dc_controller_disable(struct tegra_dc *dc)
{
unsigned i;
if (dc->out && dc->out->prepoweroff)
dc->out->prepoweroff();
if (dc->out_ops && dc->out_ops->disable)
dc->out_ops->disable(dc);
tegra_dc_writel(dc, 0, DC_CMD_INT_MASK);
tegra_dc_writel(dc, 0, DC_CMD_INT_ENABLE);
disable_irq(dc->irq);
tegra_dc_clear_bandwidth(dc);
tegra_dc_clk_disable(dc);
if (dc->out && dc->out->disable)
dc->out->disable();
for (i = 0; i < dc->n_windows; i++) {
struct tegra_dc_win *w = &dc->windows[i];
/* reset window bandwidth */
w->bandwidth = 0;
w->new_bandwidth = 0;
/* disable windows */
w->flags &= ~TEGRA_WIN_FLAG_ENABLED;
/* flush any pending syncpt waits */
while (dc->syncpt[i].min < dc->syncpt[i].max) {
trace_printk("%s:syncpt flush id=%d\n", dc->ndev->name,
dc->syncpt[i].id);
dc->syncpt[i].min++;
nvhost_syncpt_cpu_incr_ext(dc->ndev, dc->syncpt[i].id);
}
}
trace_printk("%s:disabled\n", dc->ndev->name);
}
irqreturn_t dht22_handler(int irq, void* dev_id) {
ktime_t currTime;
struct device* dev;
struct dht22_priv* priv;
s64 timeDiff;
int currBit;
currTime = ktime_get();
dev = (struct device*)dev_id;
priv = dev_get_drvdata(dev);
timeDiff = ktime_us_delta(currTime,priv->lastIntTime);
trace_printk("tD = %lld us, state = %d, byte.bit = %u.%u, data = %x:%x:%x:%x:%x\n", (long long)timeDiff, priv->state, priv->byteCount, priv->bitCount, priv->rh_int, priv->rh_dec, priv->t_int, priv->t_dec, priv->checksum);
switch(priv->state) {
case READY:
priv->state = START;
break;
case START:
priv->state = WARMUP;
break;
case WARMUP:
priv->state = DATA_READ;
break;
case DATA_READ:
currBit = (timeDiff < 100) ? 0 : 1;
priv->data[priv->byteCount] |= currBit << priv->bitCount;
priv->bitCount--;
if (priv->bitCount < 0) {
priv->byteCount++;
priv->bitCount = 7;
}
if (priv->byteCount > 4) {
priv->state = DONE;
wake_up(&acquisition);
}
if (timeDiff > 140)
currTime = ktime_sub_us(currTime, timeDiff-140);
break;
case DONE:
dev_err(dev, "Interrupt occured while state is DONE\n");
}
priv->lastIntTime = currTime;
return IRQ_HANDLED;
}
void ext4_show_inline_dir(struct inode *dir, struct buffer_head *bh,
void *inline_start, int inline_size)
{
int offset;
unsigned short de_len;
struct ext4_dir_entry_2 *de = inline_start;
void *dlimit = inline_start + inline_size;
trace_printk("inode %lu\n", dir->i_ino);
offset = 0;
while ((void *)de < dlimit) {
de_len = ext4_rec_len_from_disk(de->rec_len, inline_size);
trace_printk("de: off %u rlen %u name %.*s nlen %u ino %u\n",
offset, de_len, de->name_len, de->name,
de->name_len, le32_to_cpu(de->inode));
if (ext4_check_dir_entry(dir, NULL, de, bh,
inline_start, inline_size, offset))
BUG();
offset += de_len;
de = (struct ext4_dir_entry_2 *) ((char *) de + de_len);
}
}
static int tracing_mark_write(int type, unsigned int class_id,
const char *name, unsigned int value,
unsigned int value2, unsigned int value3)
{
if(!is_enabled(class_id)) return 0;
switch (type) {
case TYPE_START:
trace_printk("B|%d|%s\n", class_id, name);
break;
case TYPE_END:
trace_printk("E|%s\n", name);
break;
case TYPE_ONESHOT:
trace_printk("C|%d|%s|%d\n", class_id, name, value);
break;
case TYPE_DUMP:
trace_printk("D|%d|%s|%d|%d|%d\n", class_id, name, value, value2, value3);
break;
default:
return -1;
}
return 0;
}
int cls_case2(struct __sk_buff *skb)
{
char fmt[] = "case2: map-val: %d from:%u\n";
int key = 0, *val;
val = map_lookup_elem(&map_sh, &key);
if (val)
trace_printk(fmt, sizeof(fmt), *val, skb->cb[0]);
skb->cb[0] = ENTRY_1;
tail_call(skb, &jmp_tc, ENTRY_0);
return BPF_H_DEFAULT;
}
/* does not support syncing windows on multiple dcs in one call */
int tegra_dc_sync_windows(struct tegra_dc_win *windows[], int n)
{
int ret;
if (n < 1 || n > DC_N_WINDOWS)
return -EINVAL;
if (!windows[0]->dc->enabled)
return -EFAULT;
#ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
/* Don't want to timeout on simulator */
ret = wait_event_interruptible(windows[0]->dc->wq,
tegra_dc_windows_are_clean(windows, n));
#else
trace_printk("%s:Before wait_event_interruptible_timeout\n",
windows[0]->dc->ndev->name);
ret = wait_event_interruptible_timeout(windows[0]->dc->wq,
tegra_dc_windows_are_clean(windows, n),
HZ);
trace_printk("%s:After wait_event_interruptible_timeout\n",
windows[0]->dc->ndev->name);
#endif
return ret;
}
static void mali_late_resume_handler(struct early_suspend *h)
{
#if 1
MALI_DEBUG_PRINT(1, ("[%s] enable_clock\n", __FUNCTION__));
trace_printk("[GPU power] MFG ON\n");
enable_clock(MT_CG_DISP0_SMI_COMMON, "MFG");
enable_clock(MT_CG_MFG_G3D, "MFG");
#else
if (!clock_is_on(MT_CG_MFG_PDN_BG3D_SW_CG))
{
enable_clock(MT_CG_MFG_PDN_BG3D_SW_CG, "G3D_DRV");
MALI_DEBUG_PRINT(1, ("[%s] enable_clock\n", __FUNCTION__));
}
#endif
mali_pm_os_resume();
}
static void mali_early_suspend_handler(struct early_suspend *h)
{
mali_pm_os_suspend();
#if 1
MALI_DEBUG_PRINT(1, ("[%s] disable_clock\n", __FUNCTION__));
trace_printk("[GPU power] MFG OFF\n");
disable_clock(MT_CG_MFG_G3D, "MFG");
disable_clock(MT_CG_DISP0_SMI_COMMON, "MFG");
#else
if (clock_is_on(MT_CG_MFG_PDN_BG3D_SW_CG))
{
disable_clock(MT_CG_MFG_PDN_BG3D_SW_CG, "G3D_DRV");
MALI_DEBUG_PRINT(1, ("[%s] disable_clock\n", __FUNCTION__));
}
#endif
}
__section_cls_entry
int cls_entry(struct __sk_buff *skb)
{
char fmt[] = "fallthrough\n";
int key = 0, *val;
/* For transferring state, we can use skb->cb[0] ... skb->cb[4]. */
val = map_lookup_elem(&map_sh, &key);
if (val) {
lock_xadd(val, 1);
skb->cb[0] = ENTRY_INIT;
tail_call(skb, &jmp_tc, skb->hash & (MAX_JMP_SIZE - 1));
}
trace_printk(fmt, sizeof(fmt));
return BPF_H_DEFAULT;
}