コード例 #1
0
ファイル: ilo_shader_fs.c プロジェクト: mthuurne/mesa
static void
fs_lower_opcode_derivative(struct toy_compiler *tc, struct toy_inst *inst)
{
   struct toy_dst dst[4];
   struct toy_src src[4];
   int i;

   tdst_transpose(inst->dst, dst);
   tsrc_transpose(inst->src[0], src);

   /*
    * Every four fragments are from a 2x2 subspan, with
    *
    *   fragment 1 on the top-left,
    *   fragment 2 on the top-right,
    *   fragment 3 on the bottom-left,
    *   fragment 4 on the bottom-right.
    *
    * DDX should thus produce
    *
    *   dst = src.yyww - src.xxzz
    *
    * and DDY should produce
    *
    *   dst = src.zzww - src.xxyy
    *
    * But since we are in BRW_ALIGN_1, swizzling does not work and we have to
    * play with the region parameters.
    */
   if (inst->opcode == TOY_OPCODE_DDX) {
      for (i = 0; i < 4; i++) {
         struct toy_src left, right;

         left = tsrc_rect(src[i], TOY_RECT_220);
         right = tsrc_offset(left, 0, 1);

         tc_ADD(tc, dst[i], right, tsrc_negate(left));
      }
   }
   else {
      for (i = 0; i < 4; i++) {
         struct toy_src top, bottom;

         /* approximate with dst = src.zzzz - src.xxxx */
         top = tsrc_rect(src[i], TOY_RECT_440);
         bottom = tsrc_offset(top, 0, 2);

         tc_ADD(tc, dst[i], bottom, tsrc_negate(top));
      }
   }

   tc_discard_inst(tc, inst);
}
コード例 #2
0
ファイル: ilo_shader_fs.c プロジェクト: mthuurne/mesa
static void
fs_lower_opcode_kil(struct toy_compiler *tc, struct toy_inst *inst)
{
   struct toy_dst pixel_mask_dst;
   struct toy_src f0, pixel_mask;
   struct toy_inst *tmp;

   /* lower half of r1.7:ud */
   pixel_mask_dst = tdst_uw(tdst(TOY_FILE_GRF, 1, 7 * 4));
   pixel_mask = tsrc_rect(tsrc_from(pixel_mask_dst), TOY_RECT_010);

   f0 = tsrc_rect(tsrc_uw(tsrc(TOY_FILE_ARF, BRW_ARF_FLAG, 0)), TOY_RECT_010);

   /* KILP or KIL */
   if (tsrc_is_null(inst->src[0])) {
      struct toy_src dummy = tsrc_uw(tsrc(TOY_FILE_GRF, 0, 0));
      struct toy_dst f0_dst = tdst_uw(tdst(TOY_FILE_ARF, BRW_ARF_FLAG, 0));

      /* create a mask that masks out all pixels */
      tmp = tc_MOV(tc, f0_dst, tsrc_rect(tsrc_imm_uw(0xffff), TOY_RECT_010));
      tmp->exec_size = BRW_EXECUTE_1;
      tmp->mask_ctrl = BRW_MASK_DISABLE;

      tc_CMP(tc, tdst_null(), dummy, dummy, BRW_CONDITIONAL_NEQ);

      /* swapping the two src operands breaks glBitmap()!? */
      tmp = tc_AND(tc, pixel_mask_dst, f0, pixel_mask);
      tmp->exec_size = BRW_EXECUTE_1;
      tmp->mask_ctrl = BRW_MASK_DISABLE;
   }
   else {
      struct toy_src src[4];
      int i;

      tsrc_transpose(inst->src[0], src);
      /* mask out killed pixels */
      for (i = 0; i < 4; i++) {
         tc_CMP(tc, tdst_null(), src[i], tsrc_imm_f(0.0f),
               BRW_CONDITIONAL_GE);

         /* swapping the two src operands breaks glBitmap()!? */
         tmp = tc_AND(tc, pixel_mask_dst, f0, pixel_mask);
         tmp->exec_size = BRW_EXECUTE_1;
         tmp->mask_ctrl = BRW_MASK_DISABLE;
      }
   }

   tc_discard_inst(tc, inst);
}
コード例 #3
0
ファイル: ilo_shader_fs.c プロジェクト: mthuurne/mesa
static void
fs_lower_opcode_tgsi_const_gen7(struct fs_compile_context *fcc,
                                struct toy_dst dst, int dim, struct toy_src idx)
{
   struct toy_compiler *tc = &fcc->tc;
   const struct toy_dst offset =
      tdst_ud(tdst(TOY_FILE_MRF, fcc->first_free_mrf, 0));
   struct toy_src desc;
   struct toy_inst *inst;
   struct toy_dst tmp, real_dst[4];
   int i;

   /*
    * In 4c1fdae0a01b3f92ec03b61aac1d3df500d51fc6, pull constant load was
    * changed from OWord Block Read to ld to increase performance in the
    * classic driver.  Since we use the constant cache instead of the data
    * cache, I wonder if we still want to follow the classic driver.
    */

   /* set offset */
   inst = tc_MOV(tc, offset, tsrc_rect(idx, TOY_RECT_010));
   inst->exec_size = BRW_EXECUTE_8;
   inst->mask_ctrl = BRW_MASK_DISABLE;

   desc = tsrc_imm_mdesc_sampler(tc, 1, 1, false,
         BRW_SAMPLER_SIMD_MODE_SIMD4X2,
         GEN5_SAMPLER_MESSAGE_SAMPLE_LD,
         0,
         ILO_WM_CONST_SURFACE(dim));

   tmp = tc_alloc_tmp(tc);
   inst = tc_SEND(tc, tmp, tsrc_from(offset), desc, BRW_SFID_SAMPLER);
   inst->exec_size = BRW_EXECUTE_8;
   inst->mask_ctrl = BRW_MASK_DISABLE;

   tdst_transpose(dst, real_dst);
   for (i = 0; i < 4; i++) {
      const struct toy_src src =
         tsrc_offset(tsrc_rect(tsrc_from(tmp), TOY_RECT_010), 0, i);

      /* cast to type D to make sure these are raw moves */
      tc_MOV(tc, tdst_d(real_dst[i]), tsrc_d(src));
   }
}
コード例 #4
0
ファイル: ilo_shader_gs.c プロジェクト: Distrotech/Mesa
static void
gs_lower_opcode_emit_vue_static(struct gs_compile_context *gcc)
{
   struct toy_compiler *tc = &gcc->tc;
   struct toy_inst *inst2;
   bool eot;

   eot = (gcc->static_data.num_vertices == gcc->static_data.total_vertices);

   gcc->vars.prim_end =
      ((gcc->static_data.last_vertex[(gcc->static_data.num_vertices - 1) / 32] &
        1 << ((gcc->static_data.num_vertices - 1) % 32)) != 0);

   if (eot && gcc->write_so) {
      inst2 = tc_OR(tc, tdst_offset(gcc->vars.urb_write_header, 0, 2),
            tsrc_from(gcc->vars.so_written),
            tsrc_imm_d(gcc->vars.prim_type << 2 |
                       gcc->vars.prim_start << 1 |
                       gcc->vars.prim_end));
      inst2->exec_size = GEN6_EXECSIZE_1;
      inst2->src[0] = tsrc_rect(inst2->src[0], TOY_RECT_010);
      inst2->src[1] = tsrc_rect(inst2->src[1], TOY_RECT_010);
   }
   else {
      gs_COPY1(tc, gcc->vars.urb_write_header, 2,
            tsrc_imm_d(gcc->vars.prim_type << 2 |
                       gcc->vars.prim_start << 1 |
                       gcc->vars.prim_end), 0);
   }

   gs_write_vue(gcc, tdst_d(gcc->vars.tmp),
         tsrc_from(gcc->vars.urb_write_header),
         gcc->vars.tgsi_outs,
         gcc->shader->out.count, eot);

   if (!eot) {
      gs_COPY1(tc, gcc->vars.urb_write_header, 0,
            tsrc_from(tdst_d(gcc->vars.tmp)), 0);
   }

   gcc->vars.prim_start = gcc->vars.prim_end;
   gcc->vars.prim_end = false;
}
コード例 #5
0
ファイル: ilo_shader_gs.c プロジェクト: Distrotech/Mesa
static void
gs_COPY1(struct toy_compiler *tc,
         struct toy_dst dst, int dst_ch,
         struct toy_src src, int src_ch)
{
   struct toy_inst *inst;

   inst = tc_MOV(tc,
         tdst_offset(dst, 0, dst_ch),
         tsrc_rect(tsrc_offset(src, 0, src_ch), TOY_RECT_010));
   inst->exec_size = GEN6_EXECSIZE_1;
   inst->mask_ctrl = GEN6_MASKCTRL_NOMASK;
}
コード例 #6
0
ファイル: ilo_shader_fs.c プロジェクト: mthuurne/mesa
static void
fs_lower_opcode_tgsi_const_gen6(struct fs_compile_context *fcc,
                                struct toy_dst dst, int dim, struct toy_src idx)
{
   const struct toy_dst header =
      tdst_ud(tdst(TOY_FILE_MRF, fcc->first_free_mrf, 0));
   const struct toy_dst global_offset =
      tdst_ud(tdst(TOY_FILE_MRF, fcc->first_free_mrf, 2 * 4));
   const struct toy_src r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0));
   struct toy_compiler *tc = &fcc->tc;
   unsigned msg_type, msg_ctrl, msg_len;
   struct toy_inst *inst;
   struct toy_src desc;
   struct toy_dst tmp, real_dst[4];
   int i;

   /* set message header */
   inst = tc_MOV(tc, header, r0);
   inst->mask_ctrl = BRW_MASK_DISABLE;

   /* set global offset */
   inst = tc_MOV(tc, global_offset, idx);
   inst->mask_ctrl = BRW_MASK_DISABLE;
   inst->exec_size = BRW_EXECUTE_1;
   inst->src[0].rect = TOY_RECT_010;

   msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ;
   msg_ctrl = BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW << 8;
   msg_len = 1;

   desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false,
         msg_type, msg_ctrl, ILO_WM_CONST_SURFACE(dim));

   tmp = tc_alloc_tmp(tc);

   tc_SEND(tc, tmp, tsrc_from(header), desc, fcc->const_cache);

   tdst_transpose(dst, real_dst);
   for (i = 0; i < 4; i++) {
      const struct toy_src src =
         tsrc_offset(tsrc_rect(tsrc_from(tmp), TOY_RECT_010), 0, i);

      /* cast to type D to make sure these are raw moves */
      tc_MOV(tc, tdst_d(real_dst[i]), tsrc_d(src));
   }
}
コード例 #7
0
static bool
vs_lower_opcode_tgsi_const_pcb(struct vs_compile_context *vcc,
                               struct toy_dst dst, int dim,
                               struct toy_src idx)
{
   const int i = idx.val32;
   const int grf = vcc->first_const_grf + i / 2;
   const int grf_subreg = (i & 1) * 16;
   struct toy_src src;

   if (!vcc->variant->use_pcb || dim != 0 || idx.file != TOY_FILE_IMM ||
       grf >= vcc->first_ucp_grf)
      return false;


   src = tsrc_rect(tsrc(TOY_FILE_GRF, grf, grf_subreg), TOY_RECT_041);
   tc_MOV(&vcc->tc, dst, src);

   return true;
}
コード例 #8
0
ファイル: ilo_shader_fs.c プロジェクト: mthuurne/mesa
static void
fetch_face(struct fs_compile_context *fcc, struct toy_dst dst)
{
   struct toy_compiler *tc = &fcc->tc;
   const struct toy_src r0 = tsrc_d(tsrc(TOY_FILE_GRF, 0, 0));
   struct toy_dst tmp_f, tmp;
   struct toy_dst real_dst[4];

   tdst_transpose(dst, real_dst);

   tmp_f = tc_alloc_tmp(tc);
   tmp = tdst_d(tmp_f);
   tc_SHR(tc, tmp, tsrc_rect(r0, TOY_RECT_010), tsrc_imm_d(15));
   tc_AND(tc, tmp, tsrc_from(tmp), tsrc_imm_d(1));
   tc_MOV(tc, tmp_f, tsrc_from(tmp));

   /* convert to 1.0 and -1.0 */
   tc_MUL(tc, tmp_f, tsrc_from(tmp_f), tsrc_imm_f(-2.0f));
   tc_ADD(tc, real_dst[0], tsrc_from(tmp_f), tsrc_imm_f(1.0f));

   tc_MOV(tc, real_dst[1], tsrc_imm_f(0.0f));
   tc_MOV(tc, real_dst[2], tsrc_imm_f(0.0f));
   tc_MOV(tc, real_dst[3], tsrc_imm_f(1.0f));
}
コード例 #9
0
ファイル: ilo_shader_gs.c プロジェクト: Distrotech/Mesa
static void
gs_lower_opcode_tgsi_in(struct gs_compile_context *gcc,
                        struct toy_dst dst, int dim, int idx)
{
   struct toy_compiler *tc = &gcc->tc;
   struct toy_src attr;
   int slot, reg = -1, subreg;

   slot = toy_tgsi_find_input(&gcc->tgsi, idx);
   if (slot >= 0) {
      int i;

      for (i = 0; i < gcc->variant->u.gs.num_inputs; i++) {
         if (gcc->variant->u.gs.semantic_names[i] ==
               gcc->tgsi.inputs[slot].semantic_name &&
               gcc->variant->u.gs.semantic_indices[i] ==
               gcc->tgsi.inputs[slot].semantic_index) {
            reg = i / 2;
            subreg = (i % 2) * 4;
            break;
         }
      }
   }

   if (reg < 0) {
      tc_MOV(tc, dst, tsrc_imm_f(0.0f));
      return;
   }

   /* fix vertex ordering for GEN6_3DPRIM_TRISTRIP_REVERSE */
   if (gcc->in_vue_count == 3 && dim < 2) {
      struct toy_inst *inst;

      /* get PrimType */
      inst = tc_AND(tc, tdst_d(gcc->vars.tmp),
            tsrc_offset(gcc->payload.header, 0, 2), tsrc_imm_d(0x1f));
      inst->exec_size = GEN6_EXECSIZE_1;
      inst->src[0] = tsrc_rect(inst->src[0], TOY_RECT_010);
      inst->src[1] = tsrc_rect(inst->src[1], TOY_RECT_010);

      inst = tc_CMP(tc, tdst_null(), tsrc_from(tdst_d(gcc->vars.tmp)),
            tsrc_imm_d(GEN6_3DPRIM_TRISTRIP_REVERSE), GEN6_COND_NZ);
      inst->src[0] = tsrc_rect(inst->src[0], TOY_RECT_010);

      attr = tsrc_offset(gcc->payload.vues[dim], reg, subreg);
      inst = tc_MOV(tc, dst, attr);
      inst->pred_ctrl = GEN6_PREDCTRL_NORMAL;

      /* swap IN[0] and IN[1] for GEN6_3DPRIM_TRISTRIP_REVERSE */
      dim = !dim;

      attr = tsrc_offset(gcc->payload.vues[dim], reg, subreg);
      inst = tc_MOV(tc, dst, attr);
      inst->pred_ctrl = GEN6_PREDCTRL_NORMAL;
      inst->pred_inv = true;
   }
   else {
      attr = tsrc_offset(gcc->payload.vues[dim], reg, subreg);
      tc_MOV(tc, dst, attr);
   }


}
コード例 #10
0
ファイル: ilo_shader_gs.c プロジェクト: Distrotech/Mesa
static void
gs_lower_opcode_emit_so_static(struct gs_compile_context *gcc)
{
   struct toy_compiler *tc = &gcc->tc;
   struct toy_inst *inst;
   int i, j;

   if (gcc->static_data.num_vertices_in_prim < gcc->out_vue_min_count)
      return;

   inst = tc_MOV(tc, tdst_w(gcc->vars.tmp), tsrc_imm_v(0x03020100));
   inst->exec_size = GEN6_EXECSIZE_8;
   inst->mask_ctrl = GEN6_MASKCTRL_NOMASK;

   tc_ADD(tc, tdst_d(gcc->vars.tmp), tsrc_from(tdst_d(gcc->vars.tmp)),
         tsrc_rect(tsrc_from(gcc->vars.so_index), TOY_RECT_010));

   tc_IF(tc, tdst_null(),
         tsrc_rect(tsrc_offset(tsrc_from(tdst_d(gcc->vars.tmp)), 0, gcc->out_vue_min_count - 1), TOY_RECT_010),
         tsrc_rect(tsrc_offset(gcc->payload.svbi, 0, 4), TOY_RECT_010),
         GEN6_COND_LE);
   {
      for (i = 0; i < gcc->out_vue_min_count; i++) {
         for (j = 0; j < gcc->so_info->num_outputs; j++) {
            const int idx = gcc->so_info->output[j].register_index;
            struct toy_src index, out;
            int binding_table_index;
            bool write_commit;

            index = tsrc_d(tsrc_offset(tsrc_from(gcc->vars.tmp), 0, i));

            if (i == gcc->out_vue_min_count - 1) {
               out = gcc->vars.tgsi_outs[idx];
            }
            else {
               /* gcc->vars.buffer_cur also points to the first vertex */
               const int buf =
                  (gcc->vars.buffer_cur + i) % gcc->vars.buffer_needed;

               out = tsrc_offset(tsrc_from(gcc->vars.buffers[buf]), idx, 0);
            }

            out = tsrc_offset(out, 0, gcc->so_info->output[j].start_component);

            /*
             * From the Sandy Bridge PRM, volume 4 part 2, page 19:
             *
             *     "The Kernel must do a write commit on the last write to DAP
             *      prior to a URB_WRITE with End of Thread."
             */
            write_commit =
               (gcc->static_data.num_vertices == gcc->static_data.total_vertices &&
                i == gcc->out_vue_min_count - 1 &&
                j == gcc->so_info->num_outputs - 1);


            binding_table_index = gcc->shader->bt.gen6_so_base + j;

            gs_write_so(gcc, gcc->vars.tmp, index,
                  out, write_commit, binding_table_index);

            /*
             * From the Sandy Bridge PRM, volume 4 part 1, page 168:
             *
             *     "The write commit does not modify the destination register, but
             *      merely clears the dependency associated with the destination
             *      register. Thus, a simple "mov" instruction using the register as a
             *      source is sufficient to wait for the write commit to occur."
             */
            if (write_commit)
               tc_MOV(tc, gcc->vars.tmp, tsrc_from(gcc->vars.tmp));
         }
      }

      /* SONumPrimsWritten occupies the higher word of m0.2 of URB_WRITE */
      tc_ADD(tc, gcc->vars.so_written,
            tsrc_from(gcc->vars.so_written), tsrc_imm_d(1 << 16));
      tc_ADD(tc, gcc->vars.so_index,
            tsrc_from(gcc->vars.so_index), tsrc_imm_d(gcc->out_vue_min_count));
   }
   tc_ENDIF(tc);
}
コード例 #11
0
/**
 * Emit instructions to write the VUE.
 */
static void
vs_write_vue(struct vs_compile_context *vcc)
{
   struct toy_compiler *tc = &vcc->tc;
   struct toy_src outs[PIPE_MAX_SHADER_OUTPUTS];
   struct toy_dst header;
   struct toy_src r0;
   struct toy_inst *inst;
   int sent_attrs, total_attrs;

   header = tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf, 0));
   r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0));
   inst = tc_MOV(tc, header, r0);
   inst->mask_ctrl = GEN6_MASKCTRL_NOMASK;

   if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) {
      inst = tc_OR(tc, tdst_offset(header, 0, 5),
            tsrc_rect(tsrc_offset(r0, 0, 5), TOY_RECT_010),
            tsrc_rect(tsrc_imm_ud(0xff00), TOY_RECT_010));
      inst->exec_size = GEN6_EXECSIZE_1;
      inst->access_mode = GEN6_ALIGN_1;
      inst->mask_ctrl = GEN6_MASKCTRL_NOMASK;
   }

   total_attrs = vs_collect_outputs(vcc, outs);
   sent_attrs = 0;
   while (sent_attrs < total_attrs) {
      struct toy_src desc;
      int mrf = vcc->first_free_mrf + 1, avail_mrf_for_attrs;
      int num_attrs, msg_len, i;
      bool eot;

      num_attrs = total_attrs - sent_attrs;
      eot = true;

      /* see if we need another message */
      avail_mrf_for_attrs = vcc->last_free_mrf - mrf + 1;
      if (num_attrs > avail_mrf_for_attrs) {
         /*
          * From the Sandy Bridge PRM, volume 4 part 2, page 22:
          *
          *     "Offset. This field specifies a destination offset (in 256-bit
          *      units) from the start of the URB entry(s), as referenced by
          *      URB Return Handle n, at which the data (if any) will be
          *      written."
          *
          * As we need to offset the following messages, we must make sure
          * this one writes an even number of attributes.
          */
         num_attrs = avail_mrf_for_attrs & ~1;
         eot = false;
      }

      if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) {
         /* do not forget about the header */
         msg_len = 1 + num_attrs;
      }
      else {
         /*
          * From the Sandy Bridge PRM, volume 4 part 2, page 26:
          *
          *     "At least 256 bits per vertex (512 bits total, M1 & M2) must
          *      be written.  Writing only 128 bits per vertex (256 bits
          *      total, M1 only) results in UNDEFINED operation."
          *
          *     "[DevSNB] Interleave writes must be in multiples of 256 per
          *      vertex."
          *
          * That is, we must write or appear to write an even number of
          * attributes, starting from two.
          */
         if (num_attrs % 2 && num_attrs == avail_mrf_for_attrs) {
            num_attrs--;
            eot = false;
         }

         msg_len = 1 + align(num_attrs, 2);
      }

      for (i = 0; i < num_attrs; i++)
         tc_MOV(tc, tdst(TOY_FILE_MRF, mrf++, 0), outs[sent_attrs + i]);

      assert(sent_attrs % 2 == 0);
      desc = tsrc_imm_mdesc_urb(tc, eot, msg_len, 0,
            eot, true, false, true, sent_attrs / 2, 0);

      tc_add2(tc, TOY_OPCODE_URB_WRITE, tdst_null(), tsrc_from(header), desc);

      sent_attrs += num_attrs;
   }
}
コード例 #12
0
/**
 * Collect the toy registers to be written to the VUE.
 */
static int
vs_collect_outputs(struct vs_compile_context *vcc, struct toy_src *outs)
{
   const struct toy_tgsi *tgsi = &vcc->tgsi;
   unsigned i;

   for (i = 0; i < vcc->shader->out.count; i++) {
      const int slot = vcc->output_map[i];
      const int vrf = (slot >= 0) ? toy_tgsi_get_vrf(tgsi,
            TGSI_FILE_OUTPUT, 0, tgsi->outputs[slot].index) : -1;
      struct toy_src src;

      if (vrf >= 0) {
         struct toy_dst dst;

         dst = tdst(TOY_FILE_VRF, vrf, 0);
         src = tsrc_from(dst);

         if (i == 0) {
            /* PSIZE is at channel W */
            tc_MOV(&vcc->tc, tdst_writemask(dst, TOY_WRITEMASK_W),
                  tsrc_swizzle1(src, TOY_SWIZZLE_X));

            /* the other channels are for the header */
            dst = tdst_d(dst);
            tc_MOV(&vcc->tc, tdst_writemask(dst, TOY_WRITEMASK_XYZ),
                  tsrc_imm_d(0));
         }
         else {
            /* initialize unused channels to 0.0f */
            if (tgsi->outputs[slot].undefined_mask) {
               dst = tdst_writemask(dst, tgsi->outputs[slot].undefined_mask);
               tc_MOV(&vcc->tc, dst, tsrc_imm_f(0.0f));
            }
         }
      }
      else {
         /* XXX this is too ugly */
         if (vcc->shader->out.semantic_names[i] == TGSI_SEMANTIC_CLIPDIST &&
             slot < 0) {
            /* ok, we need to compute clip distance */
            int clipvert_slot = -1, clipvert_vrf, j;

            for (j = 0; j < tgsi->num_outputs; j++) {
               if (tgsi->outputs[j].semantic_name ==
                     TGSI_SEMANTIC_CLIPVERTEX) {
                  clipvert_slot = j;
                  break;
               }
               else if (tgsi->outputs[j].semantic_name ==
                     TGSI_SEMANTIC_POSITION) {
                  /* remember pos, but keep looking */
                  clipvert_slot = j;
               }
            }

            clipvert_vrf = (clipvert_slot >= 0) ? toy_tgsi_get_vrf(tgsi,
                  TGSI_FILE_OUTPUT, 0, tgsi->outputs[clipvert_slot].index) : -1;
            if (clipvert_vrf >= 0) {
               struct toy_dst tmp = tc_alloc_tmp(&vcc->tc);
               struct toy_src clipvert = tsrc(TOY_FILE_VRF, clipvert_vrf, 0);
               int first_ucp, last_ucp;

               if (vcc->shader->out.semantic_indices[i]) {
                  first_ucp = 4;
                  last_ucp = MIN2(7, vcc->variant->u.vs.num_ucps - 1);
               }
               else {
                  first_ucp = 0;
                  last_ucp = MIN2(3, vcc->variant->u.vs.num_ucps - 1);
               }

               for (j = first_ucp; j <= last_ucp; j++) {
                  const int plane_grf = vcc->first_ucp_grf + j / 2;
                  const int plane_subreg = (j & 1) * 16;
                  const struct toy_src plane = tsrc_rect(tsrc(TOY_FILE_GRF,
                           plane_grf, plane_subreg), TOY_RECT_041);
                  const unsigned writemask = 1 << ((j >= 4) ? j - 4 : j);

                  tc_DP4(&vcc->tc, tdst_writemask(tmp, writemask),
                        clipvert, plane);
               }

               src = tsrc_from(tmp);
            }
            else {
               src = tsrc_imm_f(0.0f);
            }
         }
         else {
            src = (i == 0) ? tsrc_imm_d(0) : tsrc_imm_f(0.0f);
         }
      }

      outs[i] = src;
   }

   return i;
}
コード例 #13
0
ファイル: ilo_shader_fs.c プロジェクト: mthuurne/mesa
static void
fetch_position(struct fs_compile_context *fcc, struct toy_dst dst)
{
   struct toy_compiler *tc = &fcc->tc;
   const struct toy_src src_z =
      tsrc(TOY_FILE_GRF, fcc->payloads[0].source_depth, 0);
   const struct toy_src src_w =
      tsrc(TOY_FILE_GRF, fcc->payloads[0].source_w, 0);
   const int fb_height =
      (fcc->variant->u.fs.fb_height) ? fcc->variant->u.fs.fb_height : 1;
   const bool origin_upper_left =
      (fcc->tgsi.props.fs_coord_origin == TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
   const bool pixel_center_integer =
      (fcc->tgsi.props.fs_coord_pixel_center ==
       TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
   struct toy_src subspan_x, subspan_y;
   struct toy_dst tmp, tmp_uw;
   struct toy_dst real_dst[4];

   tdst_transpose(dst, real_dst);

   subspan_x = tsrc_uw(tsrc(TOY_FILE_GRF, 1, 2 * 4));
   subspan_x = tsrc_rect(subspan_x, TOY_RECT_240);

   subspan_y = tsrc_offset(subspan_x, 0, 1);

   tmp_uw = tdst_uw(tc_alloc_tmp(tc));
   tmp = tc_alloc_tmp(tc);

   /* X */
   tc_ADD(tc, tmp_uw, subspan_x, tsrc_imm_v(0x10101010));
   tc_MOV(tc, tmp, tsrc_from(tmp_uw));
   if (pixel_center_integer)
      tc_MOV(tc, real_dst[0], tsrc_from(tmp));
   else
      tc_ADD(tc, real_dst[0], tsrc_from(tmp), tsrc_imm_f(0.5f));

   /* Y */
   tc_ADD(tc, tmp_uw, subspan_y, tsrc_imm_v(0x11001100));
   tc_MOV(tc, tmp, tsrc_from(tmp_uw));
   if (origin_upper_left && pixel_center_integer) {
      tc_MOV(tc, real_dst[1], tsrc_from(tmp));
   }
   else {
      struct toy_src y = tsrc_from(tmp);
      float offset = 0.0f;

      if (!pixel_center_integer)
         offset += 0.5f;

      if (!origin_upper_left) {
         offset += (float) (fb_height - 1);
         y = tsrc_negate(y);
      }

      tc_ADD(tc, real_dst[1], y, tsrc_imm_f(offset));
   }

   /* Z and W */
   tc_MOV(tc, real_dst[2], src_z);
   tc_INV(tc, real_dst[3], src_w);
}
コード例 #14
0
ファイル: ilo_shader_fs.c プロジェクト: mthuurne/mesa
static void
fetch_attr(struct fs_compile_context *fcc, struct toy_dst dst, int slot)
{
   struct toy_compiler *tc = &fcc->tc;
   struct toy_dst real_dst[4];
   bool is_const = false;
   int grf, mode, ch;

   tdst_transpose(dst, real_dst);

   grf = fcc->first_attr_grf + slot * 2;

   switch (fcc->tgsi.inputs[slot].interp) {
   case TGSI_INTERPOLATE_CONSTANT:
      is_const = true;
      break;
   case TGSI_INTERPOLATE_LINEAR:
      if (fcc->tgsi.inputs[slot].centroid)
         mode = BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC;
      else
         mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
      break;
   case TGSI_INTERPOLATE_COLOR:
      if (fcc->variant->u.fs.flatshade) {
         is_const = true;
         break;
      }
      /* fall through */
   case TGSI_INTERPOLATE_PERSPECTIVE:
      if (fcc->tgsi.inputs[slot].centroid)
         mode = BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC;
      else
         mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
      break;
   default:
      assert(!"unexpected FS interpolation");
      mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
      break;
   }

   if (is_const) {
      struct toy_src a0[4];

      a0[0] = tsrc(TOY_FILE_GRF, grf + 0, 3 * 4);
      a0[1] = tsrc(TOY_FILE_GRF, grf + 0, 7 * 4);
      a0[2] = tsrc(TOY_FILE_GRF, grf + 1, 3 * 4);
      a0[3] = tsrc(TOY_FILE_GRF, grf + 1, 7 * 4);

      for (ch = 0; ch < 4; ch++)
         tc_MOV(tc, real_dst[ch], tsrc_rect(a0[ch], TOY_RECT_010));
   }
   else {
      struct toy_src attr[4], uv;

      attr[0] = tsrc(TOY_FILE_GRF, grf + 0, 0);
      attr[1] = tsrc(TOY_FILE_GRF, grf + 0, 4 * 4);
      attr[2] = tsrc(TOY_FILE_GRF, grf + 1, 0);
      attr[3] = tsrc(TOY_FILE_GRF, grf + 1, 4 * 4);

      uv = tsrc(TOY_FILE_GRF, fcc->payloads[0].barycentric_interps[mode], 0);

      for (ch = 0; ch < 4; ch++) {
         tc_add2(tc, BRW_OPCODE_PLN, real_dst[ch],
               tsrc_rect(attr[ch], TOY_RECT_010), uv);
      }
   }

   if (fcc->tgsi.inputs[slot].semantic_name == TGSI_SEMANTIC_FOG) {
      tc_MOV(tc, real_dst[1], tsrc_imm_f(0.0f));
      tc_MOV(tc, real_dst[2], tsrc_imm_f(0.0f));
      tc_MOV(tc, real_dst[3], tsrc_imm_f(1.0f));
   }
}