void __init mx53_init_irq(void) { struct device_node *np; void __iomem *base; np = of_find_compatible_node(NULL, NULL, "fsl,imx53-tzic"); base = of_iomap(np, 0); WARN_ON(!base); tzic_init_irq(base); }
void __init mx53_init_irq(void) { unsigned long tzic_addr; void __iomem *tzic_virt; tzic_addr = MX53_TZIC_BASE_ADDR; tzic_virt = ioremap(tzic_addr, SZ_16K); if (!tzic_virt) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(tzic_virt); }
void __init mx51_init_irq(void) { unsigned long tzic_addr; void __iomem *tzic_virt; if (mx51_revision() < IMX_CHIP_REVISION_2_0) tzic_addr = MX51_TZIC_BASE_ADDR_TO1; else tzic_addr = MX51_TZIC_BASE_ADDR; tzic_virt = ioremap(tzic_addr, SZ_16K); if (!tzic_virt) panic("unable to map TZIC interrupt controller\n"); tzic_init_irq(tzic_virt); }
void __init mx50_init_irq(void) { tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); }