/***********************************************************************
*
* Function: c_entry
*
* Purpose: Application entry point from the startup code
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Always returns 1, or <0 on an error
*
* Notes: None
*
**********************************************************************/
void c_entry(void)
{
UNS_32 i;
uart_output_init();
/* Init NAND controller */
if (nand_lb_mlc_init() == 0)
{
uart_output((UNS_8*)"Cannot initialize NAND device\r\n");
while (1);
}
/* Disable write protect */
nand_flash_wp_disable();
uart_output((UNS_8*)"Formatting blocks 0\r\n");
/* Erase 25 blocks */
for (i = 0; i < 25; i++)
{
if (nand_lb_mlc_erase_block(i) == 0)
{
/* Erase failure, mark the block as bad */
uart_output((UNS_8*)"Erase failure\r\n");
}
else
{
uart_output((UNS_8*)"Block erased\r\n");
}
}
/* Loop forever */
while (1);
}
/***********************************************************************
*
* Function: c_entry
*
* Purpose: Application entry point from the startup code
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Always returns 1, or <0 on an error
*
* Notes: None
*
**********************************************************************/
void c_entry(void)
{
UNS_32 idx;
uart_output_init();
/* Force SSP configuration, use GPIO_05 (SSP0_CS) in software
control mode */
GPIO->p2_dir_set = P2_DIR_GPIO(5);
GPIO->p2_mux_clr = P2_GPIO05_SSEL0;
GPIO->p_mux_set = P_SPI1CLK_SCK0 | P_SPI1DATAIN_SSP0_MISO |
P_SPI1DATAIO_SSP0_MOSI;
board_spi_config();
/* Disable write protect */
spi_flash_wp_disable();
/* Fill first locations with 0's */
for (idx = 0; idx < 8; idx++)
{
board_spi_write(0, idx);
}
uart_output((UNS_8 *)"SPI erased\r\n");
/* Loop forever */
while (1);
}
/***********************************************************************
*
* Function: c_entry
*
* Purpose: Application entry point from the startup code
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
**********************************************************************/
void c_entry(void)
{
/* Disable interrupts in ARM core */
disable_irq_fiq();
/* Set virtual address of MMU table */
cp15_set_vmmu_addr((void *)
(IRAM_BASE + (256 * 1024) - (16 * 1024)));
/* Initialize interrupt system */
int_initialize(0xFFFFFFFF);
/* Install standard IRQ dispatcher at ARM IRQ vector */
int_install_arm_vec_handler(IRQ_VEC, (PFV) lpc32xx_irq_handler);
/* Setup miscellaneous board functions */
ea3250_board_init();
/* enable interupts */
enable_irq();
uart_output_init();
if (TRUE == ethIf_init(mac)) {
uart_output("MAC initialized\r\n");
}
else {
uart_output("Failed to initialized MAC controller\r\n");
}
while(1)
{
UNS_16 len = 0;
len = ethIf_poll(inBuf, INBUF_LEN);
if(len > 0)
{
ethInput(inBuf, len);
}
}
}
/***********************************************************************
*
* Function: c_entry
*
* Purpose: Application entry point from the startup code
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Always returns 1, or <0 on an error
*
* Notes: None
*
**********************************************************************/
void c_entry(void)
{
UNS_32 ptw, *a1, sector, progblk;
UNS_32 loadsize, loadcount;
UNS_8 tmp16, tmp16i;
UNS_8 *p8, tmp [16];
int idx = 0;
uart_output_init();
/* Now to download the image */
uart_output((UNS_8*)"X");
/* Wait for 'p' */
while (!uart_input(&tmp[0], 1));
/* Wait for 8 bytes from other side */
idx = 0;
while (idx < 8)
{
idx += uart_input(&tmp[idx], (8 - idx));
}
uart_output((UNS_8*)"o");
a1 = (UNS_32 *) tmp;
/* Get size of secondary file */
loadsize = a1[1];
/* Receive complete file using UART */
loadcount = 0;
p8 = (UNS_8 *) BURNER_LOAD_ADDR;
while (loadsize > loadcount)
{
loadcount += uart_input(p8 + loadcount, (loadsize - loadcount));
}
uart_output((UNS_8*)"t");
if (loadsize > (31 * 512))
{
uart_output((UNS_8*)"Image too large for kickstart, 15.5K max!\r\n");
while (1);
}
/* Init NAND controller */
if (nand_sb_mlc_init() == 0)
{
uart_output((UNS_8*)"Cannot initialize NAND device\r\n");
while (1);
}
/* Disable write protect */
nand_flash_wp_disable();
wrbuff16 = (UNS_16 *) wrbuff;
rdbuff8 = (UNS_8 *) rdbuff;
wrbuff8 = (UNS_8 *) wrbuff;
/* Setup a write block with a bad block marker in case it is
needed */
memset(wrbuff, 0xFF, 528);
wrbuff8[NAND_SB_BADBLOCK_OFFS] = (UNS_8) ~NAND_GOOD_BLOCK_MARKER;
uart_output((UNS_8*)"Formatting blocks...\r\n");
progblk = 0;
sector = nand_bp_to_sector(progblk, 0);
/* Get sector address for first page of block */
if (nand_sb_mlc_erase_block(progblk) == 0)
{
/* Erase failure, mark the block as bad */
uart_output((UNS_8*)"Erase failure\r\n");
nand_sb_mlc_write_sector(sector, wrbuff8);
}
/* Really, Block is reased? */
nand_sb_mlc_read_sector(sector, rdbuff8);
idx = compdata(rdbuff8, 0xFF);
if(idx >= 0)
{
uart_output((UNS_8*)"Erase failure\r\n");
nand_sb_mlc_write_sector(sector, wrbuff8);
while (1);
}
/* NAND is setup and ready */
uart_output((UNS_8*)"Format complete\r\n");
/* Setup the write buffer for page #0 ICR data */
memset(wrbuff, 0x00, 528);
/* Setup FLASH config for small block, 3 or 4 address */
if (nandgeom.address_cycles == 3)
{
/* 3 address cycles per sector, small block */
tmp16 = 0xF0;
}
else
{
/* 4 address cycles per sector, small block */
tmp16 = 0xD2;
}
/* Setup FLASH config for large block, 5 address */
tmp16i = 0xFF - tmp16;
wrbuff16[0] = tmp16;
wrbuff16[2] = tmp16i;
wrbuff16[4] = tmp16;
wrbuff16[6] = tmp16i;
ptw = loadsize / nandgeom.data_bytes_per_page;
if ((ptw * nandgeom.data_bytes_per_page) < loadsize)
{
ptw++;
}
ptw++; /* Include non-used sector */
tmp16 = (UNS_16) ptw;
tmp16i = 0x00FF - tmp16;
wrbuff16[8] = tmp16;
wrbuff16[10] = tmp16i;
wrbuff16[12] = tmp16;
wrbuff16[14] = tmp16i;
wrbuff16[16] = tmp16;
wrbuff16[18] = tmp16i;
wrbuff16[20] = tmp16;
wrbuff16[22] = tmp16i;
wrbuff16[24] = 0x00AA; /* Good block marker for page #0 ICR only */
/* Get location where to write ICR */
progblk = 0;
sector = nand_bp_to_sector(progblk, 0);
/* Write ICR data to first usable block/page #0 */
nand_sb_mlc_write_sector(sector, wrbuff8);
/* Verify page #0 */
nand_sb_mlc_read_sector(sector, rdbuff8);
idx = isblksame(rdbuff8, wrbuff8);
if (idx >= 0)
{
uart_output((UNS_8*)"Error writing ICR data in page #0\r\n");
while (1);
}
progblk = 0;
sector = nand_bp_to_sector(progblk, 1);
uart_output((UNS_8*)"\nWritting kickstart into flash...\r\n");
nand_write_sectors(sector, p8, loadsize);
uart_output((UNS_8*)"Verifing data...");
idx = verify_data(sector, p8, rdbuff8, loadsize);
if(idx >= 0)
uart_output((UNS_8*)"...Failed\r\n");
else
uart_output((UNS_8*)"...Successfully\r\n");
uart_output((UNS_8*)"NAND flash is programmed Successfully\r\n");
/* Loop forever */
while (1);
}
/***********************************************************************
*
* Function: c_entry
*
* Purpose: Application entry point from the startup code
*
* Processing:
* See function.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Always returns 1, or <0 on an error
*
* Notes: None
*
**********************************************************************/
void c_entry(void)
{
UNS_32 noBlocks, *a1, sector, progblk, blkcnt;
UNS_32 loadsize, loadcount;
UNS_8 *p8, tmp[16];
UNS_32 good_blks[64];
int idx = 0;
UNS_32 blksize = 0, size = 0, offset = 0, ret;
memset(spare, 0xFF, sizeof(spare));
uart_output_init();
/* Now to download the image */
uart_output((UNS_8 *)"X");
/* Wait for 'p' */
while (!uart_input(&tmp[0], 1));
/* Wait for 8 bytes from other side */
idx = 0;
while (idx < 8)
{
idx += uart_input(&tmp[idx], (8 - idx));
}
uart_output((UNS_8 *)"o");
a1 = (UNS_32 *) tmp;
/* Get size of secondary file */
loadsize = a1[1];
/* Receive complete file using UART */
loadcount = 0;
p8 = (UNS_8 *) BURNER_LOAD_ADDR;
while (loadsize > loadcount)
{
loadcount += uart_input(p8 + loadcount, (loadsize - loadcount));
}
uart_output((UNS_8 *)"t");
/* Init NAND controller */
if (nand_lb_slc_init() == 0)
{
uart_output((UNS_8 *)"Cannot initialize SLC NAND device\r\n");
while (1);
}
/* Disable write protect */
nand_flash_wp_disable();
rdbuff8 = (UNS_8 *) rdbuff;
/* Calculate Required Blocks for flashing stage1 application */
blksize = nandgeom.data_bytes_per_page * nandgeom.pages_per_block;
noBlocks = loadsize /blksize;
if ((noBlocks * blksize) < loadsize)
{
noBlocks++;
}
/* Erase blocks starting from 1 & leave bad blocks */
progblk = 1;
uart_output((UNS_8 *)"Formatting blocks...\r\n");
blkcnt = 0;
do
{
/* Check if block is bad or not */
ret = nand_lb_slc_is_block_bad(progblk);
if(ret == 0)
{
/* Get sector address for first page of block */
sector = nand_bp_to_sector(progblk, 0);
if (nand_lb_slc_erase_block(progblk) == 0)
{
/* Erase failure */
uart_output((UNS_8 *)"Error: Erase failure\r\n");
while(1);
}
/* Really, Block is reased? */
nand_lb_slc_read_sector(sector, rdbuff8, NULL);
idx = compdata(rdbuff8,0xFF);
if(idx >= 0)
{
uart_output((UNS_8 *)"Error: Erase failure...\r\n");
while (1);
}
good_blks[blkcnt] = progblk;
blkcnt++;
}
progblk++;
}while(blkcnt < noBlocks);
uart_output((UNS_8 *)"Format complete\r\n");
uart_output((UNS_8 *)"Writting S1 image into flash...\r\n");
offset = 0;
for (blkcnt = 0; blkcnt < noBlocks; blkcnt++)
{
progblk = good_blks[blkcnt];
sector = nand_bp_to_sector(progblk, 0);
if(loadsize <= blksize)
size = loadsize;
else
size = blksize;
/* Write 1 block size or less data into Flash */
if (nand_write_sectors(sector, p8 + offset, size) <= 0)
{
uart_output((UNS_8 *)"Error: Failed to write data...\r\n");
while(1);
}
idx = verify_data(sector, p8 + offset, rdbuff8, size);
if(idx >= 0)
{
uart_output((UNS_8 *)"...Failed\r\n");
while(1);
}
loadsize -= blksize;
offset += blksize;
progblk++;
}
uart_output((UNS_8 *)"NAND flash is programmed Successfully\r\n");
/* Loop forever */
while (1);
}