int uart_setup() {
int i;
if(UartHasInit) {
return 0;
}
clock_gate_switch(UART_CLOCKGATE, ON);
for(i = 0; i < NUM_UARTS; i++) {
// set all uarts to transmit 8 bit frames, one stop bit per frame, no parity, no infrared mode
SET_REG(HWUarts[i].ULCON, UART_8BITS);
// set all uarts to use polling for rx/tx, no breaks, no loopback, no error status interrupts,
// no timeouts, pulse interrupts for rx/tx, peripheral clock. Basically, the defaults.
SET_REG(HWUarts[i].UCON, (UART_UCON_MODE_IRQORPOLL << UART_UCON_RXMODE_SHIFT)
| (UART_UCON_MODE_IRQORPOLL << UART_UCON_TXMODE_SHIFT));
// Initialize the settings array a bit so the helper functions can be used properly
UARTs[i].ureg = i;
UARTs[i].baud = 115200;
uart_set_clk(i, UART_CLOCK_EXT_UCLK0);
uart_set_sample_rate(i, 16);
}
// Set flow control
uart_set_flow_control(0, OFF);
uart_set_flow_control(1, ON);
uart_set_flow_control(2, ON);
uart_set_flow_control(3, ON);
uart_set_flow_control(4, OFF);
// Reset and enable fifo
for(i = 0; i < NUM_UARTS; i++) {
SET_REG(HWUarts[i].UFCON, UART_FIFO_RESET_TX | UART_FIFO_RESET_RX);
SET_REG(HWUarts[i].UFCON, UART_FIFO_ENABLE);
UARTs[i].fifo = ON;
}
for(i = 0; i < NUM_UARTS; i++) {
uart_set_mode(i, UART_POLL_MODE);
}
uart_set_mode(0, UART_POLL_MODE);
UartHasInit = TRUE;
return 0;
}
/*---------------------------------------------------------------------------*/
int
uart_unlock(unsigned mode)
{
if((uart_lockcnt == 0) || (mode != uart_mode)) {
uart_lockcnt = 0;
uart_set_mode(UART_MODE_DEFAULT);
return 0;
}
/* decrement lock */
if(uart_lockcnt > 0) {
uart_lockcnt--;
/* if no more locks, switch back to default mode */
if(uart_lockcnt == 0) {
uart_set_mode(UART_MODE_DEFAULT);
}
return 1;
}
return 0;
}
/*---------------------------------------------------------------------------*/
int
uart_lock(unsigned mode)
{
/* already locked? */
if(uart_mode != mode && uart_lockcnt > 0) {
return 0;
}
/* increase lock count */
uart_lockcnt++;
/* switch mode (if neccessary) */
uart_set_mode(mode);
return 1;
}
