/** Backend for the x86 seL4_TCB_UnsetBreakpoint invocation. * * Unsets and *clears* a hardware breakpoint. * @param uds Arch TCB register context pointer. * @param bp_num The hardware breakpoint ID you'd like to clear. */ void unsetBreakpoint(tcb_t *t, uint16_t bp_num) { disableBreakpoint(t, bp_num); unsetDr7BitsFor(t, bp_num); setBpVaddrContext(t, bp_num, 0); }
/** Backend for the seL4_TCB_SetBreakpoint invocation. * * @param uds Arch TCB register context structure. * @param bp_num Hardware breakpoint ID. * @param vaddr USerspace virtual address on which you'd like this breakpoing * to trigger. * @param types One of the seL4_BreakpointType values. * @param size positive integer indicating the byte-range size that should * trigger the breakpoint. 0 is valid for Instruction breakpoints. * @param rw Access type that should trigger the BP (read/write). */ void setBreakpoint(tcb_t *t, uint16_t bp_num, word_t vaddr, word_t types, word_t size, word_t rw) { word_t dr7val; assert(t != NULL); dr7val = convertTypeAndAccessToArch(bp_num, types, rw); dr7val |= convertSizeToArch(bp_num, types, size); setBpVaddrContext(t, bp_num, vaddr); unsetDr7BitsFor(t, bp_num); bitwiseOrDr7Context(t, dr7val); enableBreakpoint(t, bp_num); }