static void lcd_power_en(unsigned char enabled) { #ifdef BUILD_LK printf("%s, %d LK \n", __func__, enabled); #else printk("%s, %d kernel", __func__, enabled); #endif if (enabled) { #ifdef BUILD_LK #if 0 #ifdef MTK_PMIC_MT6397 #else /* VGP2_PMU 3V */ pmic_config_interface(DIGLDO_CON29, 0x6, PMIC_RG_VGP2_VOSEL_MASK, PMIC_RG_VGP2_VOSEL_SHIFT); pmic_config_interface(DIGLDO_CON8, 0x1, PMIC_RG_VGP2_EN_MASK, PMIC_RG_VGP2_EN_SHIFT); #endif #endif upmu_set_rg_vgp6_vosel(0x05); upmu_set_rg_vgp6_sw_en(0x01); #else #if 0 #ifdef MTK_PMIC_MT6397 #else upmu_set_rg_vgp2_vosel(0x6); upmu_set_rg_vgp2_en(0x1); #endif #endif upmu_set_rg_vgp6_vosel(0x05); upmu_set_rg_vgp6_sw_en(0x01); #endif //mt_set_gpio_out(GPIO_LCM_PWR, GPIO_OUT_ONE); } else { #ifdef BUILD_LK #if 0 #ifdef MTK_PMIC_MT6397 #else /* VGP2_PMU 3V */ pmic_config_interface(DIGLDO_CON8, 0x0, PMIC_RG_VGP2_EN_MASK, PMIC_RG_VGP2_EN_SHIFT); pmic_config_interface(DIGLDO_CON29, 0x0, PMIC_RG_VGP2_VOSEL_MASK, PMIC_RG_VGP2_VOSEL_SHIFT); #endif #endif upmu_set_rg_vgp6_vosel(0x0); upmu_set_rg_vgp6_sw_en(0x0); #else #if 0 #ifdef MTK_PMIC_MT6397 #else upmu_set_rg_vgp2_en(0x0); upmu_set_rg_vgp2_vosel(0x0); #endif #endif upmu_set_rg_vgp6_vosel(0x0); upmu_set_rg_vgp6_sw_en(0x0); #endif //mt_set_gpio_out(GPIO_LCM_PWR, GPIO_OUT_ZERO); } }
static void lcm_init(void) { #ifdef BUILD_LK printf("[LK/LCM]lcm_init\n"); /* step1: sn65dsi8x enbable and init */ /* GPIO42 VDD18_LVDS for SN65DSI83 power */ lcm_set_gpio_output(GPIO_LCD_PWR2_EN, GPIO_OUT_ONE); MDELAY(20); /* GPIO127 LVDS_EN_R for SN65DSI83 */ lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ONE); MDELAY(5); lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ZERO); MDELAY(20); lcm_set_gpio_output(GPIO_LCD_BRIDGE_EN, GPIO_OUT_ONE); MDELAY(50); DSI_clk_HS_mode(0, NULL, 1); MDELAY(5); init_sn65dsi8x(); MDELAY(10); /* step 2 :lvds lcd init */ /* GPIO131 VDD33_LCD */ lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE); MDELAY(50); /* VGP6_PMU AVDDVGH/VGL/VCOM for panel power */ upmu_set_rg_vgp6_vosel(0x7); upmu_set_rg_vgp6_sw_en(0x1); /* GPIO103 LCM_RST for panel */ lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ZERO); MDELAY(50); /* GPIO102 LCM_STBY_2V8 for panel */ lcm_set_gpio_output(GPIO_LCD_STB_EN, GPIO_OUT_ONE); #elif (defined BUILD_UBOOT) #else pr_debug("[Kernel/LCM]lcm_init\n"); DSI_clk_HS_mode(0, NULL, 1); #endif }