void usart_disable(usart_dev *dev)
{
/* Check the parameters */
assert_param(IS_USART_ALL_PERIPH(dev->USARTx));
/* Enable USART */
USART_Cmd(dev->USARTx, DISABLE);
/* Clean up buffer */
usart_reset_rx(dev);
usart_reset_tx(dev);
}
void ISO7816_Usart_ISR_Test (void)
{
static int n = 0;
static int c;
// static int x;
// Test for tx int
// Tx int enabled ?
if (1 == EXAMPLE_INT_USART->IMR.txempty)
{
// Yes
// Data send ?
if (1 == EXAMPLE_INT_USART->CSR.txempty)
{
// Data send
EXAMPLE_INT_USART->IDR.txempty = 1;
usart_reset_tx (EXAMPLE_INT_USART);
/*
// Disable tx empty interrupt Disable_global_interrupt(); EXAMPLE_INT_USART->IDR.txempty = 1; Enable_global_interrupt(); while (1 ==
EXAMPLE_INT_USART->IMR.txempty) ; */
/*
// clearing interrupt request x = EXAMPLE_INT_USART->cr; EXAMPLE_INT_USART->cr = x; x = EXAMPLE_INT_USART->cr; */
}
}
else
{
n++;
}
// Test for rx int
if (1 == EXAMPLE_INT_USART->CSR.rxrdy)
{
// Data is ready
usart_read_char (EXAMPLE_INT_USART, &c);
// EXAMPLE_INT_USART->IER.txempty = 1;
// Send data
// usart_write_char(EXAMPLE_INT_USART, c);
// Enable tx int
Disable_global_interrupt ();
EXAMPLE_INT_USART->IER.txempty = 1;
Enable_global_interrupt ();
while (0 == EXAMPLE_INT_USART->IMR.txempty);
}
/*
usart_read_char(EXAMPLE_INT_USART, &c); usart_write_char(EXAMPLE_INT_USART, c); */
n++;
}
__interrupt
#endif
static void ISO7816_Usart_ISR (void)
{
static int n = 0;
static int nError = 0;
int c;
int nRet;
u16 SaveBufferPointer_u16;
// Test for rx int
if (1 == EXAMPLE_INT_USART->CSR.rxrdy)
{
// Get Data
nRet = usart_read_char (EXAMPLE_INT_USART, &c);
if (USART_RX_ERROR == nRet)
{
usart_reset_tx (ISO7816_USART); // Reset all
usart_reset_rx (ISO7816_USART);
nError++;
return;
}
// Save old end pointer
SaveBufferPointer_u16 = ISO7816_UsartRxBufferPointerEnd_u16;
// Set next buffer position
SaveBufferPointer_u16++;
// End of buffer reached ?
if (ISO7816_RX_BUFFER_SIZE <= SaveBufferPointer_u16)
{
// Yes
SaveBufferPointer_u16 = 0;
}
// Buffer full ?
if (ISO7816_UsartRxBufferPointerEnd_u16 == SaveBufferPointer_u16)
{
// Buffer full
ISO7816_UsartRxBufferStatus_e = ISO7816_USART_INT_STATUS_OVERFLOW;
}
else
{
// Store char
ISO7816_UsartRxBuffer_u8[ISO7816_UsartRxBufferPointerEnd_u16] = c;
// Set external var to new buffer end
ISO7816_UsartRxBufferPointerEnd_u16 = SaveBufferPointer_u16;
}
}
n++;
}
OSStatus platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* peripheral, const platform_uart_config_t* config, ring_buffer_t* optional_ring_buffer )
{
pdc_packet_t pdc_uart_packet, pdc_uart_tx_packet;
OSStatus err = kNoErr;
sam_usart_opt_t settings;
bool hardware_shaking = false;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ) && ( peripheral != NULL ) && ( config != NULL ), exit, err = kParamErr);
require_action_quiet( (optional_ring_buffer->buffer != NULL ) && (optional_ring_buffer->size != 0), exit, err = kUnsupportedErr);
driver->rx_size = 0;
driver->tx_size = 0;
driver->rx_ring_buffer = optional_ring_buffer;
driver->last_transmit_result = kNoErr;
driver->last_receive_result = kNoErr;
driver->peripheral = (platform_uart_t*)peripheral;
#ifndef NO_MICO_RTOS
mico_rtos_init_semaphore( &driver->tx_complete, 1 );
mico_rtos_init_semaphore( &driver->rx_complete, 1 );
mico_rtos_init_semaphore( &driver->sem_wakeup, 1 );
mico_rtos_init_mutex ( &driver->tx_mutex );
#else
driver->tx_complete = false;
driver->rx_complete = false;
#endif
/* Set Tx and Rx pin mode to UART peripheral */
platform_gpio_peripheral_pin_init( peripheral->tx_pin, ( peripheral->tx_pin_mux_mode | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( peripheral->rx_pin, ( peripheral->rx_pin_mux_mode | IOPORT_MODE_PULLUP ) );
/* Init CTS and RTS pins (if available) */
if ( peripheral->cts_pin != NULL && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
hardware_shaking = true;
platform_gpio_peripheral_pin_init( peripheral->cts_pin, ( peripheral->cts_pin_mux_mode | IOPORT_MODE_PULLUP ) );
}
if ( peripheral->rts_pin != NULL && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
hardware_shaking = true;
platform_gpio_peripheral_pin_init( peripheral->rts_pin, ( peripheral->rts_pin_mux_mode | IOPORT_MODE_PULLUP ) );
}
/* Enable the clock. */
if( pmc_is_periph_clk_enabled( peripheral->peripheral_id ) == 0 ) {
flexcom_enable( peripheral->flexcom_base );
}
flexcom_set_opmode( peripheral->flexcom_base, FLEXCOM_USART );
/* Enable the receiver and transmitter. */
usart_reset_tx( peripheral->port );
usart_reset_rx( peripheral->port );
/* Disable all the interrupts. */
usart_disable_interrupt( peripheral->port, 0xffffffff );
switch ( config->parity ) {
case NO_PARITY:
settings.parity_type = US_MR_PAR_NO;
break;
case EVEN_PARITY:
settings.parity_type = US_MR_PAR_EVEN;
break;
case ODD_PARITY:
settings.parity_type = US_MR_PAR_ODD;
break;
default:
err = kParamErr;
goto exit;
}
switch ( config->data_width) {
case DATA_WIDTH_5BIT:
settings.char_length = US_MR_CHRL_5_BIT;
break;
case DATA_WIDTH_6BIT:
settings.char_length = US_MR_CHRL_6_BIT;
break;
case DATA_WIDTH_7BIT:
settings.char_length = US_MR_CHRL_7_BIT;
break;
case DATA_WIDTH_8BIT:
settings.char_length = US_MR_CHRL_8_BIT;
break;
case DATA_WIDTH_9BIT:
settings.char_length = US_MR_MODE9;
break;
default:
err = kParamErr;
goto exit;
}
settings.baudrate = config->baud_rate;
settings.stop_bits = ( config->stop_bits == STOP_BITS_1 ) ? US_MR_NBSTOP_1_BIT : US_MR_NBSTOP_2_BIT;
settings.channel_mode= US_MR_CHMODE_NORMAL;
/* Configure USART in serial mode. */
if (!hardware_shaking) {
usart_init_rs232( peripheral->port, &settings, sysclk_get_peripheral_hz());
} else {
usart_init_hw_handshaking( peripheral->port, &settings, sysclk_get_peripheral_hz());
}
/* Enable uart interrupt */
NVIC_SetPriority( platform_flexcom_irq_numbers[peripheral->uart_id], 0x06 );
NVIC_EnableIRQ( platform_flexcom_irq_numbers[peripheral->uart_id] );
/* Enable PDC transmit */
pdc_enable_transfer( usart_get_pdc_base( peripheral->port ), PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTDIS );
pdc_uart_packet.ul_addr = (uint32_t)driver->rx_ring_buffer->buffer;
pdc_uart_packet.ul_size = (uint32_t)driver->rx_ring_buffer->size;
pdc_rx_init( usart_get_pdc_base( peripheral->port ), &pdc_uart_packet, &pdc_uart_packet );
pdc_uart_tx_packet.ul_addr = (uint32_t)0;
pdc_uart_tx_packet.ul_size = (uint32_t)1;
pdc_tx_init( usart_get_pdc_base( driver->peripheral->port ), &pdc_uart_tx_packet, NULL );
usart_enable_interrupt( peripheral->port, US_IER_ENDRX | US_IER_RXBUFF | US_IER_RXRDY | US_IER_ENDTX );
/* Enable the receiver and transmitter. */
usart_enable_tx( peripheral->port );
usart_enable_rx( peripheral->port );
exit:
platform_mcu_powersave_enable( );
return err;
}
void FastSerial::flush(void) {
usart_reset_rx(this->usart_device);
usart_reset_tx(this->usart_device);
}
void FastSerial::set_blocking_writes(bool enable)
{
usart_reset_tx(this->usart_device);
usart_use_tx_fifo(this->usart_device, (enable ? 0 : 1));
}
void FastSerial::use_tx_fifo(bool enable)
{
usart_reset_tx(this->usart_device);
usart_use_tx_fifo(this->usart_device, (enable ? 1 : 0));
}
platform_result_t platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* peripheral, const platform_uart_config_t* config, wiced_ring_buffer_t* optional_ring_buffer )
{
sam_usart_opt_t settings;
UNUSED_PARAMETER(driver);
UNUSED_PARAMETER(peripheral);
UNUSED_PARAMETER(config);
UNUSED_PARAMETER(optional_ring_buffer);
pdc_packet_t dma_packet;
if ( config->flow_control != FLOW_CONTROL_DISABLED )
{
return WICED_UNSUPPORTED;
}
memset( &settings, 0, sizeof( settings ) );
switch ( config->data_width )
{
case DATA_WIDTH_5BIT:
settings.char_length = US_MR_CHRL_5_BIT;
break;
case DATA_WIDTH_6BIT:
settings.char_length = US_MR_CHRL_6_BIT;
break;
case DATA_WIDTH_7BIT:
settings.char_length = US_MR_CHRL_7_BIT;
break;
case DATA_WIDTH_8BIT:
settings.char_length = US_MR_CHRL_8_BIT;
break;
case DATA_WIDTH_9BIT:
default:
return WICED_UNSUPPORTED;
}
switch ( config->parity )
{
case ODD_PARITY:
settings.parity_type = US_MR_PAR_ODD;
break;
case EVEN_PARITY:
settings.parity_type = US_MR_PAR_EVEN;
break;
case NO_PARITY:
settings.parity_type = US_MR_PAR_NO;
break;
default:
break;
}
switch ( config->stop_bits )
{
case STOP_BITS_1:
settings.stop_bits = US_MR_NBSTOP_1_BIT;
break;
case STOP_BITS_2:
settings.stop_bits = US_MR_NBSTOP_2_BIT;
break;
default:
break;
}
settings.baudrate = config->baud_rate;
settings.channel_mode = US_MR_CHMODE_NORMAL;
driver->peripheral = peripheral;
// /* Initialise TX and RX complete semaphores */
host_rtos_init_semaphore( &driver->tx_dma_complete );
host_rtos_init_semaphore( &driver->rx_dma_complete );
/* Set Tx and Rx pin mode to UART peripheral */
platform_gpio_peripheral_pin_init( peripheral->tx_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
platform_gpio_peripheral_pin_init( peripheral->rx_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
/* Init CTS and RTS pins (if available) */
if ( peripheral->cts_pin != NULL )
{
platform_gpio_peripheral_pin_init( peripheral->cts_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
}
if ( peripheral->rts_pin != NULL )
{
platform_gpio_peripheral_pin_init( peripheral->rts_pin, ( IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP ) );
}
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock( peripheral->peripheral_id );
/* Enable the receiver and transmitter. */
usart_reset_tx( peripheral->peripheral );
usart_reset_rx( peripheral->peripheral );
/* Configure USART in serial mode. */
usart_init_rs232( peripheral->peripheral, &settings, CPU_CLOCK_HZ );
/* Disable all the interrupts. */
usart_disable_interrupt( peripheral->peripheral, 0xffffffff );
/* Enable uart interrupt */
NVIC_SetPriority( platform_uarts_irq_numbers[peripheral->uart_id], 0x06 );
NVIC_EnableIRQ( platform_uarts_irq_numbers[peripheral->uart_id] );
/* Enable PDC transmit */
pdc_enable_transfer( usart_get_pdc_base( peripheral->peripheral ), PERIPH_PTCR_TXTEN | PERIPH_PTCR_RXTEN );
driver->rx_ring_buffer = optional_ring_buffer;
dma_packet.ul_addr = (uint32_t)driver->rx_ring_buffer->buffer;
dma_packet.ul_size = (uint32_t)driver->rx_ring_buffer->size;
pdc_rx_init( usart_get_pdc_base( peripheral->peripheral ), &dma_packet, &dma_packet );
usart_enable_interrupt( peripheral->peripheral, US_IER_ENDRX | US_IER_RXBUFF | US_IER_RXRDY | US_IER_ENDTX );
/* Enable the receiver and transmitter. */
usart_enable_tx( peripheral->peripheral );
usart_enable_rx( peripheral->peripheral );
return PLATFORM_SUCCESS;
}
